公开(公告)号：US20130007692A1

公开(公告)日：2013-01-03

申请号：US13172248

申请日：2011-06-29

Applicant: Chao-Yang Yeh ,  Ze-Ming Wu ,  Meng-Lin Chung ,  Chih-Chia Chen ,  Li-Fu Ding ,  Sa-Lly Liu

Inventor： Chao-Yang Yeh ,  Ze-Ming Wu ,  Meng-Lin Chung ,  Chih-Chia Chen ,  Li-Fu Ding ,  Sa-Lly Liu

IPC: G06F17/50

CPC classification number: G06F17/5036

Abstract: A method comprises analyzing front side conductive patterns and back side conductive patterns on a semiconductor interposer using a machine implemented RC extraction tool, and outputting data representing a plurality of respective RC nodes from the RC extraction tool to a tangible persistent machine readable storage medium. A substrate mesh model of the semiconductor interposer is generated, having a plurality of substrate mesh nodes. Each substrate mesh node is connected to adjacent ones of the plurality of substrate mesh nodes by respective substrate impedance elements. A set of inputs to a timing analysis tool is formed. The plurality of RC nodes are connected to ones of the plurality of substrate mesh nodes of the substrate mesh model. The set of inputs is stored in a tangible machine readable storage medium.

Abstract translation: 一种方法包括使用机器实施的RC提取工具来分析半导体插入器上的前侧导电图案和背面导电图案，并将表示多个相应RC节点的数据从RC提取工具输出到有形的持久机器可读存储介质。 产生半导体插入器的衬底网格模型，其具有多个衬底网格节点。 每个衬底网格节点通过相应的衬底阻抗元件连接到多个衬底网格节点中的相邻衬底网格节点。 形成了一组时序分析工具的输入。 多个RC节点连接到衬底网格模型的多个衬底网格节点中的一个。 该组输入存储在有形机器可读存储介质中。

公开(公告)号：US08856710B2

公开(公告)日：2014-10-07

申请号：US13172248

申请日：2011-06-29

Applicant: Chao-Yang Yeh ,  Ze-Ming Wu ,  Meng-Lin Chung ,  Chih-Chia Chen ,  Li-Fu Ding ,  Sa-Lly Liu

Inventor： Chao-Yang Yeh ,  Ze-Ming Wu ,  Meng-Lin Chung ,  Chih-Chia Chen ,  Li-Fu Ding ,  Sa-Lly Liu

IPC: G06F17/50

CPC classification number: G06F17/5036

Abstract: A method comprises analyzing front side conductive patterns and back side conductive patterns on a semiconductor interposer using a machine implemented RC extraction tool, and outputting data representing a plurality of respective RC nodes from the RC extraction tool to a tangible persistent machine readable storage medium. A substrate mesh model of the semiconductor interposer is generated, having a plurality of substrate mesh nodes. Each substrate mesh node is connected to adjacent ones of the plurality of substrate mesh nodes by respective substrate impedance elements. A set of inputs to a timing analysis tool is formed. The plurality of RC nodes are connected to ones of the plurality of substrate mesh nodes of the substrate mesh model. The set of inputs is stored in a tangible machine readable storage medium.

Abstract translation: 一种方法包括使用机器实施的RC提取工具来分析半导体插入器上的前侧导电图案和背面导电图案，并将表示多个相应RC节点的数据从RC提取工具输出到有形的持久机器可读存储介质。 产生半导体插入器的衬底网格模型，其具有多个衬底网格节点。 每个衬底网格节点通过相应的衬底阻抗元件连接到多个衬底网格节点中的相邻衬底网格节点。 形成了一组时序分析工具的输入。 多个RC节点连接到衬底网格模型的多个衬底网格节点中的一个。 该组输入存储在有形机器可读存储介质中。