Integrated cable modem
    1.
    发明授权
    Integrated cable modem 有权
    集成电缆调制解调器

    公开(公告)号:US08578434B2

    公开(公告)日:2013-11-05

    申请号:US11133275

    申请日:2005-05-20

    IPC分类号: H04N7/173

    摘要: The present invention is an integrated cable modem tuner. In one embodiment, the upstream path and the downstream path are integrated on a common semiconductor substrate. The down-stream path can include a TV tuner and digital receiver portion that is integrated on a common semiconductor substrate with the power amplifier of the upstream path. In another embodiment, the TV tuner is implemented on a first semiconductor substrate and the digital receiver portion and the power amplifier are configured on a second semiconductor substrate. However, the two substrates are mounted on a common carrier so that the cable modem appears to be a single chip configuration to the user.

    摘要翻译: 本发明是综合电缆调制解调器调谐器。 在一个实施例中,上游路径和下游路径被集成在公共半导体衬底上。 下行路径可以包括集成在具有上游路径的功率放大器的公共半导体衬底上的TV调谐器和数字接收器部分。 在另一个实施例中,TV调谐器被实现在第一半导体衬底上,并且数字接收器部分和功率放大器配置在第二半导体衬底上。 然而,两个基板安装在公共载体上,使得电缆调制解调器似乎是用户的单芯片配置。

    Histogram-Based Linearization of Analog-to-Digital Converters
    2.
    发明申请
    Histogram-Based Linearization of Analog-to-Digital Converters 审中-公开
    模数转换器的基于直方图的线性化

    公开(公告)号:US20130085703A1

    公开(公告)日:2013-04-04

    申请号:US13249845

    申请日:2011-09-30

    IPC分类号: G06F17/17 G06F19/00

    CPC分类号: G06F17/17 H03M1/1042 H03M1/12

    摘要: Embodiments provide histogram-based methods and system to estimate the transfer function of an ADC, and subsequently to linearize a non-linear ADC transfer function. Embodiments include blind algorithms that require no a priori knowledge of the input signal distribution. Embodiments can be implemented using cumulative (i.e., cumulative distribution function (CDF)) or non-cumulative (i.e., probability density function (PDF)) histograms. According to embodiments, a non-linear transfer function can be estimated by linearly approximating successive local intervals of the transfer function. Linearly approximated successive local intervals of the transfer function can then be used to fully characterize and closely estimate the transfer function.

    摘要翻译: 实施例提供基于直方图的方法和系统来估计ADC的传递函数,并且随后对非线性ADC传递函数进行线性化。 实施例包括不需要输入信号分布的先验知识的盲算法。 实施例可以使用累积(即,累积分布函数(CDF))或非累积(即,概率密度函数(PDF))直方图来实现。 根据实施例,可以通过线性近似传递函数的连续局部间隔来估计非线性传递函数。 传递函数的线性逼近的连续局部间隔可用于完全表征和密切估计传递函数。

    Apparatus and method for correcting IQ imbalance
    3.
    发明授权
    Apparatus and method for correcting IQ imbalance 有权
    用于校正IQ不平衡的装置和方法

    公开(公告)号:US08208530B2

    公开(公告)日:2012-06-26

    申请号:US11334628

    申请日:2006-01-19

    IPC分类号: H03K5/159

    CPC分类号: H04L27/3863 H03D3/009

    摘要: An apparatus and method for correcting IQ imbalance are presented. An exemplary receiver for processing I and Q signals from a tuner includes: a non-decision directed (NDD) imbalance canceller coupled to receive the I and Q signals, and a decision directed (DD) imbalance canceller coupled to the non-decision directed imbalance canceller. The DD imbalance canceller converges after the NDD imbalance canceller converges, so as to correct IQ imbalances in the receiver. An exemplary method for processing I and Q signals from a tuner includes: (a) converging a NDD imbalance canceller to correct a majority of IQ imbalances, and (b) subsequently converging a DD imbalance canceller to correct a remainder of IQ imbalances not corrected in step (a). The apparatus and method correct frequency-dependent and frequency-independent IQ imbalances.

    摘要翻译: 提出了一种用于校正IQ不平衡的装置和方法。 用于处理来自调谐器的I和Q信号的示例性接收器包括:耦合以接收I和Q信号的非决策导向(NDD)不平衡消除器,以及耦合到非决策导向不平衡的决策导向(DD)不平衡消除器 消费者。 在NDD不平衡消除器收敛之后,DD不平衡消除器收敛,以便纠正接收机中的IQ不平衡。 用于处理来自调谐器的I和Q信号的示例性方法包括:(a)收敛NDD不平衡消除器以校正大多数IQ不平衡,以及(b)随后收敛DD不平衡消除器以校正未校正的IQ不平衡的余数 步骤(a)。 该装置和方法正确的频率依赖和频率无关的IQ失衡。

    Apparatus and method for correcting IQ imbalance
    4.
    发明申请
    Apparatus and method for correcting IQ imbalance 有权
    用于校正IQ不平衡的装置和方法

    公开(公告)号:US20060203901A1

    公开(公告)日:2006-09-14

    申请号:US11334628

    申请日:2006-01-19

    IPC分类号: H03H7/30

    CPC分类号: H04L27/3863 H03D3/009

    摘要: An apparatus and method for correcting IQ imbalance are presented. An exemplary receiver for processing I and Q signals from a tuner includes: a non-decision directed (NDD) imbalance canceller coupled to receive the I and Q signals, and a decision directed (DD) imbalance canceller coupled to the non-decision directed imbalance canceller. The DD imbalance canceller converges after the NDD imbalance canceller converges, so as to correct IQ imbalances in the receiver. An exemplary method for processing I and Q signals from a tuner includes: (a) converging a NDD imbalance canceller to correct a majority of IQ imbalances, and (b) subsequently converging a DD imbalance canceller to correct a remainder of IQ imbalances not corrected in step (a). The apparatus and method correct frequency-dependent and frequency-independent IQ imbalances.

    摘要翻译: 提出了一种用于校正IQ不平衡的装置和方法。 用于处理来自调谐器的I和Q信号的示例性接收器包括:耦合以接收I和Q信号的非决策导向(NDD)不平衡消除器,以及耦合到非决策导向不平衡的决策导向(DD)不平衡消除器 消费者。 在NDD不平衡消除器收敛之后,DD不平衡消除器收敛,以便纠正接收机中的IQ不平衡。 用于处理来自调谐器的I和Q信号的示例性方法包括:(a)收敛NDD不平衡消除器以校正大多数IQ不平衡,以及(b)随后收敛DD不平衡消除器以校正未校正的IQ不平衡的余数 步骤(a)。 该装置和方法正确的频率依赖和频率无关的IQ失衡。

    Integrated set-top box
    5.
    发明申请
    Integrated set-top box 有权
    集成机顶盒

    公开(公告)号:US20060026661A1

    公开(公告)日:2006-02-02

    申请号:US11133237

    申请日:2005-05-20

    IPC分类号: H04N7/173

    摘要: The present invention is an integrated set-top box. In one embodiment, the up-stream path and the down-stream path are integrated on a common semiconductor substrate. The down-stream path can include a TV tuner and a digital receiver portion that is integrated on the common semiconductor substrate with a power amplifier of the up-stream path. In another embodiment, the TV tuner is implemented on a first semiconductor substrate and the digital receiver portion and the power amplifier are configured on a second semiconductor substrate. However, the two substrates are mounted on a common carrier so that the set-top box appears to be a single chip configuration to the user.

    摘要翻译: 本发明是一种集成的机顶盒。 在一个实施例中,上游路径和下游路径被集成在公共半导体衬底上。 下行路径可以包括集成在公共半导体衬底上的TV调谐器和数字接收器部分,其具有上行路径的功率放大器。 在另一个实施例中,TV调谐器被实现在第一半导体衬底上,并且数字接收器部分和功率放大器配置在第二半导体衬底上。 然而,两个基板安装在公共载体上,使得机顶盒看起来是用户的单芯片配置。

    Highly integrated single chip set-top box
    6.
    发明申请
    Highly integrated single chip set-top box 失效
    高度集成的单芯片机顶盒

    公开(公告)号:US20060026657A1

    公开(公告)日:2006-02-02

    申请号:US11187009

    申请日:2005-07-22

    IPC分类号: H04N7/173 H04N7/16

    摘要: A highly integrated set-top box is implemented on a single semiconductor substrate. For instance, an analog RF tuner is implemented on the same substrate with a digital receiver, and audio-video back-end circuits. The single chip set-top box can be used for satellite, cable, internet, or terrestrial TV applications, or other applications. As a result, the substrate area, assembly time, and associated costs per chip are reduced.

    摘要翻译: 高度集成的机顶盒在单个半导体衬底上实现。 例如,模拟RF调谐器在与数字接收机和音频 - 视频后端电路相同的衬底上实现。 单芯片机顶盒可用于卫星,有线,互联网或地面电视应用或其他应用。 结果,减少了每个芯片的基板面积,组装时间和相关成本。

    Compensation for lane imbalance in a multi-lane analog-to-digital converter (ADC)
    7.
    发明授权
    Compensation for lane imbalance in a multi-lane analog-to-digital converter (ADC) 有权
    多通道模数转换器(ADC)中车道不平衡的补偿

    公开(公告)号:US09030341B2

    公开(公告)日:2015-05-12

    申请号:US13553017

    申请日:2012-07-19

    IPC分类号: H03M1/10 H03M1/12

    CPC分类号: H03M1/1052 H03M1/1215

    摘要: Various multi-lane ADCs are disclosed that substantially compensate for impairments present within various signals that result from various impairments, such as phase offset, amplitude offset, and/or DC offset to provide some examples, such that their respective digital output samples accurately represent their respective analog inputs. Generally, the various multi-lane ADCs determine various statistical relationships, such as various correlations to provide an example, between these various signals and various known calibration signals to quantify the phase offset, amplitude offset, and/or DC offset that may be present within the various signals. The various multi-lane ADCs adjust the various signals to substantially compensate for the phase offset, amplitude offset, and/or DC offset based upon these various statistical relationships such that their respective digital output samples accurately represent their respective analog inputs.

    摘要翻译: 公开了各种多通道ADC,其基本上补偿由各种损伤(例如相位偏移,幅度偏移和/或DC偏移)导致的各种信号内存在的损伤,以提供一些示例,使得它们各自的数字输出样本准确地表示它们 各自的模拟输入。 通常,各种多通道ADC确定各种统计关系,例如各种相关性,以提供这些各种信号之间的示例,以及各种已知的校准信号,以量化可能存在的相位偏移,幅度偏移和/或DC偏移 各种信号。 各种多通道ADC基于这些各种统计关系调整各种信号以基本上补偿相位偏移,幅度偏移和/或DC偏移,使得它们各自的数字输出样本精确地表示它们各自的模拟输入。

    Integrated set-top box
    8.
    发明授权
    Integrated set-top box 有权
    集成机顶盒

    公开(公告)号:US08732788B2

    公开(公告)日:2014-05-20

    申请号:US11133237

    申请日:2005-05-20

    IPC分类号: H04N7/16

    摘要: The present invention is an integrated set-top box. In one embodiment, the up-stream path and the down-stream path are integrated on a common semiconductor substrate. The down-stream path can include a TV tuner and a digital receiver portion that is integrated on the common semiconductor substrate with a power amplifier of the up-stream path. In another embodiment, the TV tuner is implemented on a first semiconductor substrate and the digital receiver portion and the power amplifier are configured on a second semiconductor substrate. However, the two substrates are mounted on a common carrier so that the set-top box appears to be a single chip configuration to the user.

    摘要翻译: 本发明是一种集成的机顶盒。 在一个实施例中,上游路径和下游路径被集成在公共半导体衬底上。 下行路径可以包括集成在公共半导体衬底上的TV调谐器和数字接收器部分,其具有上行路径的功率放大器。 在另一个实施例中,TV调谐器被实现在第一半导体衬底上,并且数字接收器部分和功率放大器配置在第二半导体衬底上。 然而,两个基板安装在公共载体上,使得机顶盒看起来是用户的单芯片配置。

    Highly integrated single chip set-top box
    9.
    发明授权
    Highly integrated single chip set-top box 失效
    高度集成的单芯片机顶盒

    公开(公告)号:US08239914B2

    公开(公告)日:2012-08-07

    申请号:US11187009

    申请日:2005-07-22

    IPC分类号: H04N7/16

    摘要: A highly integrated set-top box is implemented on a single semiconductor substrate. For instance, an analog RF tuner is implemented on the same substrate with a digital receiver, and audio-video back-end circuits. The single chip set-top box can be used for satellite, cable, internet, or terrestrial TV applications, or other applications. As a result, the substrate area, assembly time, and associated costs per chip are reduced.

    摘要翻译: 高度集成的机顶盒在单个半导体衬底上实现。 例如,模拟RF调谐器在与数字接收机和音频 - 视频后端电路相同的衬底上实现。 单芯片机顶盒可用于卫星,有线,互联网或地面电视应用或其他应用。 结果,减少了每个芯片的基板面积,组装时间和相关成本。

    Imbalance and distortion cancellation for composite analog to digital converter (ADC)

    公开(公告)号:US20110063148A1

    公开(公告)日:2011-03-17

    申请号:US12949752

    申请日:2010-11-18

    IPC分类号: H03M1/06 H03M1/50

    CPC分类号: H03M1/1033 H03M1/188

    摘要: Imbalance and distortion cancellation for composite analog to digital converter (ADC). Such an ‘ADC’ is implemented using two or more ADCs may be employed for sampling (e.g., quantizing, digitizing, etc.) of an analog (e.g., continuous time) signal in accordance with generating a digital (e.g., discrete time) signal. Using at least two ADCs allows for the accommodation and sampling of various signals having a much broader dynamic range without suffering degradation in signal to noise ratio (SNR). Generally, the signal provided via at least one of the paths corresponding to at least one of the respective ADCs is scaled (e.g., attenuated), so that the various ADCs effectively sample signals of different magnitudes. The ADCs may respectively correspond to different magnitude and/or power levels (e.g., high power, lower power, any intermediary power level, etc.). Various implementations of compensation may be performed along the various paths corresponding to the respective ADCs.