公开(公告)号：US06507899B1

公开(公告)日：2003-01-14

申请号：US09460534

申请日：1999-12-13

Applicant: Klaus Oberlaender ,  Sabeen Randhawa ,  Yannick Martelloni ,  Manfred Henftling ,  Rami Zemach ,  Zohar Peleg ,  Christian Wiedholz ,  Gigy Baror ,  Doron Shoham ,  Oded Trainin ,  Niv Margalit

Inventor： Klaus Oberlaender ,  Sabeen Randhawa ,  Yannick Martelloni ,  Manfred Henftling ,  Rami Zemach ,  Zohar Peleg ,  Christian Wiedholz ,  Gigy Baror ,  Doron Shoham ,  Oded Trainin ,  Niv Margalit

IPC: G06F1208

CPC classification number: G06F12/0215

Abstract: An interface circuit for coupling a data handling unit with a memory unit having control inputs, an address signal input, a data signal input, and a data signal output is described. The interface circuit comprises an address buffer having an input and an output, said input receiving an address signal from said data handling unit, a first multiplexer which couples said memory unit with either said output of said address buffer or with said address signal, a data buffer having an input and an output, said input receiving a data signal from said data handling unit and said output being coupled with said memory data input, a second multiplexer for selecting either said memory data signal output or said data buffer output, and a comparator for comparing said address signal with the signal from said address buffer output, generating a control signal which controls said second multiplexer.

Abstract translation: 描述了一种用于将数据处理单元与具有控制输入，地址信号输入，数据信号输入和数据信号输出的存储单元耦合的接口电路。 接口电路包括具有输入和输出的地址缓冲器，所述输入接收来自所述数据处理单元的地址信号，第一多路复用器将所述存储单元与所述地址缓冲器的所述输出或所述地址信号相耦合，数据 具有输入和输出的缓冲器，所述输入接收来自所述数据处理单元的数据信号，并且所述输出与所述存储器数据输入耦合;第二多路复用器，用于选择所述存储器数据信号输出或所述数据缓冲器输出;以及比较器 用于将所述地址信号与来自所述地址缓冲器输出的信号进行比较，产生控制所述第二多路复用器的控制信号。