公开(公告)号：US09418940B2

公开(公告)日：2016-08-16

申请号：US12110181

申请日：2008-04-25

申请人： Masataka Hoshino ,  Masahiko Harayama ,  Koji Taya ,  Naomi Masuda ,  Masanori Onodera ,  Ryota Fukuyama

发明人： Masataka Hoshino ,  Masahiko Harayama ,  Koji Taya ,  Naomi Masuda ,  Masanori Onodera ,  Ryota Fukuyama

IPC分类号： H01L23/02 ,  H01L23/538 ,  H01L25/10 ,  H01L25/00 ,  H01L23/31 ,  H01L23/00

CPC分类号： H01L23/5389 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Methods and structures for stack type semiconductor packaging are disclosed. In one embodiment, a semiconductor device includes a semiconductor chip mounted onto a substrate, a first resin molding portion formed on the substrate for sealing the semiconductor chip, and a through metal mounted on the substrate so as to pierce the first resin molding portion around the semiconductor chip. The semiconductor device further comprises an upper metal electrically coupled with the through metal and mounted on the first resin molding portion to extend from the through metal toward the semiconductor chip along an upper surface of the first resin molding portion, where the through metal and the upper metal are formed into an integral structure.

摘要翻译： 公开了堆叠型半导体封装的方法和结构。 在一个实施例中，半导体器件包括安装在基板上的半导体芯片，形成在用于密封半导体芯片的基板上的第一树脂模塑部分和安装在基板上的贯穿金属，以便穿过第一树脂模制部分 半导体芯片 所述半导体器件还包括与所述贯通金属电耦合并且安装在所述第一树脂模制部分上的上金属，以沿着所述第一树脂模塑部分的上表面从所述贯穿金属向所述半导体芯片延伸，其中所述通孔金属和所述上部 金属形成为一体结构。

公开(公告)号：US07605457B2

公开(公告)日：2009-10-20

申请号：US11636155

申请日：2006-12-07

申请人： Masataka Hoshino ,  Junichi Kasai ,  Kouichi Meguro ,  Ryota Fukuyama ,  Yasuhiro Shinma ,  Koji Taya ,  Masanori Onodera ,  Naomi Masuda

发明人： Masataka Hoshino ,  Junichi Kasai ,  Kouichi Meguro ,  Ryota Fukuyama ,  Yasuhiro Shinma ,  Koji Taya ,  Masanori Onodera ,  Naomi Masuda

IPC分类号： H01L23/02 ,  H01L23/48

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L23/49575 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/05548 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： The present invention provides a semiconductor device that includes: stacked semiconductor chips, each semiconductor chip including a semiconductor substrate and a first insulating layer that is provided on side faces of the semiconductor substrate and has concavities formed on side faces thereof; first metal layers that are provided in center portions of inner side faces of the concavities; and second metal layers that are provided in the concavities and are connected to the first metal layers formed on each semiconductor chip. The present invention also provides a method of manufacturing the semiconductor device.

摘要翻译： 本发明提供一种半导体器件，其包括堆叠的半导体芯片，每个半导体芯片包括半导体衬底和设置在半导体衬底的侧面上且在其侧面上形成有凹部的第一绝缘层; 设置在凹部的内侧面的中心部的第一金属层; 以及第二金属层，其设置在凹部中并连接到形成在每个半导体芯片上的第一金属层。 本发明还提供一种半导体器件的制造方法。

公开(公告)号：US06734084B1

公开(公告)日：2004-05-11

申请号：US10603982

申请日：2003-06-26

申请人： Yoshihiko Nemoto ,  Masataka Hoshino ,  Hitoshi Yonemura

发明人： Yoshihiko Nemoto ,  Masataka Hoshino ,  Hitoshi Yonemura

IPC分类号： H01L21326

CPC分类号： H01L21/76898 ,  Y10S438/928 ,  Y10S438/977

摘要： A method for manufacturing a semiconductor device is capable of controlling amounts of protrusion of penetration electrodes (5) from a rear surface of a semiconductor substrate (4) in a easy and accurate manner. Recesses (7) are formed in a substrate proper (6) that has a semiconductor circuit (2) formed on one surface thereof, and an insulation film (8) is formed on an inner wall surface of each of the recesses (7). A conductive material is filled into the recesses (7) through the insulation films (8) to form embedded electrodes (15) that constitute the penetration electrodes (5). A rear side of the substrate proper (6) is re moved until one end face of each of the embedded electrodes (15) is exposed, thereby to form the penetration electrodes (5). The rear surface of the substrate proper (6) is anodized to form an anodic oxide film (9), which is then removed by etching to form the semiconductor substrate (4).

摘要翻译： 半导体器件的制造方法能够容易且准确地控制从半导体衬底（4）的后表面突出的穿透电极（5）的量。 凹部（7）形成在其一面形成有半导体电路（2）的基板（6）上，在各凹部（7）的内壁面上形成有绝缘膜（8）。 通过绝缘膜（8）将导电材料填充到凹部（7）中，以形成构成穿透电极（5）的嵌入式电极（15）。 衬底本体（6）的后侧被移动直到每个嵌入电极（15）的一个端面露出，从而形成穿透电极（5）。 衬底本体（6）的后表面被阳极化以形成阳极氧化膜（9），然后通过蚀刻去除以形成半导体衬底（4）。

公开(公告)号：US06440844B1

公开(公告)日：2002-08-27

申请号：US09111799

申请日：1998-07-08

申请人： Hideo Takagi ,  Kiyoshi Izumi ,  Wataru Futo ,  Satoshi Otsuka ,  Shigetaka Uji ,  Masataka Hoshino ,  Yukihiro Satoh ,  Koji Endo ,  Yuzuru Ohta ,  Nobuhiro Misawa

发明人： Hideo Takagi ,  Kiyoshi Izumi ,  Wataru Futo ,  Satoshi Otsuka ,  Shigetaka Uji ,  Masataka Hoshino ,  Yukihiro Satoh ,  Koji Endo ,  Yuzuru Ohta ,  Nobuhiro Misawa

IPC分类号： H01L214763

CPC分类号： H01L21/7684 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76835 ,  H01L21/76882 ,  H01L23/5226 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： The method of manufacturing a semiconductor device includes the steps of forming copper wiring; reducing an oxide film on the surface of the copper wiring by heating the copper wiring to a temperature in a range of 250° C.-450° C. under reductive gas or by treating the copper wiring in plasma of reductive gas; and then forming a film of a material not containing oxygen on the copper wiring without exposing the copper wiring to external atmosphere, and can provide a semiconductor device with good copper wiring.

摘要翻译： 制造半导体器件的方法包括形成铜布线的步骤; 通过在还原性气体下将铜布线加热到250℃-450℃的温度，或者通过处理还原气体的等离子体中的铜布线来减少铜布线表面上的氧化膜; 然后在铜布线上形成不含氧的材料的膜，而不将铜布线暴露于外部大气，并且可以提供具有良好铜布线的半导体器件。

公开(公告)号：US20120025364A1

公开(公告)日：2012-02-02

申请号：US13252714

申请日：2011-10-04

申请人： Masataka HOSHINO ,  Junichi KASAI ,  Kouichi MEGURO ,  Ryota FUKUYAMA ,  Yasuhiro SHINMA ,  Koji TAYA ,  Masanori ONODERA ,  Naomi MASUDA

发明人： Masataka HOSHINO ,  Junichi KASAI ,  Kouichi MEGURO ,  Ryota FUKUYAMA ,  Yasuhiro SHINMA ,  Koji TAYA ,  Masanori ONODERA ,  Naomi MASUDA

IPC分类号： H01L23/02

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L23/49575 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/05548 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： The present invention provides a semiconductor device that includes: stacked semiconductor chips, each semiconductor chip including a semiconductor substrate and a first insulating layer that is provided on side faces of the semiconductor substrate and has concavities formed on side faces thereof; first metal layers that are provided in center portions of inner side faces of the concavities; and second metal layers that are provided in the concavities and are connected to the first metal layers formed on each semiconductor chip. The present invention also provides a method of manufacturing the semiconductor device.

摘要翻译： 本发明提供一种半导体器件，其包括堆叠的半导体芯片，每个半导体芯片包括半导体衬底和设置在半导体衬底的侧面上且在其侧面上形成有凹部的第一绝缘层; 设置在凹部的内侧面的中心部的第一金属层; 以及第二金属层，其设置在凹部中并连接到形成在每个半导体芯片上的第一金属层。 本发明还提供一种半导体器件的制造方法。

公开(公告)号：US08030179B2

公开(公告)日：2011-10-04

申请号：US12556408

申请日：2009-09-09

申请人： Masataka Hoshino ,  Junichi Kasai ,  Kouichi Meguro ,  Ryota Fukuyama ,  Yasuhiro Shinma ,  Koji Taya ,  Masanori Onodera ,  Naomi Masuda

发明人： Masataka Hoshino ,  Junichi Kasai ,  Kouichi Meguro ,  Ryota Fukuyama ,  Yasuhiro Shinma ,  Koji Taya ,  Masanori Onodera ,  Naomi Masuda

IPC分类号： H01L21/00 ,  H01L21/4763

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L23/49575 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/05548 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： The present invention provides a semiconductor device that includes: stacked semiconductor chips, each semiconductor chip including a semiconductor substrate and a first insulating layer that is provided on side faces of the semiconductor substrate and has concavities formed on side faces thereof; first metal layers that are provided in center portions of inner side faces of the concavities; and second metal layers that are provided in the concavities and are connected to the first metal layers formed on each semiconductor chip. The present invention also provides a method of manufacturing the semiconductor device.

摘要翻译： 本发明提供一种半导体器件，其包括堆叠的半导体芯片，每个半导体芯片包括半导体衬底和设置在半导体衬底的侧面上且在其侧面上形成有凹部的第一绝缘层; 设置在凹部的内侧面的中心部的第一金属层; 以及第二金属层，其设置在凹部中并连接到形成在每个半导体芯片上的第一金属层。 本发明还提供一种半导体器件的制造方法。

公开(公告)号：US07750478B2

公开(公告)日：2010-07-06

申请号：US11808667

申请日：2007-06-12

申请人： Koujiro Kameyama ,  Akira Suzuki ,  Yoshio Okayama ,  Mitsuo Umemoto ,  Kenji Takahashi ,  Hiroshi Terao ,  Masataka Hoshino

发明人： Koujiro Kameyama ,  Akira Suzuki ,  Yoshio Okayama ,  Mitsuo Umemoto ,  Kenji Takahashi ,  Hiroshi Terao ,  Masataka Hoshino

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/12 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/0508 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05548 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2224/05599

摘要： A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate through an insulation layer made of silicon oxide, silicon nitride or the like, a supporting plate bonded to a top surface of the semiconductor substrate to cover the pad electrode and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein an aperture of the via hole at a portion close to the pad electrode is larger than an aperture of the via hole at a portion close to the back surface of the semiconductor substrate.

摘要翻译： 提供了可靠性提高的半导体器件及其制造方法。 本发明的半导体器件包括半导体衬底，通过由氧化硅，氮化硅等形成的绝缘层在半导体衬底上形成的焊盘电极，接合到半导体衬底的顶表面以覆盖衬垫的支撑板 电极和形成在半导体衬底中并从半导体衬底的背表面延伸到焊盘电极的通孔，其中靠近焊盘电极的部分处的通孔的孔径大于通孔的孔径 靠近半导体衬底的背面的部分。

公开(公告)号：US07732925B2

公开(公告)日：2010-06-08

申请号：US11055707

申请日：2005-02-11

申请人： Yoshio Okayama ,  Akira Suzuki ,  Koujiro Kameyama ,  Mitsuo Umemoto ,  Kenji Takahashi ,  Hiroshi Terao ,  Masataka Hoshino

发明人： Yoshio Okayama ,  Akira Suzuki ,  Koujiro Kameyama ,  Mitsuo Umemoto ,  Kenji Takahashi ,  Hiroshi Terao ,  Masataka Hoshino

IPC分类号： H01L29/40

CPC分类号： H01L24/12 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/0508 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05548 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2224/05599

摘要： A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate through an insulation layer made of silicon oxide, silicon nitride or the like, a supporting plate bonded to a top surface of the semiconductor substrate to cover the pad electrode and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein an aperture of the via hole at a portion close to the pad electrode is larger than an aperture of the via hole at a portion close to the back surface of the semiconductor substrate.

摘要翻译： 提供了可靠性提高的半导体器件及其制造方法。 本发明的半导体器件包括半导体衬底，通过由氧化硅，氮化硅等形成的绝缘层在半导体衬底上形成的焊盘电极，接合到半导体衬底的顶表面以覆盖衬垫的支撑板 电极和形成在半导体衬底中并从半导体衬底的背表面延伸到焊盘电极的通孔，其中靠近焊盘电极的部分处的通孔的孔径大于通孔的孔径 靠近半导体衬底的背面的部分。

公开(公告)号：US07224859B2

公开(公告)日：2007-05-29

申请号：US11062663

申请日：2005-02-23

申请人： Masataka Hoshino ,  Tomotoshi Sato

发明人： Masataka Hoshino ,  Tomotoshi Sato

IPC分类号： G02B6/12

CPC分类号： H04Q11/0005 ,  H01L2224/16225 ,  H04Q2011/0058

摘要： The opto-electronic integrated circuit device comprises an optical switch 18 provided in an input port 12a of a first input/output port 36a over a substrate 10 and changing over an optical path of an optical signal inputted from the input port 12a and outputting the optical signal through one of a plurality of output terminals 24a–24d; an opto-electric conversion element 26a optically connected to one of the plural output terminals of the optical switch 18, and converting the optical signal outputted from one of the output terminals 24a–24d of the optical switch 18 to an electric signal and inputting the converted electric signal in a semiconductor element 30 mounted over the substrate 10; and an optical waveguide 50 optically connected to another of the plural output terminal 24d of the optical switch 18 and outputting the optical signal outputted from said another output terminal 24d of the optical switch 18 through an output port 32b of a second input/output port 36b over the substrate 10.

摘要翻译： 光电集成电路装置包括设置在基板10上的第一输入/输出端口36a的输入端口12a中的光开关18，并且改变从输入端口12a输入的光信号的光路， 通过多个输出端子24a-24d之一输出光信号; 光电转换元件26，光学连接到光开关18的多个输出端之一，并将从光开关18的输出端子24a-24d输出的光信号转换为电信号， 在安装在基板10上的半导体元件30中输入转换后的电信号; 以及与光开关18的多个输出端子24d的另一个光学连接的光波导路50，并通过第二输入/输出端口的输出端口32b输出从光开关18的另一输出端子24d输出的光信号， 输出端口36b。

公开(公告)号：US20050189637A1

公开(公告)日：2005-09-01

申请号：US11055707

申请日：2005-02-11

申请人： Yoshio Okayama ,  Akira Suzuki ,  Koujiro Kameyama ,  Mitsuo Umemoto ,  Kenji Takahashi ,  Hiroshi Terao ,  Masataka Hoshino

发明人： Yoshio Okayama ,  Akira Suzuki ,  Koujiro Kameyama ,  Mitsuo Umemoto ,  Kenji Takahashi ,  Hiroshi Terao ,  Masataka Hoshino

IPC分类号： H01L23/52 ,  H01L21/3205 ,  H01L21/60 ,  H01L21/768 ,  H01L23/12 ,  H01L23/31 ,  H01L23/48 ,  H01L23/495

CPC分类号： H01L24/12 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/0508 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05548 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2224/05599

摘要： A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate through an insulation layer made of silicon oxide, silicon nitride or the like, a supporting plate bonded to a top surface of the semiconductor substrate to cover the pad electrode and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein an aperture of the via hole at a portion close to the pad electrode is larger than an aperture of the via hole at a portion close to the back surface of the semiconductor substrate.

摘要翻译： 提供了可靠性提高的半导体器件及其制造方法。 本发明的半导体器件包括半导体衬底，通过由氧化硅，氮化硅等形成的绝缘层在半导体衬底上形成的焊盘电极，接合到半导体衬底的顶表面以覆盖衬垫的支撑板 电极和形成在半导体衬底中并从半导体衬底的背表面延伸到焊盘电极的通孔，其中靠近焊盘电极的部分处的通孔的孔径大于通孔的孔径 靠近半导体衬底的背表面的部分。