公开(公告)号：US07847340B2

公开(公告)日：2010-12-07

申请号：US11963400

申请日：2007-12-21

申请人： Kenichi Fujii ,  Masatomi Okanishi

发明人： Kenichi Fujii ,  Masatomi Okanishi

IPC分类号： H01L29/792 ,  H01L21/336

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： The present invention provides a semiconductor device and a method of manufacturing the semiconductor device, the semiconductor device including: ONO films that are formed on a semiconductor substrate and include trapping layers; word lines that are formed on the ONO films; and silicon oxide layers that are formed at portions on the semiconductor substrate, the portions being located between the word lines, the silicon oxide layers being located between the trapping layers.

摘要翻译： 本发明提供一种半导体器件和半导体器件的制造方法，该半导体器件包括：形成在半导体衬底上并包括俘获层的ONO膜; 在ONO膜上形成的字线; 以及形成在所述半导体衬底上的部分处的所述氧化硅层，所述部分位于所述字线之间，所述氧化硅层位于所述捕获层之间。

公开(公告)号：US20100001333A1

公开(公告)日：2010-01-07

申请号：US12543404

申请日：2009-08-18

申请人： Masaya Hosaka ,  Masatomi Okanishi

发明人： Masaya Hosaka ,  Masatomi Okanishi

IPC分类号： H01L29/792 ,  H01L21/336

CPC分类号： H01L29/792 ,  H01L27/115 ,  H01L27/11568

摘要： The present invention provides semiconductor device and a fabrication method therefor. The semiconductor device includes trenches (11) formed in a semiconductor substrate (10), first ONO films (18) provided on both side surfaces of the trenches, and first word lines (22) provided on side surfaces of the first ONO films (18) and running in a length direction of the trenches (11). According to the present invention, it is possible to provide a semiconductor deice and a fabrication method therefor, in which higher memory capacity can be achieved.

摘要翻译： 本发明提供半导体器件及其制造方法。 半导体器件包括形成在半导体衬底（10）中的沟槽（11），设置在沟槽的两个侧表面上的第一ONO膜（18）和设置在第一ONO膜（18）的侧表面上的第一字线 ）并在沟槽（11）的长度方向上运行。 根据本发明，可以提供一种半导体器件及其制造方法，其中可以实现更高的存储容量。

公开(公告)号：US20080064181A1

公开(公告)日：2008-03-13

申请号：US11977034

申请日：2007-10-23

申请人： Masatomi Okanishi

发明人： Masatomi Okanishi

IPC分类号： H01L21/71

CPC分类号： H01L27/11526 ,  H01L27/115 ,  H01L27/11534 ,  H01L27/11568 ,  H01L29/1037 ,  H01L29/42368 ,  H01L29/66833 ,  H01L29/7887 ,  H01L29/7923

摘要： A semiconductor device includes a substrate having a pair of first diffused regions, and a gate including an oxide film provided on the substrate, and a charge storage layer provided on the oxide film, the charge storage layer being an electrical insulator capable of storing charges in bit areas. The oxide film has first portions related to the bit areas and a second portion that is located between the bit areas and is thicker than the first potions. The first portions serve as tunneling oxide portions, while the second portion allows reduced tunneling.

公开(公告)号：US20120315750A1

公开(公告)日：2012-12-13

申请号：US13323538

申请日：2011-12-12

申请人： Masatomi Okanishi

发明人： Masatomi Okanishi

IPC分类号： H01L21/283

CPC分类号： H01L27/11568 ,  H01L21/28282 ,  H01L27/115

摘要： A semiconductor device includes bit lines (12) that are provided in a semiconductor substrate (10) an ONO film (14) that is provided on the semiconductor substrate; word lines that are provided on the ONO film (14) and extend in a width direction of the bit lines (12); and a dummy layer (44) that extends in the width direction of the bit lines (12) and is provided in a bit-line contact region (40) having contact holes formed to connect the bit lines (12) with wiring layers (34). In accordance with the present invention, the proximity effect at the time of word line formation can be restrained, and the variation in the widths of the word lines can be made smaller, or current leakage between the bit lines and the semiconductor substrate can be restrained.

摘要翻译： 半导体器件包括设置在半导体衬底（10）中的设置在半导体衬底上的ONO膜（14）的位线（12） 设置在ONO膜（14）上并在位线（12）的宽度方向上延伸的字线; 以及在位线（12）的宽度方向上延伸并设置在具有形成为将位线（12）与布线层（34）连接的接触孔的位线接触区域（40）中的虚设层（44） ）。 根据本发明，可以抑制字线形成时的邻近效应，并且可以使字线宽度的变化更小，或者可以抑制位线和半导体衬底之间的电流泄漏 。

公开(公告)号：US08097518B2

公开(公告)日：2012-01-17

申请号：US12898968

申请日：2010-10-06

申请人： Masatomi Okanishi

发明人： Masatomi Okanishi

IPC分类号： H01L21/336

CPC分类号： H01L27/115 ,  H01L27/11568 ,  Y10S257/903

摘要： There is provided a semiconductor device including a semiconductor substrate (10), a high concentration diffusion region (22) formed within the semiconductor substrate (10), a first low concentration diffusion region (24) that has a lower impurity concentration than the high concentration diffusion region (22) and is provided under the high concentration diffusion region (22), and a bit line(30) that includes the high concentration diffusion region (22) and the first low concentration diffusion region (24) and serves as a source region and a drain region, and a manufacturing method therefor. Reduction of source-drain breakdown voltage of the transistor is suppressed, and a low-resistance bit line can be formed. Thus, a semiconductor device that can miniaturize memory cells and a manufacturing method therefor can be provided.

摘要翻译： 提供了一种半导体器件，包括半导体衬底（10），形成在半导体衬底（10）内的高浓度扩散区（22），具有比高浓度低的杂质浓度的第一低浓度扩散区（24） 扩散区域（22），设置在高浓度扩散区域（22）的下方，以及包含高浓度扩散区域（22）和第一低浓度扩散区域（24）的位线（30） 区域和漏极区域及其制造方法。 抑制晶体管的源极 - 漏极击穿电压的降低，并且可以形成低电阻位线。 因此，可以提供可以使存储单元小型化的半导体器件及其制造方法。

公开(公告)号：US07825448B2

公开(公告)日：2010-11-02

申请号：US12192945

申请日：2008-08-15

申请人： Masatomi Okanishi ,  Yoshihiro Mikasa ,  Hiroshi Murai

发明人： Masatomi Okanishi ,  Yoshihiro Mikasa ,  Hiroshi Murai

IPC分类号： H01L27/108

CPC分类号： H01L27/11568 ,  H01L29/66833 ,  H01L29/792

摘要： A semiconductor device and a method for manufacturing thereof are provided. The semiconductor device includes two epitaxial semiconductor layers formed on a semiconductor substrate, bit lines formed on upper portions of the two epitaxial semiconductor layers, and a charge storage layer formed on the semiconductor substrate between the two epitaxial semiconductor layers.

摘要翻译： 提供半导体器件及其制造方法。 半导体器件包括形成在半导体衬底上的两个外延半导体层，形成在两个外延半导体层的上部的位线以及形成在两个外延半导体层之间的半导体衬底上的电荷存储层。

公开(公告)号：US20070052017A1

公开(公告)日：2007-03-08

申请号：US11414646

申请日：2006-04-27

申请人： Masatomi Okanishi

发明人： Masatomi Okanishi

IPC分类号： H01L29/76

CPC分类号： H01L27/115 ,  H01L27/11568 ,  Y10S257/903

摘要： There is provided a semiconductor device including a semiconductor substrate (10), a high concentration diffusion region (22) formed within the semiconductor substrate (10), a first low concentration diffusion region (24) that has a lower impurity concentration than the high concentration diffusion region (22) and is provided under the high concentration diffusion region (22), and a bit line(30) that includes the high concentration diffusion region (22) and the first low concentration diffusion region (24) and serves as a source region and a drain region, and a manufacturing method therefor. Reduction of source-drain breakdown voltage of the transistor is suppressed, and a low-resistance bit line can be formed. Thus, a semiconductor device that can miniaturize memory cells and a manufacturing method therefor can be provided.

摘要翻译： 提供了一种半导体器件，包括半导体衬底（10），形成在半导体衬底（10）内的高浓度扩散区（22），具有比高浓度低的杂质浓度的第一低浓度扩散区（24） 扩散区域（22），设置在高浓度扩散区域（22）的下方，以及包含高浓度扩散区域（22）和第一低浓度扩散区域（24）的位线（30） 区域和漏极区域及其制造方法。 抑制晶体管的源极 - 漏极击穿电压的降低，并且可以形成低电阻位线。 因此，可以提供可以使存储单元小型化的半导体器件及其制造方法。

公开(公告)号：US20060281242A1

公开(公告)日：2006-12-14

申请号：US11363792

申请日：2006-02-28

申请人： Naoki Takeguchi ,  Yuji Mizuguchi ,  Masatomi Okanishi ,  Tsukasa Takamatsu

发明人： Naoki Takeguchi ,  Yuji Mizuguchi ,  Masatomi Okanishi ,  Tsukasa Takamatsu

IPC分类号： H01L21/8238 ,  H01L29/94 ,  H01L21/20

CPC分类号： H01L27/11568 ,  H01L27/115

摘要： A semiconductor device of the present invention includes a semiconductor substrate (10) having a bit line (14), an ONO film (16) that is provided on the semiconductor substrate (10) and has an opening (46), an interlayer insulating film (30) that is provided on the ONO film (16) and has a contact hole (40) connected to the bit line (14) and provided in the opening (46), and an insulation layer (44) provided between and separating the ONO film (16) and the contact hole (40). In forming the contact hole (40) in the interlayer insulating film (30), the ONO film (16) being provided separately from the contact hole (40) prevents the damage region from being created in the ONO film (16). This makes it possible to suppress charge loss from the trapping layer due to the damage region and provide a highly reliable semiconductor device.

摘要翻译： 本发明的半导体器件包括具有位线（14）的半导体衬底（10），设置在半导体衬底（10）上并具有开口（46）的ONO膜（16），层间绝缘膜 （30），其设置在所述ONO膜（16）上并具有连接到所述位线（14）并设置在所述开口（46）中的接触孔（40），以及绝缘层（44） ONO膜（16）和接触孔（40）。 在层间绝缘膜（30）中形成接触孔（40）时，与接触孔（40）分开设置的ONO膜（16）防止在ONO膜（16）中产生损伤区域。 这使得可以抑制由于损坏区域而导致的俘获层的电荷损失，并提供高可靠性的半导体器件。

公开(公告)号：US20120083086A1

公开(公告)日：2012-04-05

申请号：US13323579

申请日：2011-12-12

申请人： Masatomi OKANISHI

发明人： Masatomi OKANISHI

IPC分类号： H01L21/336

CPC分类号： H01L27/115 ,  H01L27/11568 ,  Y10S257/903

摘要： There is provided a semiconductor device including a semiconductor substrate (10), a high concentration diffusion region (22) formed within the semiconductor substrate (10), a first low concentration region (24) that has a lower impurity concentration than the high concentration diffusion region (22) and is provided under the high concentration diffusion region (22), and a bit line (30) that includes the high concentration diffusion region (22) and the first low concentration diffusion region (24) and serves as a source region and a drain region, and a manufacturing method therefor. Reduction of source-drain breakdown voltage of the transistor is suppressed, and a low-resistance bit line can be formed. Thus, a semiconductor device that can miniaturize memory cells and a manufacturing method therefor can be provided.

摘要翻译： 提供一种半导体器件，包括半导体衬底（10），形成在半导体衬底（10）内的高浓度扩散区（22），具有比高浓度扩散的杂质浓度低的第一低浓度区（24） 区域（22），并且设置在高浓度扩散区域（22）的下方，以及包括高浓度扩散区域（22）和第一低浓度扩散区域（24）的位线（30），并且用作源区域 和漏极区域及其制造方法。 抑制晶体管的源极 - 漏极击穿电压的降低，并且可以形成低电阻位线。 因此，可以提供可以使存储单元小型化的半导体器件及其制造方法。

公开(公告)号：US09472563B2

公开(公告)日：2016-10-18

申请号：US13323538

申请日：2011-12-12

申请人： Masatomi Okanishi

发明人： Masatomi Okanishi

IPC分类号： H01L21/3205 ,  H01L21/4763 ,  H01L27/115 ,  H01L21/28

CPC分类号： H01L27/11568 ,  H01L21/28282 ,  H01L27/115

摘要： A semiconductor device includes bit lines (12) that are provided in a semiconductor substrate (10) an ONO film (14) that is provided on the semiconductor substrate; word lines that are provided on the ONO film (14) and extend in a width direction of the bit lines (12); and a dummy layer (44) that extends in the width direction of the bit lines (12) and is provided in a bit-line contact region (40) having contact holes formed to connect the bit lines (12) with wiring layers (34). In accordance with the present invention, the proximity effect at the time of word line formation can be restrained, and the variation in the widths of the word lines can be made smaller, or current leakage between the bit lines and the semiconductor substrate can be restrained.

摘要翻译： 半导体器件包括设置在半导体衬底（10）中的设置在半导体衬底上的ONO膜（14）的位线（12） 设置在ONO膜（14）上并在位线（12）的宽度方向上延伸的字线; 以及在位线（12）的宽度方向上延伸并设置在具有形成为将位线（12）与布线层（34）连接的接触孔的位线接触区域（40）中的虚设层（44） ）。 根据本发明，可以抑制字线形成时的邻近效应，并且可以使字线宽度的变化更小，或者可以抑制位线和半导体衬底之间的电流泄漏 。