公开(公告)号：US20150056764A1

公开(公告)日：2015-02-26

申请号：US14479223

申请日：2014-09-05

申请人： David F. Brown ,  Miroslav Micovic

发明人： David F. Brown ,  Miroslav Micovic

IPC分类号： H01L29/205 ,  H01L29/20 ,  H01L29/66

CPC分类号： H01L29/205 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/42316 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/7783

摘要： A device and a method of making said wherein the device wherein the device has a group III-nitride buffer deposited on a substrate; and a group III-nitride heterostructure disposed on a surface of the group III-nitride buffer, wherein the group III-nitride heterostructure has a group III-nitride channel and a group III-nitride barrier layer disposed on a surface of the group III-nitride channel, the group III-nitride barrier layer including Al as one of its constituent group III elements, the Al having a mole fraction which varies at least throughout a portion of said group III-nitride barrier layer.

摘要翻译： 一种制造所述装置和方法，其中所述装置其中所述装置具有沉积在基板上的III族氮化物缓冲层; 和III族氮化物异质结构，其中所述III族氮化物异质结构具有III族氮化物沟道和III族氮化物阻挡层，所述III族氮化物阻挡层设置在所述III族氮化物缓冲层的表面上， 氮化物沟道，III族氮化物阻挡层包括Al作为其组成III族元素之一，Al具有至少在所述III族氮化物阻挡层的一部分上变化的摩尔分数。

公开(公告)号：US08860091B2

公开(公告)日：2014-10-14

申请号：US13448348

申请日：2012-04-16

申请人： David F. Brown ,  Miroslav Micovic

发明人： David F. Brown ,  Miroslav Micovic

IPC分类号： H01L31/072

CPC分类号： H01L29/205 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/42316 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/7783

摘要： A device and a method of making said wherein the device wherein the device has a group III-nitride buffer deposited on a substrate; and a group III-nitride heterostructure disposed on a surface of the group III-nitride buffer, wherein the group III-nitride heterostructure has a group III-nitride channel and a group III-nitride barrier layer disposed on a surface of the group III-nitride channel, the group III-nitride barrier layer including Al as one of its constituent group III elements, the Al having a mole fraction which varies at least throughout a portion of said group III-nitride barrier layer.

摘要翻译： 一种制造所述装置和方法，其中所述装置其中所述装置具有沉积在基板上的III族氮化物缓冲层; 和III族氮化物异质结构，其中所述III族氮化物异质结构具有III族氮化物沟道和III族氮化物阻挡层，所述III族氮化物阻挡层设置在所述III族氮化物缓冲层的表面上， 氮化物沟道，III族氮化物阻挡层包括Al作为其组成III族元素之一，Al具有至少在所述III族氮化物阻挡层的一部分上变化的摩尔分数。

公开(公告)号：US08368119B1

公开(公告)日：2013-02-05

申请号：US13111771

申请日：2011-05-19

申请人： Louis Luh ,  Keh-Chung Wang ,  Wah S. Wong ,  Miroslav Micovic ,  David Chow ,  Don Hitko

发明人： Louis Luh ,  Keh-Chung Wang ,  Wah S. Wong ,  Miroslav Micovic ,  David Chow ,  Don Hitko

IPC分类号： H01L29/66

CPC分类号： H01L29/7787 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/0629 ,  H01L29/08 ,  H01L29/872

摘要： A process for fabricating an integrated group III nitride structure comprising high electron mobility transistors (HEMTs) and Schottky diodes, and the resulting structure, are disclosed. Integration of vertical junction Schottky diodes is enabled, and the parasitic capacitance and resistance as well as the physical size of the diode are minimized. A process for fabricating an integrated group III nitride structure comprising double-heterostructure field effect transistors (DHFETs) and Schottky diodes and the resulting structure are also disclosed.

摘要翻译： 公开了一种用于制造包括高电子迁移率晶体管（HEMT）和肖特基二极管的集成III族氮化物结构的方法及其结果。 使得垂直结肖特基二极管的集成成为可能，并且寄生电容和电阻以及二极管的物理尺寸最小化。 还公开了一种制造包括双异质结构场效应晶体管（DHFET）和肖特基二极管的集成III族氮化物结构的方法及其结果。

公开(公告)号：US06894325B2

公开(公告)日：2005-05-17

申请号：US10453173

申请日：2003-06-03

申请人： Miroslav Micovic ,  Daniel P. Docter

发明人： Miroslav Micovic ,  Daniel P. Docter

IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L21/331 ,  H01L21/338 ,  H01L29/45 ,  H01L29/737 ,  H01L29/778 ,  H01L29/812 ,  H01L31/072 ,  H01L31/109

CPC分类号： B82Y15/00 ,  H01L21/28575 ,  H01L29/452

摘要： A method of reducing the specific contact resistivity of a metal to semiconductor interface between a metal contact and an InP semiconductor compound. The method includes the step of increasing the amount of the group V element (P) in the semiconductor compound so that the semiconductor compound is non-stoichiometric having an excess concentration of the group V element in an amount of at least 0.1% above stoichiometric levels.

摘要翻译： 一种降低金属与InP半导体化合物之间的金属与半导体界面的比接触电阻率的方法。 该方法包括增加半导体化合物中的V族元素（P）的量的步骤，使半导体化合物的非化学计量比V族元素的过量浓度高于化学计量值的至少0.1％ 。

公开(公告)号：US08686473B1

公开(公告)日：2014-04-01

申请号：US12792529

申请日：2010-06-02

申请人： Miroslav Micovic ,  Andrea Corrion ,  Keisuke Shinohara ,  Peter J Willadsen ,  Shawn D Burnham ,  Hooman Kazemi ,  Paul B Hashimoto

发明人： Miroslav Micovic ,  Andrea Corrion ,  Keisuke Shinohara ,  Peter J Willadsen ,  Shawn D Burnham ,  Hooman Kazemi ,  Paul B Hashimoto

IPC分类号： H01L29/15 ,  H01L31/0256 ,  H01L29/66 ,  H01L31/102

CPC分类号： H01L29/66916 ,  H01L29/0891 ,  H01L29/1029 ,  H01L29/2003 ,  H01L29/42376 ,  H01L29/66462 ,  H01L29/7787

摘要： The interface resistance between the source/drain and gate of an HFET may be significantly reduced by engineering the bandgap of the 2DEG outside a gate region such that the charge density is substantially increased. The resistance may be further reduced by using an n+GaN Cap layer over the channel layer and barrier layer such that a horizontal surface of the barrier layer beyond the gate region is covered by the n+GaN Cap layer. This technique is applicable to depletion and enhancement mode HFETs.

摘要翻译： 通过在栅极区域之外设计2DEG的带隙，使得电荷密度显着增加，可以显着降低HFET的源极/漏极和栅极之间的界面电阻。 通过在沟道层和阻挡层上使用n + GaN帽层可以进一步降低电阻，使得超过栅极区域的势垒层的水平表面被n + GaN帽层覆盖。 该技术适用于耗尽和增强型HFET。

公开(公告)号：US20130270572A1

公开(公告)日：2013-10-17

申请号：US13448348

申请日：2012-04-16

申请人： David F. Brown ,  Miroslav Micovic

发明人： David F. Brown ,  Miroslav Micovic

IPC分类号： H01L29/205 ,  H01L21/22 ,  H01L21/20

CPC分类号： H01L29/205 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/42316 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/7783

摘要： A device and a method of making said wherein the device wherein the device has a group III-nitride buffer deposited on a substrate; and a group III-nitride heterostructure disposed on a surface of the group III-nitride buffer, wherein the group III-nitride heterostructure has a group III-nitride channel and a group III-nitride barrier layer disposed on a surface of the group III-nitride channel, the group III-nitride barrier layer including Al as one of its constituent group III elements, the Al having a mole fraction which varies at least throughout a portion of said group III-nitride barrier layer.

摘要翻译： 一种制造所述装置和方法，其中所述装置其中所述装置具有沉积在基板上的III族氮化物缓冲层; 和III族氮化物异质结构，其中所述III族氮化物异质结构具有III族氮化物沟道和III族氮化物阻挡层，所述III族氮化物阻挡层设置在所述III族氮化物缓冲层的表面上， 氮化物沟道，III族氮化物阻挡层包括Al作为其组成III族元素之一，Al具有至少在所述III族氮化物阻挡层的一部分上变化的摩尔分数。

公开(公告)号：US07989277B1

公开(公告)日：2011-08-02

申请号：US11853694

申请日：2007-09-11

申请人： Louis Luh ,  Keh-Chung Wang ,  Wah S. Wong ,  Miroslav Micovic ,  David Chow ,  Don Hitko

发明人： Louis Luh ,  Keh-Chung Wang ,  Wah S. Wong ,  Miroslav Micovic ,  David Chow ,  Don Hitko

IPC分类号： H01L21/338

CPC分类号： H01L29/7787 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/0629 ,  H01L29/08 ,  H01L29/872

摘要： A process for fabricating an integrated group III nitride structure comprising high electron mobility transistors (HEMTs) and Schottky diodes, and the resulting structure, are disclosed. Integration of vertical junction Schottky diodes is enabled, and the parasitic capacitance and resistance as well as the physical size of the diode are minimized. A process for fabricating an integrated group III nitride structure comprising double-heterostructure field effect transistors (DHFETs) and Schottky diodes and the resulting structure are also disclosed.

摘要翻译： 公开了一种用于制造包括高电子迁移率晶体管（HEMT）和肖特基二极管的集成III族氮化物结构的方法及其结果。 使得垂直结肖特基二极管的集成成为可能，并且寄生电容和电阻以及二极管的物理尺寸最小化。 还公开了一种制造包括双异质结构场效应晶体管（DHFET）和肖特基二极管的集成III族氮化物结构的方法及其结果。

公开(公告)号：US07852153B1

公开(公告)日：2010-12-14

申请号：US12257948

申请日：2008-10-24

申请人： Grant Andrew Ellis ,  Miroslav Micovic ,  Keh-Chung Wang ,  JeongSun Moon

发明人： Grant Andrew Ellis ,  Miroslav Micovic ,  Keh-Chung Wang ,  JeongSun Moon

IPC分类号： H03G5/16

CPC分类号： H03G3/004 ,  H03F1/0244 ,  H03F1/0272 ,  H03F3/19 ,  H03F2200/207 ,  H03F2200/321 ,  H03F2200/411 ,  H03F2200/451

摘要： A post-distortion method for cascading amplifier stages in a two-stage microwave power amplifier and a dynamic biasing method using back-end processing for correcting nonlinearity in the power amplifier output. A first or driver stage biased in a near-A region with low distortion is cascaded with a second or power stage biased in a near-C region with high efficiency. The amplitude and phase responses of the two stages compensate another to yield a more linear overall gain for the overall power amplifier. The dynamic biasing scheme modulates the source to drain voltages of the transistors used in the amplifier stages based on the harmonics in amplifier output in order to minimize the harmonics and correct non-linearity in the output.

摘要翻译： 用于两级微波功率放大器级联放大器级的后失真方法和使用后端处理来校正功率放大器输出中的非线性的动态偏置方法。 偏置在具有低失真的近A区域中的第一或者驱动级与以C效率高的偏置在近C区域的第二或功率级级联。 两级的振幅和相位响应补偿另一个，以产生整个功率放大器的更线性的总增益。 动态偏置方案基于放大器输出中的谐波将源极放大到放大器级中使用的晶体管的漏极电压，以便最小化谐波和校正输出中的非线性。

公开(公告)号：US07477102B1

公开(公告)日：2009-01-13

申请号：US11485037

申请日：2006-07-11

申请人： Grant Andrew Ellis ,  Miroslav Micovic ,  Keh-Chung Wang ,  JeongSun Moon

发明人： Grant Andrew Ellis ,  Miroslav Micovic ,  Keh-Chung Wang ,  JeongSun Moon

IPC分类号： H03G5/16

CPC分类号： H03G3/004 ,  H03F1/0244 ,  H03F1/0272 ,  H03F3/19 ,  H03F2200/207 ,  H03F2200/321 ,  H03F2200/411 ,  H03F2200/451

摘要： A post-distortion method for cascading amplifier stages in a two-stage microwave power amplifier and a dynamic biasing method using back-end processing for correcting nonlinearity in the power amplifier output. A first or driver stage biased in a near-A region with low distortion is cascaded with a second or power stage biased in a near-C region with high efficiency. The amplitude and phase responses of the two stages compensate another to yield a more linear overall gain for the overall power amplifier. The dynamic biasing scheme modulates the source to drain voltages of the transistors used in the amplifier stages based on the harmonics in amplifier output in order to minimize the harmonics and correct non-linearity in the output.

摘要翻译： 用于两级微波功率放大器级联放大器级的后失真方法和使用后端处理来校正功率放大器输出中的非线性的动态偏置方法。 偏置在具有低失真的近A区域中的第一或者驱动级与以C效率高的偏置在近C区域的第二或功率级级联。 两级的振幅和相位响应补偿另一个，以产生整个功率放大器的更线性的总增益。 动态偏置方案基于放大器输出中的谐波将源极放大到放大器级中使用的晶体管的漏极电压，以便最小化谐波和校正输出中的非线性。

公开(公告)号：US07470941B2

公开(公告)日：2008-12-30

申请号：US10313374

申请日：2002-12-06

申请人： Miroslav Micovic ,  Mike Antcliffe ,  Tahir Hussain ,  Paul Hashimoto

发明人： Miroslav Micovic ,  Mike Antcliffe ,  Tahir Hussain ,  Paul Hashimoto

IPC分类号： H01L31/0328

CPC分类号： H01L29/66462 ,  H01L21/28575 ,  H01L21/28581 ,  H01L21/28587 ,  H01L29/2003 ,  H01L29/7787

摘要： A method for fabricating heterojunction field effect transistors (HFET) and a family of HFET layer structures are presented. In the method, a step of depositing a HFET semiconductor structure onto a substrate is performed. Next, a photoresist material is deposited. Portions of the photoresist material are removed corresponding to source and drain pad pairs. A metal layer is deposited onto the structure, forming source pad and drain pad pairs. The photoresist material is removed, exposing the structure in areas other than the source and drain pad pairs. Each source and drain pad pair has a corresponding exposed area. The structure is annealed and devices are electrically isolated. The exposed area of each device is etched to form a gate recess and a gate structure is formed in the recess. Semiconductor layer structures for GaN/AlGaN HFETs are also presented.

摘要翻译： 提出了一种用于制造异质结场效应晶体管（HFET）和一系列HFET层结构的方法。 在该方法中，执行将HFET半导体结构沉积到衬底上的步骤。 接下来，沉积光致抗蚀剂材料。 对应于源极和漏极焊盘对，去除部分光致抗蚀剂材料。 金属层沉积在结构上，形成源极焊盘和漏极焊盘对。 去除光致抗蚀剂材料，将其暴露于不同于源极和漏极焊盘对的区域中。 每个源极和漏极焊盘对具有相应的曝光区域。 该结构进行退火，并且器件是电隔离的。 蚀刻每个器件的暴露面积以形成栅极凹部，并且在凹部中形成栅极结构。 还提出了用于GaN / AlGaN HFET的半导体层结构。