Transition insensitive timing recovery method and apparatus
    2.
    发明授权
    Transition insensitive timing recovery method and apparatus 失效
    过渡不敏感的定时恢复方法和装置

    公开(公告)号:US07170964B2

    公开(公告)日:2007-01-30

    申请号:US10355848

    申请日:2003-01-31

    IPC分类号: H03D3/24

    摘要: A timing recovery circuit comprises a data-driven phase detector and a digital loop filter. The data-driven phase detector is operably coupled to determine at least a phase difference between an input signal and a feedback clock signal to produce a difference signal. Determining the phase difference can comprise digitally determining a timing difference between the input signal and the feedback clock signal, digitally determining a transition of the input signal to produce a transition detect signal, and digitally updating the timing difference based on the transition detect signal and the feedback clock signal. The timing difference can be digitally updated by pre-filtering the timing difference BY TAKING EVERY N TRANSITON OR AVERAGE OF EVERY N TRANSITIONS at a digital pre-filter, based on a pre-filter clock signal produced from the transition detect signal and the feedback clock signal, to produce the difference signal. The loop filter is operably coupled to filter the difference signal to produce a control voltage.

    摘要翻译: 定时恢复电路包括数据驱动相位检测器和数字环路滤波器。 数据驱动相位检测器可操作地耦合以确定输入信号和反馈时钟信号之间的至少一个相位差,以产生差分信号。 确定相位差可以包括数字地确定输入信号和反馈时钟信号之间的定时差,数字地确定输入信号的转变以产生转换检测信号,并且基于转换检测信号和数字地更新定时差 反馈时钟信号。 基于从转换检测信号和反馈时钟产生的预滤波器时钟信号,通过对数字预滤波器进行每次N个转换的每次N次转换或每次N个转换的平均值来预定时器差异,可以对定时差异进行数字更新 信号,产生差分信号。 环路滤波器可操作地耦合以滤除差分信号以产生控制电压。

    Automatic gain control using multi-comparators
    3.
    发明申请
    Automatic gain control using multi-comparators 失效
    使用多比较器进行自动增益控制

    公开(公告)号:US20060261895A1

    公开(公告)日:2006-11-23

    申请号:US11135208

    申请日:2005-05-23

    IPC分类号: H03G3/10

    摘要: A method and apparatus for an automatic gain control (AGC) loop that utilizes multiple comparators to provide constant bandwidth tracking and step response, as well as fine granularity for decision directed convergence. In one embodiment, an odd number of comparators is used with square-law scaling at the output to achieve constant bandwidth step response for a wide range of input amplitude changes.

    摘要翻译: 一种用于自动增益控制(AGC)回路的方法和装置,其利用多个比较器来提供恒定的带宽跟踪和阶跃响应,以及用于决策定向收敛的细粒度。 在一个实施例中,使用奇数比较器,在输出处使用平方律缩放来实现宽范围的输入幅度变化的恒定带宽阶跃响应。

    Digitally controlled threshold adjustment circuit
    4.
    发明申请
    Digitally controlled threshold adjustment circuit 有权
    数字控制阈值调节电路

    公开(公告)号:US20060244506A1

    公开(公告)日:2006-11-02

    申请号:US11117767

    申请日:2005-04-28

    IPC分类号: H03L5/00

    CPC分类号: H03K5/151 H03K5/003 H03K5/086

    摘要: A threshold adjustment circuit including: a current DAC for supplying or sinking a varying current; a differential pair of thin oxide transistors coupled to the DAC and coupled together at a common source node; a power supply for providing a supply voltage having a voltage level above reliability of the thin oxide transistors; and a third transistor for maintaining voltage of the common source node above a predetermined level and to disable the threshold adjustment circuit. The bulk and source of each of the differential pair thin oxide transistors is coupled to the common source node and each of the differential pair thin oxide transistors is switched by a signal to keep each of the differential pair thin oxide transistors in saturation region.

    摘要翻译: 一种阈值调整电路,包括:用于提供或吸收变化电流的电流DAC; 耦合到DAC并在公共源节点处耦合在一起的薄氧化物晶体管的差分对; 用于提供具有高于薄氧化物晶体管的可靠性的电压电平的电源电压的电源; 以及第三晶体管,用于将公共源节点的电压维持在预定电平以上并禁止阈值调整电路。 每个差分对薄氧化物晶体管的体积和源极耦合到公共源节点,并且每个差分对薄氧化物晶体管被信号切换,以将每个差分对薄氧化物晶体管保持在饱和区域。

    Low voltage differential to single-ended converter
    6.
    发明授权
    Low voltage differential to single-ended converter 有权
    低压差分到单端转换器

    公开(公告)号:US06927606B2

    公开(公告)日:2005-08-09

    申请号:US10267054

    申请日:2002-10-07

    申请人: Namik Kocaman

    发明人: Namik Kocaman

    摘要: Method and circuitry for converting a differential logic signal to a single-ended logic signal eliminate slower PMOS transistors and speed up the conversion process. In specific embodiments differential logic signals of the type employed in, for example, current-controlled complementary metal-oxide-semiconductor (C3MOS) logic are converted to single-ended rail-to-rail CMOS logic levels using a differential pair of NMOS transistors with resistors as load devices and an NMOS current source transistor that provides dynamically adjusted tail current.

    摘要翻译: 用于将差分逻辑信号转换为单端逻辑信号的方法和电路消除了较慢的PMOS晶体管并加速了转换过程。 在具体实施例中,在例如电流控制的互补金属氧化物半导体(C3MOS)逻辑中使用的类型的差分逻辑信号被转换为单端轨至轨CMOS逻辑电平,使用具有 电阻作为负载器件和NMOS电流源晶体管,提供动态调整的尾电流。

    Reference-Less Voltage Controlled Oscillator (VCO) Calibration
    8.
    发明申请
    Reference-Less Voltage Controlled Oscillator (VCO) Calibration 有权
    无参考电压控制振荡器(VCO)校准

    公开(公告)号:US20120313714A1

    公开(公告)日:2012-12-13

    申请号:US13158075

    申请日:2011-06-10

    IPC分类号: H03L7/00

    摘要: Embodiments for reference-less voltage controlled oscillator (VCO) calibration are provided. Embodiments include a VCO calibration module which uses one or more signals from a frequency detector to automatically select a proper VCO band and bring the VCO clock frequency close enough to the data rate. The VCO calibration module uses a calibration code to calibrate the VCO. In embodiments, the calibration code is determined using a frequency search scheme, which includes a discovery phase to determine the proper VCO band, and a binary search phase and a monitoring phase to select the calibration code that brings the VCO clock frequency closest to the data rate.

    摘要翻译: 提供了无参考压控振荡器(VCO)校准的实施例。 实施例包括VCO校准模块,其使用来自频率检测器的一个或多个信号来自动选择适当的VCO频带并使VCO时钟频率接近于数据速率。 VCO校准模块使用校准代码校准VCO。 在实施例中,使用频率搜索方案来确定校准码,该频率搜索方案包括确定适当的VCO频带的发现阶段以及二进制搜索阶段和监视阶段,以选择使VCO时钟频率最接近数据的校准码 率。

    DISTRIBUTED THRESHOLD ADJUSTMENT FOR HIGH SPEED RECEIVERS
    9.
    发明申请
    DISTRIBUTED THRESHOLD ADJUSTMENT FOR HIGH SPEED RECEIVERS 有权
    高速接收机的分布式阈值调整

    公开(公告)号:US20110291757A1

    公开(公告)日:2011-12-01

    申请号:US13207887

    申请日:2011-08-11

    IPC分类号: H03G3/20

    摘要: According to one general aspect, a distributed threshold adjuster (DTA) may be interspersed between stages of a multistage amplifier to adjust the DC voltage of an input signal. The DTA may include an input signal terminal configured to receive the input signal. The DTA may also include a plurality of current sources configured to produce an adjustment current signal whose amperage is configured to be increased or decreased by fixed steps in order to adjust the DC voltage of the input signal. The DTA may include a control unit configured to selectively turn on or off the individual current sources of the plurality of current sources to select the amperage of the adjustment current signal. The DTA may further include an output terminal configured to produce an output signal, comprising a combination of the input signal and the adjustment current signal, to a stage of a multistage amplifier.

    摘要翻译: 根据一个一般方面,分布式阈值调节器(DTA)可以分散在多级放大器的级之间,以调节输入信号的直流电压。 DTA可以包括被配置为接收输入信号的输入信号端子。 DTA还可以包括多个电流源,其被配置为产生调节电流信号,其安培数被配置为通过固定步长增加或减小,以便调节输入信号的直流电压。 DTA可以包括控制单元,其被配置为选择性地打开或关闭多个电流源的各个电流源,以选择调节电流信号的电流强度。 DTA还可以包括输出端子,其被配置为产生包括输入信号和调整电流信号的组合的输出信号到多级放大器的级。