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1.发明申请TECHNIQUES ON INPUT TRANSFORMER TO PUSH THE OP1dB HIGHER IN POWER AMPLIFIER DESIGN 失效输入变压器推动OP1dB高功率放大器设计的技术公开(公告)号：US20120161880A1
公开(公告)日：2012-06-28
申请号：US13336817
申请日：2011-12-23
IPC分类号： H03F1/22
CPC分类号： H03F3/211 , H03F1/223 , H03F3/193 , H03F3/245 , H03F3/45179 , H03F3/45188 , H03F2200/408 , H03F2200/534 , H03F2200/537 , H03F2200/541 , H03F2203/45544 , H03F2203/45562 , H03F2203/45566 , H03F2203/45621 , H03F2203/45644 , H03F2203/45731
摘要： A power amplifier includes a first transistor and a first inductor disposed between the first transistor and a voltage source. A first node between the first transistor and the first inductor is an output node. The power amplifier further includes a second inductor disposed between the first transistor and ground The power amplifier further includes a third inductor coupled to a gate of the first transistor and configured as a first AC input. The power amplifier further includes a first phase conditioner inductively coupled to the second inductor and the third inductor and configured to set phases of AC signals across the first inductor and the second inductor in phase. The second inductor is configured to release energy into the first inductor to raise a voltage of the AC signal and raise a power output at the output node.
摘要翻译： 功率放大器包括设置在第一晶体管和电压源之间的第一晶体管和第一电感器。 第一晶体管和第一电感器之间的第一节点是输出节点。 功率放大器还包括设置在第一晶体管和地之间的第二电感器。功率放大器还包括耦合到第一晶体管的栅极并被配置为第一AC输入的第三电感器。 所述功率放大器还包括电感耦合到所述第二电感器和所述第三电感器的第一相位调节器，并且被配置为设置跨越所述第一电感器和所述第二电感器的AC信号的相位。 第二电感器被配置为将能量释放到第一电感器中以提高AC信号的电压并且提高输出节点处的功率输出。
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公开(公告)号：US20120161871A1
公开(公告)日：2012-06-28
申请号：US13336785
申请日：2011-12-23
IPC分类号： H03F3/45
CPC分类号： H03F3/45076 , H03F1/223 , H03F3/21 , H03F3/211 , H03F3/26 , H03F3/265 , H03F3/45475 , H03F2200/537 , H03F2200/541 , H03F2203/45731
摘要： A power amplifier includes a push-pull pair of transistors including a first transistor inductively coupled to a voltage source and coupled to a ground, and a second transistor inductively coupled to the ground and coupled to the voltage source. Gates of the first and the second transistors are AC inputs configured to receive an AC signal having a fundamental frequency. Drain regions of the first and the second transistors are, respectively, first and second output nodes. The power amplifier further includes a capacitor coupled between the first output node and the second output node and where the capacitor is configured as a pathway for cancellation of even harmonic signals of the fundamental frequency of the AC signal.
摘要翻译： 功率放大器包括推挽对晶体管，其包括感应耦合到电压源并耦合到地的第一晶体管，以及感应耦合到地并耦合到电压源的第二晶体管。 第一和第二晶体管的栅极是被配置为接收具有基频的AC信号的AC输入。 第一和第二晶体管的漏极区分别是第一和第二输出节点。 功率放大器还包括耦合在第一输出节点和第二输出节点之间的电容器，并且其中电容器被配置为用于消除AC信号的基频的均匀谐波信号的路径。
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3.发明授权Techniques on input transformer to push the OP1dB higher in power amplifier design 失效输入变压器技术在功率放大器设计中推高OP1dB公开(公告)号：US08629727B2
公开(公告)日：2014-01-14
申请号：US13336817
申请日：2011-12-23
IPC分类号： H03F1/22
CPC分类号： H03F3/211 , H03F1/223 , H03F3/193 , H03F3/245 , H03F3/45179 , H03F3/45188 , H03F2200/408 , H03F2200/534 , H03F2200/537 , H03F2200/541 , H03F2203/45544 , H03F2203/45562 , H03F2203/45566 , H03F2203/45621 , H03F2203/45644 , H03F2203/45731
摘要： A power amplifier includes a first transistor and a first inductor disposed between the first transistor and a voltage source. A first node between the first transistor and the first inductor is an output node. The power amplifier further includes a second inductor disposed between the first transistor and ground The power amplifier further includes a third inductor coupled to a gate of the first transistor and configured as a first AC input. The power amplifier further includes a first phase conditioner inductively coupled to the second inductor and the third inductor and configured to set phases of AC signals across the first inductor and the second inductor in phase. The second inductor is configured to release energy into the first inductor to raise a voltage of the AC signal and raise a power output at the output node.
摘要翻译： 功率放大器包括设置在第一晶体管和电压源之间的第一晶体管和第一电感器。 第一晶体管和第一电感器之间的第一节点是输出节点。 功率放大器还包括设置在第一晶体管和地之间的第二电感器。功率放大器还包括耦合到第一晶体管的栅极并被配置为第一AC输入的第三电感器。 所述功率放大器还包括电感耦合到所述第二电感器和所述第三电感器的第一相位调节器，并且被配置为在同相中跨越所述第一电感器和所述第二电感器设置AC信号的相位。 第二电感器被配置为将能量释放到第一电感器中以提高AC信号的电压并且提高输出节点处的功率输出。
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4.发明授权Variable-gain cascode amplifier using voltage-controlled and variable inductive load 失效使用电压控制和可变电感负载的可变增益共源共栅放大器公开(公告)号：US07019593B2
公开(公告)日：2006-03-28
申请号：US10746087
申请日：2003-12-26
IPC分类号： H03F1/22
CPC分类号： H03F1/22 , H01L23/5227 , H01L2924/0002 , H03F1/26 , H03F3/191 , H03F2200/294 , H03F2200/372 , H03F2200/541 , H03G1/0023 , H03G1/007 , H01L2924/00
摘要： Circuits, such as a cascode amplifier or low noise amplifier, having terminals and a voltage-controlled and variable inductive load are disclosed. Any such circuit comprises an output terminal and a voltage-controlled and variable inductive loading network. The voltage-controlled and variable inductive loading network comprises a primary inductor having a first primary inductor terminal for coupling to a supply voltage, a second primary inductor terminal coupled to the output terminal, a secondary inductor sharing mutual inductance with the first inductor, and a variable resistance device having one terminal connected to a first secondary inductor terminal and another terminal connected to a second secondary inductor terminal, wherein the variable resistance device being dependant on mutual induction between the primary and secondary inductors provides loading at the output terminal.
摘要翻译： 公开了具有端子和电压控制和可变电感性负载的诸如共源共栅放大器或低噪声放大器的电路。 任何这样的电路包括输出端子和电压控制和可变电感负载网络。 电压控制和可变电感负载网络包括具有用于耦合到电源电压的第一初级电感器端子的初级电感器，耦合到输出端子的第二初级电感器端子，与第一电感器共享互感的次级电感器，以及 可变电阻器件，其一个端子连接到第一次级电感器端子，另一个端子连接到第二次级电感器端子，其中所述可变电阻器件依赖于初级和次级电感器之间的相互感应，在输出端子处提供负载。
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5.发明授权Differential power amplifiers with push-pull power amplifiers and even-harmonic cancellation 失效具有推挽功率放大器和均匀谐波消除的差分功率放大器公开(公告)号：US08680924B2
公开(公告)日：2014-03-25
申请号：US13336785
申请日：2011-12-23
IPC分类号： H03F3/26
CPC分类号： H03F3/45076 , H03F1/223 , H03F3/21 , H03F3/211 , H03F3/26 , H03F3/265 , H03F3/45475 , H03F2200/537 , H03F2200/541 , H03F2203/45731
摘要： A differential power amplifier is provided and includes a first pair of transistors. A first transistor is inductively coupled to a voltage source and is connected to a node at a ground reference potential. A second transistor is inductively coupled to the node and is connected to the voltage source. Gates of the transistors are configured to receive an AC signal with a fundamental frequency. Drain of the first and second transistors are respectively first and second output nodes. The output nodes provide a first differential output. A capacitor is connected between the output nodes and provides a pathway for cancellation of even harmonic signals of the fundamental frequency. A second pair of transistors provides a second differential output. A first inductor is connected between the output nodes. A second inductor is connected between output nodes of the second pair of transistors. A combiner is inductively coupled to the inductors.
摘要翻译： 提供差分功率放大器并且包括第一对晶体管。 第一晶体管感应耦合到电压源并且连接到处于接地参考电位的节点。 第二晶体管感应耦合到节点并连接到电压源。 晶体管的栅极被配置为接收具有基频的AC信号。 第一和第二晶体管的漏极分别是第一和第二输出节点。 输出节点提供第一差分输出。 电容器连接在输出节点之间，并提供消除基频的均匀谐波信号的路径。 第二对晶体管提供第二差分输出。 第一个电感连接在输出节点之间。 第二电感器连接在第二对晶体管的输出节点之间。 组合器感应耦合到电感器。
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公开(公告)号：US20120161876A1
公开(公告)日：2012-06-28
申请号：US13332190
申请日：2011-12-20
IPC分类号： H03F3/16
CPC分类号： H03F3/16 , G05F3/262 , H03F3/193 , H03F3/245 , H03F3/45179 , H03F2200/555 , H03F2203/45294 , H03F2203/45301 , H03F2203/45304 , H03F2203/45311 , H03F2203/45352 , H03F2203/45544 , H03F2203/45554
摘要： A current mirror includes a bias branch, which includes first and second transistors in series between a voltage source and ground, a voltage divider coupled between the voltage source and ground, an op-amp configured to receive a divided voltage of the voltage divider and a voltage of a node between the first and second transistors, and drive a gate of the second transistor to pull the node to the divided voltage. The current mirror further includes a power amplifier core coupled to the bias branch. The power amplifier core includes first and second drive transistors configured in series between the voltage source and ground. Gates of the first transistor and the first drive transistor are coupled, and gates of the second transistor and the second drive transistor are coupled.
摘要翻译： 电流镜包括偏置分支，偏置分支包括串联在电压源和地之间的第一和第二晶体管，耦合在电压源和地之间的分压器，被配置为接收分压器的分压的运算放大器和 在第一和第二晶体管之间的节点的电压，并且驱动第二晶体管的栅极以将节点拉到分压。 电流镜还包括耦合到偏压分支的功率放大器芯。 功率放大器芯包括串联在电压源和地之间的第一和第二驱动晶体管。 第一晶体管和第一驱动晶体管的栅极耦合，并且第二晶体管和第二驱动晶体管的栅极耦合。
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7.发明申请Variable-gain cascode amplifier using voltage-controlled and variable inductive load 失效使用电压控制和可变电感负载的可变增益共源共栅放大器公开(公告)号：US20050140456A1
公开(公告)日：2005-06-30
申请号：US10746087
申请日：2003-12-26
IPC分类号： H01L23/522 , H03F1/22 , H03F1/26 , H03F3/191 , H03G1/00
CPC分类号： H03F1/22 , H01L23/5227 , H01L2924/0002 , H03F1/26 , H03F3/191 , H03F2200/294 , H03F2200/372 , H03F2200/541 , H03G1/0023 , H03G1/007 , H01L2924/00
摘要： Circuits, such as a cascode amplifier or low noise amplifier, having terminals and a voltage-controlled and variable inductive load are disclosed. Any such circuit comprises an output terminal and a voltage-controlled and variable inductive loading network. The voltage-controlled and variable inductive loading network comprises a primary inductor having a first primary inductor terminal for coupling to a supply voltage, a second primary inductor terminal coupled to the output terminal, a secondary inductor sharing mutual inductance with the first inductor, and a variable resistance device having one terminal connected to a first secondary inductor terminal and another terminal connected to a second secondary inductor terminal, wherein the variable resistance device being dependant on mutual induction between the primary and secondary inductors provides loading at the output terminal.
摘要翻译： 公开了具有端子和电压控制和可变电感性负载的诸如共源共栅放大器或低噪声放大器的电路。 任何这样的电路包括输出端子和电压控制和可变电感负载网络。 电压控制和可变电感负载网络包括具有用于耦合到电源电压的第一初级电感器端子的初级电感器，耦合到输出端子的第二初级电感器端子，与第一电感器共享互感的次级电感器，以及 可变电阻器件，其一个端子连接到第一次级电感器端子，另一个端子连接到第二次级电感器端子，其中所述可变电阻器件依赖于主电感器和次级电感器之间的相互感应，在输出端子处提供负载。
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公开(公告)号：US06819179B2
公开(公告)日：2004-11-16
申请号：US10417318
申请日：2003-04-16
IPC分类号： H03G310
CPC分类号： H03F3/195 , H03F1/223 , H03F1/26 , H03F1/32 , H03F3/72 , H03F2200/243 , H03F2200/294 , H03F2200/372 , H03F2200/421 , H03F2200/501 , H03G1/0088 , H03G3/001
摘要： The load of the cascode amplifier is varied by connecting another (secondary) load in parallel with the original load. The secondary load is connected through a MOSFET switch. During the High Gain Mode the MOSFET switch is OFF and the secondary load is electrically isolated from the main load, whereas in the Low Gain Mode the switch is turned ON and the secondary load appears across the primary load, reducing the effective load impedance. The secondary load is AC coupled such that the DC bias current does not pass through the secondary load and hence the Noise Figure (NF) and linearity (IIP3) performance are better in the Low Gain Mode. A number of such switchable loads can be connected across the load to obtain programmability.
摘要翻译： 通过将另一个（次级）负载与原始负载并联连接来改变共源共栅放大器的负载。 次级负载通过MOSFET开关连接。 在高增益模式期间，MOSFET开关为OFF，次级负载与主负载电隔离，而在低增益模式下，开关导通，次级负载跨越主负载，降低有效负载阻抗。 次级负载是交流耦合的，使得DC偏置电流不通过次级负载，因此低增益模式下的噪声系数（NF）和线性度（IIP3）性能更好。 可以跨负载连接多个这种可切换负载以获得可编程性。
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公开(公告)号：US06775323B1
公开(公告)日：2004-08-10
申请号：US09513295
申请日：2000-02-25
IPC分类号： H03K708
CPC分类号： H03M5/08 , G01S13/751 , G01S13/758
摘要： A data coding system for coding data represented by a number of symbols is described. The system includes representing each symbol with a unique digital waveform. All the unique digital waveforms have a duty cycle greater than 50% or a duty cycle less than 50%.
摘要翻译： 描述用于对由多个符号表示的数据进行编码的数据编码系统。 该系统包括用唯一的数字波形表示每个符号。 所有独特的数字波形的占空比大于50％或占空比小于50％。
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