Abstract:
An embodiment of the invention provides a method for forming a chip package which includes: providing a substrate having a first surface and a second surface, wherein at least one optoelectronic device is formed in the substrate; forming an insulating layer on the substrate; forming a conducting layer on the insulating layer on the substrate, wherein the conducting layer is electrically connected to the at least one optoelectronic device; and spraying a solution of light shielding material on the second surface of the substrate to form a light shielding layer on the second surface of the substrate.
Abstract:
An embodiment of the invention provides a chip package which includes: a substrate having a first surface and a second surface; an optoelectronic device formed in the substrate; a conducting layer disposed on the substrate, wherein the conducting layer is electrically connected to the optoelectronic device; an insulating layer disposed between the substrate and the conducting layer; a first light shielding layer disposed on the second surface of the substrate; and a second light shielding layer disposed on the first light shielding layer and directly contacting with the first light shielding layer, wherein a contact interface is between the first light shielding layer and the second light shielding layer.
Abstract:
According to an embodiment of the invention, a chip package is provided, which includes: a substrate having a first surface and a second surface; an optical device between the first surface and the second surface of the substrate; a protection layer formed on the second surface of the substrate, wherein the protection layer has at least an opening; at least a conducting bump formed in the opening of the protection layer and electrically connected to the optical device; and a light shielding layer formed on the protection layer, wherein the light shielding layer is further extended onto a sidewall of the opening of the protection layer.
Abstract:
A control circuit includes a power supply, a control IC, a liquid crystal panel, a driving integrated chip arranged between the control IC and the liquid crystal panel, and a number of voltage adjusting sub-circuits. The driving integrated chip includes a plurality of output ports for outputting a plurality of driving voltages respectively. Each voltage adjusting sub-circuit is arranged between the corresponding output port of the driving integrated chip and the liquid crystal panel for adjusting an initial value the voltage outputted from the corresponding output port before the driving voltage is transferred to the liquid crystal panel. With the voltage adjusting sub-circuits, the driving voltages received by the liquid crystal panel have the same value to avoid the color deviation of the images displayed in the liquid crystal panel. This improves the display effect of the liquid crystal panel under without increasing the layout area.
Abstract:
An output compensation circuit and an output compensation method for an LCD data drive IC as well as an LCD comprising the same are disclosed. The output compensation circuit comprises a data drive IC, a plurality of first switch units and a plurality of delay control units. A plurality of output channels of the data drive IC each are connected with a corresponding row of pixel electrodes on a glass substrate via a data line respectively to output a charging signal. Each of the first switch units control the corresponding output channel according to a delay control signal generated by the corresponding delay control unit. Each of the delay control units is configured to generate the delay control signal-used to control the first switch unit to be turned on after a predetermined delay so that the charging time is the same for all the pixel electrodes.
Abstract:
A control circuit includes a power supply, a control IC, a liquid crystal panel, a driving integrated chip arranged between the control IC and the liquid crystal panel, and a number of voltage adjusting sub-circuits. The driving integrated chip includes a plurality of output ports for outputting a plurality of driving voltages respectively. Each voltage adjusting sub-circuit is arranged between the corresponding output port of the driving integrated chip and the liquid crystal panel for adjusting an initial value the voltage outputted from the corresponding output port before the driving voltage is transferred to the liquid crystal panel. With the voltage adjusting sub-circuits, the driving voltages received by the liquid crystal panel have the same value to avoid the color deviation of the images displayed in the liquid crystal panel. This improves the display effect of the liquid crystal panel under without increasing the layout area.
Abstract:
A light emitting diode (LED) dimming drive device, an LED dimming drive method and a liquid crystal display (LCD) are disclosed. The LED dimming drive device comprises a plurality of dimming control circuits each comprising one dimmer switch and a delay setting circuit for setting a different delay time for each dimming control circuits. Each of the dimming control circuits further comprises a clock delay circuit for receiving a pulse width modulation (PWM) signal, timing according to the delay time, and outputting the PWM signal to the dimmer switch when the delay time expires. Different delay times can be used to control the output of PWM signals and further control the on or off of the dimmer switches. This can avoid the noises or electromagnetic (EM) interferences occurred by a large amount of energy transmitted into the LED paths when the dimmer switches is turned on.
Abstract:
A tangent angle circuit in a liquid crystal display (LCD) driving system comprises: a charging module integrated on a control board for receiving input of a direct current (DC) driving voltage and outputting a cut-in voltage to charge a plurality of scan line driving circuits; a plurality of discharging modules integrated on the scan line driving circuits respectively for controlling the corresponding scan line driving circuits to discharge; and a plurality of external regulating modules externally connected to the scan line driving circuits respectively and connected to the corresponding discharging modules to regulate the discharging modules so as to control a discharging rate of the scan line driving circuits. In the present invention, a discharge slope of the corresponding scan line driving circuit can be regulated; thereby, the tangent angle circuit is suitable for use with scan line driving circuits having different parasitic capacitors.
Abstract:
A COF tape is formed by orderly connecting several COFs and a carrier connected with said COF tape. The appearance of said COF is a trapezoid consisting of two paralleled wiring edges and two unparalleled side edges. The longer wiring edge of one COF and the shorter wiring edge of the other COF between the two adjacent COFs are connected and lie in a same straight line; the shorter wiring edges and the longer wiring edges of the other two COFs also lie in a same straight line. The disclosure also discloses a COF and a drive circuit for liquid crystal display television. The COF of the disclosure saves materials; the carrier-tape type semiconductor device with the COF of the disclosure is able to increase the quantity of COF on the carrier tape of specific length, so that the cost can be lowered to a large extent.
Abstract:
A wiring structure for improving a crown-like defect and a fabrication method thereof are provided. The method includes the following steps. A substrate, on which a seed layer and a patterned photoresist layer with an opening are formed, is provided. A copper layer, having a bottom covering the seed layer, is formed in the opening. A barrier layer covering at least one top portion of the copper layer is formed on the copper layer. An oxidation potential of the barrier layer is greater than that of the copper layer. The patterned photoresist layer is removed to perform an etching process, wherein the copper layer and a portion of the seed layer exposed are etched to form a wiring layer. An immersion process is performed to form an anti-oxidation layer comprehensively on exposed surfaces of the barrier layer and the wiring layer.