利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

163 条记录 (耗时 0.041 秒)

    Systems and methods for optimizing timing phase in modem devices
    1.
    发明授权
    Systems and methods for optimizing timing phase in modem devices 有权
    用于优化调制解调器设备中的时序相位的系统和方法

    公开(公告)号：US08855255B2

    公开(公告)日：2014-10-07

    申请号：US10113230

    申请日：2002-03-29

    申请人： Qing Chen ,  Qian Cheng

    发明人： Qing Chen ,  Qian Cheng

    IPC分类号： H04L7/00

    CPC分类号： H04L7/0029 ,  H04L2025/0349

    摘要： Systems and methods are provided for performing the required phase calculation in a telecommunications system in order to optimize system performance more quickly and with reduced complexity as compared to prior approaches to solving this problem. In accordance with the preferred exemplary embodiment of the present invention, the phase delay of the precursor equalizer (EQ) is calculated off-line and as a result it is not necessary to fill the precursor EQ delay line with the indicated number of symbols as in the previous approach. Additionally, because the precursor EQ is fractionally spaced, both sine and cosine values of the 4kHz tone's initial phase can be achieved simultaneously. As a result, only 36 quick timing sequence (QTS) symbols are needed in order to perform the required estimation.

    摘要翻译： 提供系统和方法用于在电信系统中执行所需的相位计算，以便与解决该问题的先前方法相比，更快地并且以更低的复杂性优化系统性能。 根据本发明的优选示例性实施例，前离散均衡器（EQ）的相位延迟是离线计算的，因此不需要用所指示的符号数填充前体EQ延迟线，如 以前的做法。 另外，由于前驱体EQ分数间隔，所以可以同时实现4kHz音调的初始相位的正弦和余弦值。 因此，为了执行所需的估计，仅需要36个快速定时序列（QTS）符号。

    Compact switched-capacitor FIR filter implementation
    2.
    发明授权
    Compact switched-capacitor FIR filter implementation 有权
    紧凑型开关电容FIR滤波器实现

    公开(公告)号：US08768998B1

    公开(公告)日：2014-07-01

    申请号：US13291715

    申请日：2011-11-08

    申请人： Uday Dasgupta ,  Qing Chen

    发明人： Uday Dasgupta ,  Qing Chen

    IPC分类号： G06G7/02

    CPC分类号： H03H15/00 ,  H03H19/004

    摘要： A system is provided to perform non-recursive signal processing using a sampled data technique and a parallel network of switched-capacitor filters. The input analog signal is sampled in a time sequence manner at regular time intervals to obtain analog-valued samples. These samples are collected into data blocks that are assembled into a set of data blocks. The successive data blocks belonging to a set of data blocks partially overlap with the first data block. The non-recursive signal processing is performed on all of the data blocks of the set substantially simultaneously, using the parallel network to produce a processed analog output signal. Each individual processing path of the parallel network processes a specific data block of the set of data blocks. The number of parallel processing paths is the same as one plus the degree of the polynomial representing the desired or overall input/output equation characterizing the non-recursive signal processing.

    摘要翻译： 提供了一种使用采样数据技术和开关电容滤波器的并联网络执行非递归信号处理的系统。 以规则的时间间隔以时间顺序对输入的模拟信号进行采样，以获得模拟值采样。 这些样本被收集到被组装成一组数据块的数据块中。 属于一组数据块的连续数据块与第一数据块部分重叠。 使用并行网络基本上同时对所述集合的所有数据块执行非递归信号处理，以产生经处理的模拟输出信号。 并行网络的每个单独处理路径处理该组数据块的特定数据块。 并行处理路径的数量与一个加上代表表征非递归信号处理的期望或总体输入/输出方程的多项式的程度相同。

    Texture-pattern-adaptive partitioned block transform
    3.
    发明授权
    Texture-pattern-adaptive partitioned block transform 有权
    纹理图案自适应分割块变换

    公开(公告)号：US08666177B2

    公开(公告)日：2014-03-04

    申请号：US13511547

    申请日：2009-12-04

    申请人： Zhi Bo Chen ,  Xiao Zhong Xu ,  Qu Qing Chen

    发明人： Zhi Bo Chen ,  Xiao Zhong Xu ,  Qu Qing Chen

    IPC分类号： G06K9/36 ,  G06K9/46

    CPC分类号： H04N19/14 ,  H04N19/119 ,  H04N19/122 ,  H04N19/176 ,  H04N19/46

    摘要： The invention is related to encoding an image block of an image using a partitioned block transform. The inventors recognized that applying a texture-pattern associated invertible mapping to the pixels of a first partition, said first partition resulting from partitioning said image block according to a current texture pattern with which said texture-pattern associated invertible mapping is associated, allows for limiting the maximum number of required first 1-D transforms to not exceeding a number of columns in the image block as well as limiting the maximum number of required second 1-D transforms to not exceeding a number of rows in the image block, also. Achieving limitation of maximum required 1-D transforms enables more efficient implementation on hardware and improves encoding performance but also allows for further partitions according to texture patterns which comprise at least one of multiple strips, texture patterns with highly unsymmetrical pixel distribution and non-directional texture patterns.

    摘要翻译： 本发明涉及使用分区块变换对图像的图像块进行编码。 发明人认识到，将纹理图案相关的可逆映射应用于第一分区的像素，所述第一分区是根据与所述纹理图案相关联的可逆映射相关联的当前纹理图案对所述图像块进行分区而产生的，允许限制 所需的第一个1-D的最大数量变换为不超过图像块中的列数，并且将所需的第二个1-D变换的最大数量限制为不超过图像块中的行数。 实现最大需要的1-D变换的限制使得能够在硬件上更有效地实现并提高编码性能，并且还允许根据包括多个条纹，纹理图案和非定向纹理 模式。

    POWER COMPENSATION APPARATUS AND METHOD FOR RENEWABLE ENERGY SYSTEM
    7.
    发明申请
    POWER COMPENSATION APPARATUS AND METHOD FOR RENEWABLE ENERGY SYSTEM 有权
    电力补偿装置和可再生能源系统的方法

    公开(公告)号：US20130051105A1

    公开(公告)日：2013-02-28

    申请号：US13324434

    申请日：2011-12-13

    申请人： Chang-Yong Wang ,  Qing Chen

    发明人： Chang-Yong Wang ,  Qing Chen

    IPC分类号： H02M7/5387

    CPC分类号： H02M7/5387 ,  H02J3/16 ,  H02J3/1807 ,  H02M1/42 ,  H02M7/487 ,  Y02B70/12 ,  Y02E40/34

    摘要： A power compensation apparatus for a renewable energy system includes a plurality of converter modules positioned between any two phases of a three-phase AC electrical grid, each converter module including a plurality of inverter circuits connected in series. Each inverter circuit includes an energy storage unit for providing a direct current (DC) voltage; a capacitor connected to the energy storage unit; and an H-bridge circuit converting the DC voltage into an alternating current (AC) voltage. The converter modules perform reactive power compensation and active power regulation on the electrical grid in a delta connection. A plurality of converter modules are respectively positioned between any two phases of the electrical grid in a delta connection, so as to keep the voltage of the electrical grid continuously stable when the voltage of the electrical grid fluctuates, and also compensate load current when system load is not balanced.

    摘要翻译： 用于可再生能源系统的功率补偿装置包括位于三相交流电网的任何两相之间的多个转换器模块，每个转换器模块包括串联连接的多个逆变器电路。 每个逆变器电路包括用于提供直流（DC）电压的能量存储单元; 连接到能量存储单元的电容器; 以及将DC电压转换成交流（AC）电压的H桥电路。 转换器模块在三角形连接中对电网进行无功功率补偿和有功功率调节。 多个转换器模块分别位于三角形连接中的电网的任何两相之间，以便当电网的电压波动时使电网的电压持续稳定，并且还在系统负载时补偿负载电流 不平衡

    Salience estimation for object-based visual attention model
    8.
    发明授权
    Salience estimation for object-based visual attention model 有权
    基于对象视觉注意模型的显着性估计

    公开(公告)号：US08385654B2

    公开(公告)日：2013-02-26

    申请号：US12226386

    申请日：2007-04-27

    申请人： Xiao Dong Gu ,  Zhi Bo Chen ,  Qu Qing Chen

    发明人： Xiao Dong Gu ,  Zhi Bo Chen ,  Qu Qing Chen

    IPC分类号： G06K9/46 ,  G06K9/34 ,  G06K9/00

    CPC分类号： G06K9/4671 ,  G06K9/4628 ,  G06T7/11

    摘要： The present invention provides a salience estimation method for object-based visual attention model. The method comprises steps of segmenting the image into a plurality of objects to be estimated, extracting feature maps for each segmented object, calculating the saliences of each segmented object in a set of circles defined around a center pixel of the object based on the extracted feature maps, and integrating the saliences of each segmented object in all circles in order to achieve an overall salience estimation for each segmented object. The present invention is much more human vision inosculated and of low computing complexity.

    摘要翻译： 本发明提供了一种用于基于对象的视觉注意力模型的显着性估计方法。 该方法包括以下步骤：将图像分割成要估计的多个对象，提取每个分割对象的特征图，基于所提取的特征来计算围绕对象的中心像素定义的一组圆圈中的每个分割对象的色调 映射，以及将所有分段对象的细节整合到所有圆形中，以实现对每个分段对象的整体显着性估计。 本发明是更加人性化的视觉和低计算复杂性。

    Anti-activin A antibodies and uses thereof
    9.
    发明授权
    Anti-activin A antibodies and uses thereof 有权
    抗激活素A抗体及其用途

    公开(公告)号：US08309082B2

    公开(公告)日：2012-11-13

    申请号：US11851884

    申请日：2007-09-07

    申请人： Hui-Quan Han ,  Qing Chen ,  Keith Soo-Nyung Kwak ,  Xiaolan Zhou

    发明人： Hui-Quan Han ,  Qing Chen ,  Keith Soo-Nyung Kwak ,  Xiaolan Zhou

    IPC分类号： G01N33/53 ,  A61K39/395 ,  C07K16/00 ,  C07K16/28

    CPC分类号： C07K16/22 ,  A61K2039/505 ,  C07K2317/14 ,  C07K2317/21 ,  C07K2317/56 ,  C07K2317/565 ,  C07K2317/567 ,  C07K2317/76 ,  C07K2317/92

    摘要： The disclosure provides compositions and methods relating to or derived from anti-activin A binding proteins, including antibodies. In particular embodiments, the disclosure provides fully human, humanized, and chimeric anti-activin A antibodies that bind human activin A, activin A-binding fragments and derivatives of such antibodies, and activin A-binding polypeptides comprising such fragments. Other embodiments provide nucleic acids encoding such antibodies, antibody fragments and derivatives and polypeptides, cells comprising such polynucleotides, methods of making such antibodies, antibody fragments and derivatives and polypeptides, and methods of using such antibodies, antibody fragments and derivatives and polypeptides, including methods of treating or diagnosing subjects having activin A-related disorders or conditions including cachexia related to gonadal cancer, other cancers, rheumatoid arthritis, and other diseases.

    摘要翻译： 本公开提供与抗激活素A结合蛋白（包括抗体）相关或衍生的组合物和方法。 在具体实施方案中，本公开提供了完整的人，人源化和嵌合的抗激活蛋白A抗体，其结合人激活素A，激活素A结合片段和此类抗体的衍生物，以及包含此类片段的激活素A-结合多肽。 其他实施方案提供编码此类抗体，抗体片段和衍生物和多肽的核酸，包含此类多核苷酸的细胞，制备此类抗体的方法，抗体片段和衍生物和多肽，以及使用此类抗体，抗体片段和衍生物和多肽的方法，包括方法 治疗或诊断具有激素A相关疾病或包括与性腺癌，其他癌症，类风湿性关节炎和其它疾病相关的恶病质的病症的受试者。

    Semiconductor local interconnect and contact
    10.
    发明授权
    Semiconductor local interconnect and contact 有权
    半导体局部互连和接触

    公开(公告)号：US08304834B2

    公开(公告)日：2012-11-06

    申请号：US11466350

    申请日：2006-08-22

    申请人： Pradeep Ramachandramurthy Yelehanka ,  Tong Qing Chen ,  Zhi Yong Han ,  Jia Zhen Zheng ,  Kelvin Ong ,  Tian Hao Gu ,  Syn Kean Cheah

    发明人： Pradeep Ramachandramurthy Yelehanka ,  Tong Qing Chen ,  Zhi Yong Han ,  Jia Zhen Zheng ,  Kelvin Ong ,  Tian Hao Gu ,  Syn Kean Cheah

    IPC分类号： H01L27/12

    CPC分类号： H01L21/76895 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

    摘要： An integrated circuit is provided. A gate dielectric and a gate are provided respectively on and over a semiconductor substrate. A junction is formed adjacent the gate dielectric and a shaped spacer is formed around the gate. A spacer is formed under the shaped spacer and a liner is formed under the spacer. A first dielectric layer is formed over the semiconductor substrate, the shaped spacer, the spacer, the liner, and the gate. A second dielectric layer is formed over the first dielectric layer. A local interconnect opening is formed in the second dielectric layer down to the first dielectric layer. The local interconnect opening in the first dielectric layer is opened to expose the junction in the semiconductor substrate and the first gate. The local interconnect openings in the first and second dielectric layers are filled with a conductive material.

    摘要翻译： 提供集成电路。 分别在半导体衬底上和上方提供栅极电介质和栅极。 在栅极电介质附近形成接合部，并且在栅极周围形成成形间隔物。 间隔件形成在成形间隔件下方，衬垫形成在间隔件下方。 第一电介质层形成在半导体衬底，成形间隔物，间隔物，衬垫和栅极上。 在第一电介质层上形成第二电介质层。 局部互连开口形成在第二电介质层中，直到第一电介质层。 打开第一介电层中的局部互连开口以暴露半导体衬底和第一栅极中的结。 第一和第二介电层中的局部互连开口用导电材料填充。