公开(公告)号：US5578559A

公开(公告)日：1996-11-26

申请号：US62118

申请日：1993-05-14

申请人： Richard Dolan ,  Paul Riccobono

发明人： Richard Dolan ,  Paul Riccobono

IPC分类号： C11D7/32 ,  C11D3/02 ,  C11D3/10 ,  C11D3/12 ,  C11D3/395 ,  C11D17/00 ,  C11D17/04 ,  C11D3/28

CPC分类号： C11D3/046 ,  C11D17/0056 ,  C11D3/10 ,  C11D3/1213 ,  C11D3/3955

摘要： A toilet cleaning block that releases a halogen containing sanitizing agent in a controlled, substantially constant rate for about 2 to about 4 months of constant contact with water and is then completely dissolved in the water comprises an admixture of about 50% to about 80% by weight of a halogen containing sanitizing agent, about 20% to about 40% by weight of a bulking agent such as aluminum hydroxide and about 1 to about 20% by weight of a sacrificial dissolution rate regulating agent such as sodium chloride.

摘要翻译： 一种厕所清洁块，其以受控的，基本上恒定的速率释放含卤素的消毒剂约2至约4个月与水恒定接触，然后完全溶解在水中，包含约50％至约80％的混合物 含卤素消毒剂的重量，约20重量％至约40重量％的填充剂如氢氧化铝和约1至约20重量％的牺牲溶解速率调节剂如氯化钠。

公开(公告)号：US20100180249A1

公开(公告)日：2010-07-15

申请号：US12354703

申请日：2009-01-15

申请人： Robert Rumsey ,  Richard Dolan ,  Haowei Wu

发明人： Robert Rumsey ,  Richard Dolan ,  Haowei Wu

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F2217/38 ,  H01L23/3114 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/10 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/30105 ,  H01L2924/014 ,  H01L2924/00

摘要： A method is described for converting an existing die, originally designed for a non-chip-scale package, to a chip-scale package die, where the die's bonding pads are located in positions within a defined grid of candidate positions. In the first step, the die's layout, comprising its outer boundaries and areas needed to be electrically connected to bonding pads, are shifted relative to a grid of candidate positions for the bonding pads until an optimal alignment is identified. Bonding pads positions on the die are then selected corresponding to optimum grid positions within the outer boundaries of the die. The die is then fabricated using the original masks to form at least the semiconductor regions and using a new set of masks for defining the new locations of the bonding pads for the chip-scale package. The chip-scale package is then bonded to a PCB using chip-scale package technology.

摘要翻译： 描述了一种用于将原来设计用于非芯片级封装的现有管芯转换为芯片级封装管芯的方法，其中管芯的焊盘位于限定的候选位置格栅内的位置。 在第一步中，包括其外部边界和需要电连接到焊盘的区域的管芯的布局相对于用于焊盘的候选位置的栅格移动，直到识别出最佳对准。 然后根据模具的外边界内的最佳网格位置选择模具上的接合焊盘位置。 然后使用原始掩模制造管芯，以形成至少半导体区域并使用新的掩模组来限定用于芯片级封装的焊盘的新位置。 芯片级封装然后使用芯片级封装技术与PCB结合。

公开(公告)号：US06371204B1

公开(公告)日：2002-04-16

申请号：US09478077

申请日：2000-01-05

申请人： Baldeo Singh ,  Richard Dolan ,  Benny Mason

发明人： Baldeo Singh ,  Richard Dolan ,  Benny Mason

IPC分类号： E21B4704

CPC分类号： E21B21/00 ,  E21B21/08 ,  E21B47/101

摘要： An apparatus for improved detection of underground well kicks, preferably comprising a first acoustic sensor mounted on the top drive of a drilling rig in acoustic contact with a liquid level within a drill string which is generally located within a wellbore, a second acoustic sensor in a trip tank connected to the wellbore, and a drawworks position indicator. The acoustic sensors detect signals reflected from liquid level interfaces allowing calculation of injected liquid volumes from the trip tank into the wellbore and liquid volume changes within the drill string. The drawworks sensor allows calculation of tubular volumes removed from the wellbore over time. Comparison or totaling of calculated volumes allows early detection of unwanted fluid fluxes between the wellbore and an underground formation.

摘要翻译： 一种用于改进地下井踢检测的装置，优选地包括安装在钻机的顶部驱动器上的声学接触中的第一声学传感器，其与通常位于井筒内的钻柱内的液位声学接触，第二声传感器在 脱水罐连接到井筒，还有一个绞车位置指示器。 声学传感器检测从液位界面反射的信号，从而可以计算从跳闸箱注入到井眼中的液体体积，并且钻柱内的液体体积变化。 绞车传感器允许计算随时间从井筒移除的管状体积。 计算体积的比较或总计允许早期检测井眼和地下地层之间的不需要的流体通量。

公开(公告)号：US5763376A

公开(公告)日：1998-06-09

申请号：US474115

申请日：1995-06-07

申请人： Kenneth Ward ,  Richard Dolan ,  Paul Riccobono

发明人： Kenneth Ward ,  Richard Dolan ,  Paul Riccobono

IPC分类号： C11D7/32 ,  C11D3/02 ,  C11D3/10 ,  C11D3/12 ,  C11D3/395 ,  C11D17/00 ,  C11D17/04 ,  C11D3/28

CPC分类号： C11D3/046 ,  C11D17/0056 ,  C11D3/10 ,  C11D3/1213 ,  C11D3/3955

摘要： A toilet cleaning block that releases a halogen containing sanitizing agent in a controlled, substantially constant rate for about 2 to about 4 months of constant contact with water and is then completely dissolved in the water comprises an admixture of about 50% to about 80% by weight of a halogen containing sanitizing agent, about 20% to about 40% by weight of a bulking agent such as aluminum hydroxide, about 0% to about 20% by weight sodium bicarbonate, and about 1 to about 20% by weight of a sacrificial dissolution rate regulating agent such as sodium chloride.

摘要翻译： 一种厕所清洁块，其以受控的，基本上恒定的速率释放含卤素的消毒剂约2至约4个月与水恒定接触，然后完全溶解在水中，包含约50％至约80％的混合物 含卤素消毒剂的重量，约20重量％至约40重量％的填充剂如氢氧化铝，约0重量％至约20重量％的碳酸氢钠和约1至约20重量％的牺牲物 溶解速率调节剂如氯化钠。

公开(公告)号：US07979813B2

公开(公告)日：2011-07-12

申请号：US12354703

申请日：2009-01-15

申请人： Robert Rumsey ,  Richard Dolan ,  Haowei Wu

发明人： Robert Rumsey ,  Richard Dolan ,  Haowei Wu

IPC分类号： G06F17/50 ,  G06F19/00 ,  H01L21/00

CPC分类号： G06F17/5068 ,  G06F2217/38 ,  H01L23/3114 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/10 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/30105 ,  H01L2924/014 ,  H01L2924/00

摘要： A method is described for converting an existing die, originally designed for a non-chip-scale package, to a chip-scale package die, where the die's bonding pads are located in positions within a defined grid of candidate positions. In the first step, the die's layout, comprising its outer boundaries and areas needed to be electrically connected to bonding pads, are shifted relative to a grid of candidate positions for the bonding pads until an optimal alignment is identified. Bonding pads positions on the die are then selected corresponding to optimum grid positions within the outer boundaries of the die. The die is then fabricated using the original masks to form at least the semiconductor regions and using a new set of masks for defining the new locations of the bonding pads for the chip-scale package. The chip-scale package is then bonded to a PCB using chip-scale package technology.

摘要翻译： 描述了一种用于将原来设计用于非芯片级封装的现有管芯转换为芯片级封装管芯的方法，其中管芯的焊盘位于限定的候选位置格栅内的位置。 在第一步中，包括其外部边界和需要电连接到焊盘的区域的管芯的布局相对于用于焊盘的候选位置的栅格移动，直到识别出最佳对准。 然后根据模具的外边界内的最佳网格位置选择模具上的接合焊盘位置。 然后使用原始掩模制造管芯，以形成至少半导体区域并使用新的掩模组来限定用于芯片级封装的焊盘的新位置。 芯片级封装然后使用芯片级封装技术与PCB结合。

公开(公告)号：US20080303097A1

公开(公告)日：2008-12-11

申请号：US11758967

申请日：2007-06-06

申请人： Martin Alter ,  Richard Dolan

发明人： Martin Alter ,  Richard Dolan

IPC分类号： H01L23/522 ,  H01L21/768

CPC分类号： H01L23/4824 ,  H01L2924/0002 ,  H01L2924/00

摘要： In one embodiment, relatively thin but wide metal bus strips overlying a high power FET are formed to conduct current to the source and drain narrow metal strips. A passivation layer is formed over the surface of the FET, and the passivation layer is etched to expose almost the entire top surface of the bus strips. A copper seed layer is then formed over the surface of the wafer, and a mask is formed to expose only the seed layer over the bus strips. The seed layer over the bus strips is then copper or gold electroplated to deposit a very thick metal layer, which effectively merges with the underlaying metal layer, to reduce on-resistance. The plating metal does not need to be passivated due to its thickness and wide line/space. Other techniques may also be used for depositing a thick metal over the exposed bus strips.

摘要翻译： 在一个实施例中，形成覆盖大功率FET的较薄但宽的金属母线，以将电流传导到源极并且排出窄金属条。 在FET的表面上形成钝化层，并且钝化层被蚀刻以暴露总线条的几乎整个顶表面。 然后在晶片的表面上形成铜籽晶层，并且形成掩模以仅露出母线上的种子层。 母线上的籽晶层然后是铜或金电镀以沉积非常厚的金属层，其有效地与底层金属层合并，以降低导通电阻。 电镀金属由于其厚度和宽线/空间而不需要钝化。 其他技术也可用于在暴露的母线上沉积厚金属。

公开(公告)号：US07586132B2

公开(公告)日：2009-09-08

申请号：US11758967

申请日：2007-06-06

申请人： Martin Alter ,  Richard Dolan

发明人： Martin Alter ,  Richard Dolan

IPC分类号： H01L27/10 ,  H01L29/74 ,  H01L29/739 ,  H01L29/73 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L23/4824 ,  H01L2924/0002 ,  H01L2924/00

摘要： In one embodiment, relatively thin but wide metal bus strips overlying a high power FET are formed to conduct current to the source and drain narrow metal strips. A passivation layer is formed over the surface of the FET, and the passivation layer is etched to expose almost the entire top surface of the bus strips. A copper seed layer is then formed over the surface of the wafer, and a mask is formed to expose only the seed layer over the bus strips. The seed layer over the bus strips is then copper or gold electroplated to deposit a very thick metal layer, which effectively merges with the underlaying metal layer, to reduce on-resistance. The plating metal does not need to be passivated due to its thickness and wide line/space. Other techniques may also be used for depositing a thick metal over the exposed bus strips.

摘要翻译： 在一个实施例中，形成覆盖大功率FET的较薄但宽的金属母线，以将电流传导到源极并且排出窄金属条。 在FET的表面上形成钝化层，并且钝化层被蚀刻以暴露总线条的几乎整个顶表面。 然后在晶片的表面上形成铜籽晶层，并且形成掩模以仅露出母线上的种子层。 母线上的籽晶层然后是铜或金电镀以沉积非常厚的金属层，其有效地与底层金属层合并，以降低导通电阻。 电镀金属由于其厚度和宽线/空间而不需要钝化。 其他技术也可用于在暴露的母线上沉积厚金属。