公开(公告)号：US4874354A

公开(公告)日：1989-10-17

申请号：US256397

申请日：1988-10-11

申请人： Robert B. Johnson ,  Robert P. Smith

发明人： Robert B. Johnson ,  Robert P. Smith

IPC分类号： B31B7/00 ,  B65B43/30

CPC分类号： B65B43/30 ,  B31B2217/0053

摘要： The invention provides an apparatus and method for automatically opening a plastic bag-type liner as part of a container lining process. The apparatus comprises at least one movable jaw assembly disposed on each side of the liner to be opened and a tongue on the other side of the liner opposing each jaw assembly. To open the bag, the jaws are opened and the jaw assemblies are moved toward and contact the liner and the opposing tongue pushes the liner between the gripping surfaces of the jaws of the opposing jaw assembly as the jaw assemblies begin to move apart, the jaws close, gripping and retaining the layer of liner in direct contact with the gripping surfaces of each jaw, the tongues slide out from between the layers of the liner, separating the sides of the unsealed end of the liner. A stream of air may then be directed into the open end of the bag for completely blowing the bag open prior to placing the bag over the open end of the container to be lined and forcing the liner into the container.

摘要翻译： 本发明提供一种自动打开塑料袋式衬套作为容器衬里工艺的一部分的装置和方法。 该装置包括设置在待打开的衬垫的每一侧上的至少一个活动夹爪组件和位于衬套的另一侧上的与每个夹爪组件相对的舌头。 为了打开袋子，钳口被打开并且钳夹组件移动并接触衬套，并且当钳口组件开始移动时，相对的舌片将相对的钳口组件的钳口的夹持表面推动到衬套的夹持表面之间，钳口 闭合，夹持和保持衬垫层与每个夹爪的抓握表面直接接触，舌片从衬垫层之间滑出，分离衬垫的未密封端的侧面。 然后可以将空气流引导到袋的开口端中，以在将袋放置在待衬里的容器的开口端上并迫使衬垫进入容器之前完全吹动袋打开。

公开(公告)号：US4545010A

公开(公告)日：1985-10-01

申请号：US480964

申请日：1983-03-31

申请人： Edward R. Salas ,  Edwin P. Fisher ,  Robert B. Johnson ,  Chester M. Nibby, Jr. ,  Daniel A. Boudreau

发明人： Edward R. Salas ,  Edwin P. Fisher ,  Robert B. Johnson ,  Chester M. Nibby, Jr. ,  Daniel A. Boudreau

IPC分类号： G06F12/06 ,  G06F13/00

CPC分类号： G06F12/0653

摘要： A memory system includes at least one or more memory module boards identical in construction and a single computer board containing the control circuits for controlling memory operations. Each board plugs into the main board and includes a memory section having a number of rows of memory chips and an identification section containing circuits for generating signals indicating the board density and the type of memory parts used in constructing the board's memory section. The main board control circuits include a number of decoder circuits which couple to the identification and to the memory section of each memory module board. The decoder circuits receive different address bit combinations of a predetermined multibit address portion of each memory request address. In response to signals generated by the identification sections of the installed memory boards, the decoder circuits are selectively enabled to decode those bit combinations of the address portion specified by the sections for enabling successive addressing of all of the blocks of location within the system.

摘要翻译： 存储器系统包括至少一个或多个存储器模块板，其结构相同，以及包含用于控制存储器操作的控制电路的单个计算机板。 每个板插入主板，并且包括具有多行存储器芯片的存储器部分和用于产生指示板密度的信号的电路的识别部分和用于构建电路板存储部分的存储器部件的类型的识别部分。 主板控制电路包括耦合到每个存储器模块板的识别和存储器部分的多个解码器电路。 解码器电路接收每个存储器请求地址的预定多位地址部分的不同地址位组合。 响应于由所安装的存储器板的识别部分产生的信号，解码器电路被选择性地能够解码由这些部分指定的地址部分的那些比特组合，以便能够对系统内的所有位置块进行连续寻址。

公开(公告)号：US4359771A

公开(公告)日：1982-11-16

申请号：US172486

申请日：1980-07-25

申请人： Robert B. Johnson ,  Chester M. Nibby, Jr.

发明人： Robert B. Johnson ,  Chester M. Nibby, Jr.

IPC分类号： G06F12/16 ,  G06F11/10 ,  G06F11/22 ,  G06F11/267 ,  G11C11/406 ,  G11C29/00 ,  G11C29/42

CPC分类号： G06F11/2215 ,  G06F11/106 ,  G11C11/406

摘要： Soft error rewrite control apparatus is included within a memory system for rendering the semiconductor memory modules less susceptible to single bit errors produced by alpha particles and other system disturbances. During a number of successive memory cycles occurring at a predetermined rate, the soft error rewrite control apparatus enables the read out of information stored within each module location, the correction of any single bit errors contained therein and the rewriting of the corrected information back into such location. Diagnostic apparatus is further included which is connected to place the memory system in a state for testing and verifying the operation of the soft error control apparatus. Also, the diagnostic apparatus is connected to condition the soft error control apparatus for operating in a high speed mode enabling the read out correction and rewriting of each location to take place within a minimum amount of time. By monitoring the status of the information being corrected, the diagnostic apparatus is able to signal whether or not the soft error control apparatus is operating properly.

摘要翻译： 软错误重写控制装置包括在存储器系统内，用于使半导体存储器模块不易受由α粒子和其他系统干扰产生的单位错误的影响。 在以预定速率发生的多个连续存储循环期间，软错误重写控制装置使得能够读出存储在每个模块位置内的信息，校正其中包含的任何单个位错误，以及将校正后的信息重新写入其中 位置。 还包括诊断装置，其连接以将存储器系统置于用于测试和验证软错误控制装置的操作的状态。 此外，诊断装置被连接以对软错误控制装置进行调整，以便在高速模式下操作，使得能够在最小时间内进行每个位置的读出校正和重写。 通过监视正在修正的信息的状态，诊断装置能够通知软错误控制装置是否正常工作。

公开(公告)号：US4255852A

公开(公告)日：1981-03-17

申请号：US57783

申请日：1979-07-16

申请人： Robert B. Johnson ,  Chester M. Nibby, Jr.

发明人： Robert B. Johnson ,  Chester M. Nibby, Jr.

IPC分类号： H05K1/00 ,  H05K1/11 ,  H05K3/32

CPC分类号： H05K1/116 ,  H05K1/029 ,  H05K1/0295 ,  H05K1/0298 ,  H05K2201/09954 ,  H05K2201/10689 ,  Y10T29/49139

摘要： A printed circuit board assembly includes at least two layers which is able to accommodate a subsystem such as a memory subsystem designed to have one or more optional features. The two layers of the printed circuit board when etched include the required number of horizontal and vertical paths to be connected to all of the integrated circuit chips to be positioned and interconnected thereon. The required holes for such integrated circuit chips when drilled include first sets of holes for mounting groups of integrated circuit chips required for implementing a first group of features and which are to be interconnected to the other integrated circuit chips of the subsystem mounted on the different sections of the board. Second sets of holes are included on the board so as to have a predetermined relationship with the first sets of holes for mounting alternative groups of integrated circuit chips to be interconnected in a manner to implement other features. Thereafter, the circuit board is populated with only those integrated circuit chips required for construction of a memory subsystem with one or more selected features.

摘要翻译： 印刷电路板组件包括至少两层，其能够容纳诸如设计成具有一个或多个可选特征的存储器子系统的子系统。 当蚀刻时，印刷电路板的两层包括要连接到要定位和互连在其上的所有集成电路芯片的所需数量的水平和垂直路径。 用于这种集成电路芯片的所需的孔在钻孔时包括用于实现第一组特征所需的集成电路芯片组的第一组孔，并且其将被连接到安装在不同部分上的子系统的其它集成电路芯片 的董事会。 第二组孔包括在板上，以便与第一组孔相关联，以便以相互连接的替代的集成电路芯片组来实现其他特征。 此后，电路板仅填充用于构造具有一个或多个所选特征的存储器子系统所需的那些集成电路芯片。

公开(公告)号：US4120008A

公开(公告)日：1978-10-10

申请号：US729620

申请日：1976-10-05

申请人： Lenard M. Metzger ,  Robert B. Johnson

发明人： Lenard M. Metzger ,  Robert B. Johnson

IPC分类号： G11B5/588 ,  H04N5/795

CPC分类号： G11B5/588

摘要： A tracking control apparatus, for use with a rotating-head magnetic tape player, provides a tracking control head in fixed rotational association with a playback head so that both scan corresponding parallel paths across the width of the tape in fixed relationship with each other. By so mounting the tracking control head that it overlaps adjacent recorded tracks and senses periodic information included therein, the apparatus provides a control signal for driving a tape capstan servo without need for the additional control track usually required by such apparatus. The periodic information may be, for example, the horizontal sync of a video signal in the adjacent tracks; the control signal is then derived from a comparison of the respective amplitudes of such horizontal component from each track. Since the overlapping position of the tracking head is fixedly related to the tracking position of the playback head, the control signal is indicative of the tracking alignment of the playback head itself. By further mounting the tracking head on the playback head wheel, and by using the record head during playback for such purpose, a dynamic real-time tracking apparatus is provided which additionally dispenses with a separate tracking control head.

摘要翻译： 与旋转磁头磁带播放器一起使用的跟踪控制装置提供与重放头固定旋转相关联的跟踪控制头，使得两者跨越磁带宽度的相应的平行路径以彼此固定的关系扫描。 通过这样安装跟踪控制头，其与相邻记录的轨道重叠并感测其中包含的周期性信息，该装置提供用于驱动带状主轴伺服器的控制信号，而不需要通常由这种装置需要的附加控制轨迹。 周期性信息可以是例如相邻轨道中的视频信号的水平同步; 然后从每个轨道的这种水平分量的相应振幅的比较导出控制信号。 由于跟踪头的重叠位置与重放头的跟踪位置固定相关，所以控制信号表示回放头本身的跟踪对准。 通过进一步将跟踪头安装在重放头轮上，并且通过在用于此目的的回放期间使用记录头，提供动态实时跟踪装置，附加地分配了单独的跟踪控制头。

公开(公告)号：US4114831A

公开(公告)日：1978-09-19

申请号：US720288

申请日：1976-09-03

申请人： Robert B. Johnson

发明人： Robert B. Johnson

IPC分类号： G11B15/32 ,  G11B23/093 ,  G11B23/10

CPC分类号： G11B15/32 ,  G11B23/093

摘要： A reel drive apparatus is provided for driving the reels of a coaxial-reel tape cassette in fast forward or reverse. In one embodiment, as the cassette is placed on a tape recorder, a friction wheel mounted for rotation on a flexible shaft extending from the recorder locates in a space defined between a pair of concentric flanges mounted for rotation with respect to the reels. The friction wheel is disposed to alternately engage the concentric flanges and reversibly drive the reels. By securing each flange to a corresponding one of the coaxial reels, the tape is positively transported in either direction.

摘要翻译： 卷轴驱动装置用于快速或反向地驱动同轴卷带盒的卷轴。 在一个实施例中，当盒被放置在磁带记录器上时，安装用于在从记录器延伸的柔性轴上旋转的摩擦轮位于限定在相对于卷轴旋转的一对同心凸缘之间的空间中。 摩擦轮设置成交替地接合同心凸缘并可逆地驱动卷轴。 通过将每个凸缘固定到同轴卷轴中相应的一个，带子沿任一方向被正向输送。

公开(公告)号：US4060794A

公开(公告)日：1977-11-29

申请号：US672103

申请日：1976-03-31

申请人： Paul S. Feldman ,  Robert B. Johnson ,  Chester M. Nibby, Jr.

发明人： Paul S. Feldman ,  Robert B. Johnson ,  Chester M. Nibby, Jr.

IPC分类号： G11C7/00 ,  G06F13/42 ,  G11C11/4076 ,  G11C11/408 ,  G06F13/00

CPC分类号： G06F13/4243 ,  G11C11/4076 ,  G11C11/408

摘要： Apparatus and a method for generating timing signals to be utilized in latched type memories only when the address signals are valid. A CAS signal is generated in response to an RAS signal via a device which tracks the worst case delay of memory address signals and does not permit the application of the CAS signal to memory until the worst case delay of the memory address signals has been accounted for.A memory array is comprised of any combination of latched or non-latched tri-state memories. The latched memories are coupled to a data bus utilizing conventional TTL circuits in combination with a power driver to simulate conventional tri-state buffer circuits. When the power driver/drivers remove(s) power from TTL circuits, the tri-state characteristics are simulated; whereas when the power driver applies power to the TTL circuits, they operate in their normal mode and present a normal impedance between the data bus and data-out lines of the memory array.

摘要翻译： 仅在地址信号有效时才产生用于锁存型存储器中的定时信号的装置和方法。 通过经追踪存储器地址信号的最坏情况延迟的设备产生响应于RAS信号的CAS信号，并且不允许将CAS信号应用于存储器，直到存储器地址信号的最差情况延迟已被考虑 。

公开(公告)号：US4030084A

公开(公告)日：1977-06-14

申请号：US636276

申请日：1975-11-28

申请人： Edwin P. Fisher ,  Robert B. Johnson

发明人： Edwin P. Fisher ,  Robert B. Johnson

IPC分类号： G11C11/407 ,  G05F3/20 ,  G11C11/406 ,  H01L21/822 ,  H01L27/04 ,  G11C11/40

CPC分类号： G11C11/406 ,  G05F3/205

摘要： Apparatus and method for generating substrate bias for the refresh apparatus of volatile memory elements associated with data processing units. A refresh oscillator in the refresh apparatus is utilized to drive a chopper circuit or high level driver in combination with a rectifier network for obtaining raw negative voltage. The raw voltage is filtered and adjusted to the correct value on the metal oxide semiconductor (MOS) memory board and distributed to each random access memory (RAM).

摘要翻译： 用于产生用于与数据处理单元相关联的易失性存储元件的刷新装置的衬底偏置的装置和方法。 刷新装置中的刷新振荡器用于与整流器网络一起驱动斩波电路或高电平驱动器以获得原始负电压。 将原始电压滤波并调整到金属氧化物半导体（MOS）存储板上的正确值，并分配给每个随机存取存储器（RAM）。

公开(公告)号：US3967139A

公开(公告)日：1976-06-29

申请号：US528599

申请日：1974-12-02

申请人： Robert B. Johnson ,  Paul S. Feldman ,  Edwin P. Fisher

发明人： Robert B. Johnson ,  Paul S. Feldman ,  Edwin P. Fisher

IPC分类号： G11C11/4096 ,  H03K19/013 ,  H03K17/00

CPC分类号： G11C11/4096 ,  H03K19/0136

摘要： An apparatus is disclosed which comprises an improved voltage driver circuit. Commonly available voltage driver circuits are deficient for driving n-channel MOS RAMs due to insufficient peak voltage and extended rise time. The apparatus, without requiring an additional voltage power supply or modifications to the memory system environment, effectively increases an internal drive voltage which results in the desired performance characteristics for driver circuits.

摘要翻译： 公开了一种包括改进的电压驱动器电路的装置。 由于峰值电压不足和上升时间延长，常用的电压驱动电路不足以驱动n沟道MOS RAM。 该设备在不需要额外的电压电源或对存储器系统环境的修改的情况下，有效地增加了内部驱动电压，这导致驱动器电路所需的性能特性。

公开(公告)号：US07619008B2

公开(公告)日：2009-11-17

申请号：US11194039

申请日：2005-07-29

申请人： Shu-Ping Yang ,  Lei Huang ,  Stephanie M. Martin ,  Julie Villanueva ,  Sharon Greene ,  Kelly Arehart ,  Curtis Sayre ,  Robert B. Johnson

发明人： Shu-Ping Yang ,  Lei Huang ,  Stephanie M. Martin ,  Julie Villanueva ,  Sharon Greene ,  Kelly Arehart ,  Curtis Sayre ,  Robert B. Johnson

IPC分类号： A61K31/045

CPC分类号： A61K31/7004 ,  A61K9/0034 ,  A61K31/047

摘要： A vaginal treatment composition that employs a therapeutic agent to inhibit and/or treat vaginal infection is provided. The therapeutic agent is capable of inhibiting and/or killing Gardnerella (e.g., Gardnerella vaginalis), Candida (e.g., Candida albicans), and/or Trichomonas (e.g., Trichomonas vaginalis) pathogens. Desirably, such antimicrobial efficacy is achieved without substantially inhibiting the growth of Lactobacillus acidophilus. For instance, sugars and/or sugar alcohols may be employed in the present invention as a therapeutic agent for inhibiting and/or treating vaginal infection. In one particular embodiment, D-xylitol is used as the therapeutic agent.

摘要翻译： 提供了使用治疗剂抑制和/或治疗阴道感染的阴道治疗组合物。 治疗剂能够抑制和/或杀死加德纳（Gardnerella vaginalis），念珠菌（例如白色念珠菌）和/或滴虫（例如阴道毛滴虫）病原体。 理想地，实现了这样的抗微生物效能，而基本上不抑制嗜酸乳杆菌的生长。 例如，本发明中可以使用糖和/或糖醇作为抑制和/或治疗阴道感染的治疗剂。 在一个具体实施方案中，D-木糖醇用作治疗剂。