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    Self-aligned emitter-base in advanced BiCMOS technology
    1.
    发明授权
    Self-aligned emitter-base in advanced BiCMOS technology 失效
    先进的BiCMOS技术中的自对准发射极基极

    公开(公告)号：US08716096B2

    公开(公告)日：2014-05-06

    申请号：US13323977

    申请日：2011-12-13

    申请人： Kevin K. Chan ,  David L. Harame ,  Russell T. Herrin ,  Qizhi Liu

    发明人： Kevin K. Chan ,  David L. Harame ,  Russell T. Herrin ,  Qizhi Liu

    IPC分类号： H01L21/331 ,  H01L21/8222

    CPC分类号： H01L29/737 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/732 ,  H01L29/7371

    摘要： A self-aligned bipolar transistor and method of fabricating the same are disclosed. In an embodiment, a substrate and an intrinsic base are provided, followed by a first oxide layer, and an extrinsic base over the first oxide layer. A first opening is formed, exposing a portion of a surface of the extrinsic base. Sidewall spacers are formed in the first opening, and a self-aligned oxide mask is selectively formed on the exposed surface of the extrinsic base. The spacers are removed, and using the self-aligned oxide mask, the exposed extrinsic base and the first oxide layer are etched to expose the intrinsic base layer, forming a first and a second slot. A silicon layer stripe is selectively grown on the exposed intrinsic and/or extrinsic base layers in each of the first and second slots, substantially filling the respective slot.

    摘要翻译： 公开了一种自对准双极晶体管及其制造方法。 在一个实施例中，提供衬底和本征基极，随后是第一氧化物层，以及在第一氧化物层上的外部基极。 形成第一开口，暴露外部基底的表面的一部分。 在第一开口中形成侧壁间隔物，并且在外基的暴露表面上选择性地形成自对准氧化物掩模。 去除间隔物，并且使用自对准氧化物掩模，暴露的非本征基底和第一氧化物层被蚀刻以暴露本征基底层，形成第一和第二狭槽。 在第一和第二槽中的每一个中的暴露的本征和/或非本征基极层上选择性地生长硅层条纹，基本上填充相应的槽。

    Transistor structure with a sidewall-defined intrinsic base to extrinsic base link-up region and method of forming the structure
    2.
    发明授权
    Transistor structure with a sidewall-defined intrinsic base to extrinsic base link-up region and method of forming the structure 有权
    具有侧壁限定的内在基极到外部基极连接区域的晶体管结构和形成该结构的方法

    公开(公告)号：US08405186B2

    公开(公告)日：2013-03-26

    申请号：US12817249

    申请日：2010-06-17

    申请人： Renata Camillo-Castillo ,  Mattias E. Dahlstrom ,  Peter B. Gray ,  David L. Harame ,  Russell T. Herrin ,  Alvin J. Joseph ,  Andreas D. Stricker

    发明人： Renata Camillo-Castillo ,  Mattias E. Dahlstrom ,  Peter B. Gray ,  David L. Harame ,  Russell T. Herrin ,  Alvin J. Joseph ,  Andreas D. Stricker

    IPC分类号： H01L21/70

    CPC分类号： H01L29/732 ,  H01L29/66242 ,  H01L29/66287 ,  H01L29/7378

    摘要： Disclosed are embodiments of an improved transistor structure (e.g., a bipolar transistor (BT) structure or heterojunction bipolar transistor (HBT) structure) and a method of forming the transistor structure. The structure embodiments can incorporate a dielectric layer sandwiched between an intrinsic base layer and a raised extrinsic base layer to reduce collector-base capacitance Ccb, a sidewall-defined conductive strap for an intrinsic base layer to extrinsic base layer link-up region to reduce base resistance Rb and a dielectric spacer between the extrinsic base layer and an emitter layer to reduce base-emitter Cbe capacitance. The method embodiments allow for self-aligning of the emitter to base regions and further allow the geometries of different features (e.g., the thickness of the dielectric layer, the width of the conductive strap, the width of the dielectric spacer and the width of the emitter layer) to be selectively adjusted in order to optimize transistor performance.

    摘要翻译： 公开了改进的晶体管结构（例如，双极晶体管（BT）结构或异质结双极晶体管（HBT）结构）的实施例以及形成晶体管结构的方法。 结构实施例可以包括夹在本征基极层和凸起的非本征基极层之间的电介质层，以将集电极 - 基极电容Ccb，用于本征基极层的侧壁限定导电带限制到外部基极层连接区域以减少基极 电阻Rb和外部基极层和发射极层之间的介电间隔物，以减少基极 - 发射极的Cbe电容。 该方法实施例允许发射极与基极区域的自对准，并进一步允许不同特征的几何形状（例如，电介质层的厚度，导电带的宽度，电介质间隔物的宽度和介电隔离物的宽度 发射极层）进行选择性调整，以优化晶体管性能。

    TRANSISTOR STRUCTURE WITH A SIDEWALL-DEFINED INTRINSIC BASE TO EXTRINSIC BASE LINK-UP REGION AND METHOD OF FORMING THE STRUCTURE
    5.
    发明申请
    TRANSISTOR STRUCTURE WITH A SIDEWALL-DEFINED INTRINSIC BASE TO EXTRINSIC BASE LINK-UP REGION AND METHOD OF FORMING THE STRUCTURE 有权
    具有侧向定义的内部基极到极端基底连接区域的晶体管结构及形成结构的方法

    公开(公告)号：US20110309471A1

    公开(公告)日：2011-12-22

    申请号：US12817249

    申请日：2010-06-17

    申请人： Renata Camillo-Castillo ,  Mattias E. Dahlstrom ,  Peter B. Gray ,  David L. Harame ,  Russell T. Herrin ,  Alvin J. Joseph ,  Andreas D. Stricker

    发明人： Renata Camillo-Castillo ,  Mattias E. Dahlstrom ,  Peter B. Gray ,  David L. Harame ,  Russell T. Herrin ,  Alvin J. Joseph ,  Andreas D. Stricker

    IPC分类号： H01L29/73 ,  H01L21/331

    CPC分类号： H01L29/732 ,  H01L29/66242 ,  H01L29/66287 ,  H01L29/7378

    摘要： Disclosed are embodiments of an improved transistor structure (e.g., a bipolar transistor (BT) structure or heterojunction bipolar transistor (HBT) structure) and a method of forming the transistor structure. The structure embodiments can incorporate a dielectric layer sandwiched between an intrinsic base layer and a raised extrinsic base layer to reduce collector-base capacitance Ccb, a sidewall-defined conductive strap for an intrinsic base layer to extrinsic base layer link-up region to reduce base resistance Rb and a dielectric spacer between the extrinsic base layer and an emitter layer to reduce base-emitter Cbe capacitance. The method embodiments allow for self-aligning of the emitter to base regions and further allow the geometries of different features (e.g., the thickness of the dielectric layer, the width of the conductive strap, the width of the dielectric spacer and the width of the emitter layer) to be selectively adjusted in order to optimize transistor performance.

    摘要翻译： 公开了改进的晶体管结构（例如，双极晶体管（BT）结构或异质结双极晶体管（HBT）结构）的实施例以及形成晶体管结构的方法。 结构实施例可以包括夹在本征基极层和凸起的非本征基极层之间的电介质层，以将集电极 - 基极电容Ccb，用于本征基极层的侧壁限定导电带限制到外部基极层连接区域以减少基极 电阻Rb和外部基极层和发射极层之间的介电间隔物，以减少基极 - 发射极的Cbe电容。 该方法实施例允许发射极与基极区域的自对准，并进一步允许不同特征的几何形状（例如，电介质层的厚度，导电带的宽度，电介质间隔物的宽度和介电隔离物的宽度 发射极层）进行选择性调整，以优化晶体管性能。

    Photomasks having sub-lithographic features to prevent undesired wafer patterning
    6.
    发明申请
    Photomasks having sub-lithographic features to prevent undesired wafer patterning 审中-公开
    具有亚光刻特征以防止不期望的晶片图案化的光掩模

    公开(公告)号：US20110177435A1

    公开(公告)日：2011-07-21

    申请号：US12690312

    申请日：2010-01-20

    申请人： Russell T. Herrin ,  Edmund J. Sprogis ,  Anthony K. Stamper

    发明人： Russell T. Herrin ,  Edmund J. Sprogis ,  Anthony K. Stamper

    IPC分类号： G03F1/00

    CPC分类号： G03F1/42 ,  G03F1/36 ,  G03F1/38

    摘要： A photomask that is used as a light filter in an exposure system is made of at least one layer of material comprising one or more transparent regions and one or more non-transparent regions. The difference between the transparent regions and the non-transparent regions defines the features that will be illuminated by the exposure system on a photoresist that will be exposed using the exposure system. The features comprise one or more device shapes and at least one sub-lithographic shape that will be exposed upon the photoresist. The sub-lithographic shape has an sub-lithographic shape size that is limited in such a way that the sub-lithographic shape causes a physical change only in a surface of the photoresist. Therefore, because the sub-lithographic shape is so small, it avoids forming an opening through the photoresist after the photoresist is developed and only causes a change on the surface of the photoresist.

    摘要翻译： 在曝光系统中用作滤光器的光掩模由包括一个或多个透明区域和一个或多个不透明区域的至少一层材料制成。 透明区域和不透明区域之间的差异限定了曝光系统将在将使用曝光系统曝光的光刻胶上照亮的特征。 这些特征包括一个或多个器件形状和将被暴露在光刻胶上的至少一个亚光刻形状。 亚光刻形状具有亚光刻形状尺寸，其受到限制，使得亚光刻形状仅在光致抗蚀剂的表面引起物理变化。 因此，由于亚光刻形状如此之小，因此避免了在光致抗蚀剂显影之后通过光致抗蚀剂形成开口，并且仅引起光致抗蚀剂表面的变化。

    SELF-ALIGNED EMITTER-BASE IN ADVANCED BiCMOS TECHNOLOGY
    7.
    发明申请
    SELF-ALIGNED EMITTER-BASE IN ADVANCED BiCMOS TECHNOLOGY 失效
    自制BiCMOS技术中的自对准发射体

    公开(公告)号：US20130146947A1

    公开(公告)日：2013-06-13

    申请号：US13323977

    申请日：2011-12-13

    申请人： Kevin K. Chan ,  David L. Harame ,  Russell T. Herrin ,  Qizhi Liu

    发明人： Kevin K. Chan ,  David L. Harame ,  Russell T. Herrin ,  Qizhi Liu

    IPC分类号： H01L29/737 ,  H01L21/331

    CPC分类号： H01L29/737 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/732 ,  H01L29/7371

    摘要： A self-aligned bipolar transistor and method of fabricating the same are disclosed. In an embodiment, a substrate and an intrinsic base are provided, followed by a first oxide layer, and an extrinsic base over the first oxide layer. A first opening is formed, exposing a portion of a surface of the extrinsic base. Sidewall spacers are formed in the first opening, and a self-aligned oxide mask is selectively formed on the exposed surface of the extrinsic base. The spacers are removed, and using the self-aligned oxide mask, the exposed extrinsic base and the first oxide layer are etched to expose the intrinsic base layer, forming a first and a second slot. A silicon layer stripe is selectively grown on the exposed intrinsic and/or extrinsic base layers in each of the first and second slots, substantially filling the respective slot.

    摘要翻译： 公开了一种自对准双极晶体管及其制造方法。 在一个实施例中，提供衬底和本征基极，随后是第一氧化物层，以及在第一氧化物层上的外部基极。 形成第一开口，暴露外部基底的表面的一部分。 在第一开口中形成侧壁间隔物，并且在外基的暴露表面上选择性地形成自对准氧化物掩模。 去除间隔物，并且使用自对准氧化物掩模，暴露的非本征基底和第一氧化物层被蚀刻以暴露本征基底层，形成第一和第二狭槽。 在第一和第二槽中的每一个中的暴露的本征和/或非本征基极层上选择性地生长硅层条纹，基本上填充相应的槽。