公开(公告)号：US07087997B2

公开(公告)日：2006-08-08

申请号：US09805027

申请日：2001-03-12

申请人： Lloyd G. Burrell ,  Edward E. Cooney, III ,  Jeffrey P. Gambino ,  John E. Heidenreich, III ,  Hyun Koo Lee ,  Mark D. Levy ,  Baozhen Li ,  Stephen E. Luce ,  Thomas L. McDevitt ,  Anthony K. Stamper ,  Kwong Hon Wong ,  Sally J. Yankee

发明人： Lloyd G. Burrell ,  Edward E. Cooney, III ,  Jeffrey P. Gambino ,  John E. Heidenreich, III ,  Hyun Koo Lee ,  Mark D. Levy ,  Baozhen Li ,  Stephen E. Luce ,  Thomas L. McDevitt ,  Anthony K. Stamper ,  Kwong Hon Wong ,  Sally J. Yankee

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76843 ,  H01L21/76838 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53228 ,  H01L2924/0002 ,  H01L2924/00

摘要： Tungsten studs of a size comparable to vias are provided to integrate and interface between copper and aluminum metallization layers in an integrated circuit and/or package therefor by lining a via opening, preferably with layers of tantalum nitride and PVD tungsten as a barrier against the corrosive effects of tungsten fluoride on copper. The reduced size of the tungsten studs relative to known interface structures allows wiring and connection pads to be formed in a single aluminum layer, improving performance and reducing process time and cost.

公开(公告)号：US06798066B1

公开(公告)日：2004-09-28

申请号：US10249910

申请日：2003-05-16

申请人： William T. Motsiff ,  Timothy D. Sullivan ,  Jean E. Wynne ,  Sally J. Yankee

发明人： William T. Motsiff ,  Timothy D. Sullivan ,  Jean E. Wynne ,  Sally J. Yankee

IPC分类号： H01L2348

CPC分类号： H01L23/60 ,  H01L23/36 ,  H01L23/367 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention relates to dissipating heat from an interconnect formed in a low thermal conductivity dielectric in an integrated circuit apparatus. The integrated circuit apparatus includes integrated circuit devices interconnected by conductive interconnection metallurgy and input/output pads subject to electrostatic discharge events. At least one latent heat of transformation absorber is associated with at least one of the input/output pads for preventing the energy generated by an electrostatic discharge event from damaging the conductive interconnection metallurgy.

摘要翻译： 本发明涉及从形成在集成电路装置中的低导热电介质中的互连件散热。 集成电路装置包括通过导电互连冶金互连的集成电路装置和经受静电放电事件的输入/输出垫。 至少一个变换吸收器的潜热与至少一个输入/输出焊盘相关联，用于防止由静电放电事件产生的能量损坏导电互连冶金。

公开(公告)号：US06650021B2

公开(公告)日：2003-11-18

申请号：US10005951

申请日：2001-12-03

申请人： Anthony K. Stamper ,  Sally J. Yankee

发明人： Anthony K. Stamper ,  Sally J. Yankee

IPC分类号： H01L2348

CPC分类号： H01L24/05 ,  H01L23/522 ,  H01L23/5222 ,  H01L23/5329 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/451 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/4912 ,  H01L2224/85424 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/05552

摘要： A recessed bond pad within an electronic device on a substrate, and associated method of fabrication. The electronic device includes N contiguous levels of interconnect metallurgy, with level N coupled to the substrate. A first group of metallic etch stops is formed at level M≦N, and a second group of metallic etch stops is formed at level M−1. The second group conductively contacts the first group in an overlapping multilevel matrix pattern. A recessed copper pad is formed at level K≦M−2. A cylindrical space that encloses the metal pad encompasses levels 1,2, . . . , M−1 above the first group, and levels 1,2, . . . , M−2 above the second group. Dielectric material in the cylindrical space is etched away, leaving a void supplanting the etched dielectric material, and leaving exposed surfaces of the cylindrical space. The copper pad is exposed and recessed within the cylindrical space. An aluminum layer is conformally formed to encapsulate the exposed copper pad, to protect the copper pad from oxidation. The recessed bond pad includes the copper pad and the encapsulating aluminum layer. A blanket is formed that covers remaining exposed surfaces of the cylindrical space while leaving a portion of the aluminum layer of the bond pad exposed. The blanket protects the surfaces from oxidation, contaminants, and mechanical stress. The recessing of the bond pad prevents force applied to a wirebond on the bond pad from being transmitted to dielectric material within the substrate.

公开(公告)号：US06420254B1

公开(公告)日：2002-07-16

申请号：US09996538

申请日：2001-11-28

申请人： Anthony K. Stamper ,  Sally J. Yankee

发明人： Anthony K. Stamper ,  Sally J. Yankee

IPC分类号： H01L2144

CPC分类号： H01L24/05 ,  H01L23/522 ,  H01L23/5222 ,  H01L23/5329 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/451 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/4912 ,  H01L2224/85424 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/05552

摘要： A recessed bond pad within an electronic device on a substrate, and associated method of fabrication. The electronic device includes N contiguous levels of interconnect metallurgy, with level N coupled to the substrate. A first group of metallic etch stops is formed at level M≦N, and a second group of metallic etch stops is formed at level M−1. The second group conductively contacts the first group in an overlapping multilevel matrix pattern. A recessed copper pad is formed at level K≦M−2. A cylindrical space that encloses the metal pad encompasses levels 1,2, . . . , M−1 above the first group, and levels 1,2, . . . , M−2 above the second group. Dielectric material in the cylindrical space is etched away, leaving a void supplanting the etched dielectric material, and leaving exposed surfaces of the cylindrical space. The copper pad is exposed and recessed within the cylindrical space. An aluminum layer is conformally formed to encapsulate the exposed copper pad, to protect the copper pad from oxidation. The recessed bond pad includes the copper pad and the encapsulating aluminum layer. A blanket is formed that covers remaining exposed surfaces of the cylindrical space while leaving a portion of the aluminum layer of the bond pad exposed. The blanket protects the surfaces from oxidation, contaminants, and mechanical stress. The recessing of the bond pad prevents force applied to a wirebond on the bond pad from being transmitted to dielectric material within the substrate.

公开(公告)号：US06362531B1

公开(公告)日：2002-03-26

申请号：US09564626

申请日：2000-05-04

申请人： Anthony K. Stamper ,  Sally J. Yankee

发明人： Anthony K. Stamper ,  Sally J. Yankee

IPC分类号： H01L2348

CPC分类号： H01L24/05 ,  H01L23/522 ,  H01L23/5222 ,  H01L23/5329 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/451 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/4912 ,  H01L2224/85424 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/05552

摘要： A recessed bond pad within an electronic device on a substrate, and associated method of fabrication. The electronic device includes N contiguous levels of interconnect metallurgy, with level N coupled to the substrate. A first group of metallic etch stops is formed at level M≦N, and a second group of metallic etch stops is formed at level M−1. The second group conductively contacts the first group in an overlapping multilevel matrix pattern. A recessed copper pad is formed at level K≦M−2. A cylindrical space that encloses the metal pad encompasses levels 1,2, . . . , M−1 above the first group, and levels 1,2, . . . , M−2 above the second group. Dielectric material in the cylindrical space is etched away, leaving a void supplanting the etched dielectric material, and leaving exposed surfaces of the cylindrical space. The copper pad is exposed and recessed within the cylindrical space. An aluminum layer is conformally formed to encapsulate the exposed copper pad, to protect the copper pad from oxidation. The recessed bond pad includes the copper pad and the encapsulating aluminum layer. A blanket is formed that covers remaining exposed surfaces of the cylindrical space while leaving a portion of the aluminum layer of the bond pad exposed. The blanket protects the surfaces from oxidation, contaminants, and mechanical stress. The recessing of the bond pad prevents force applied to a wirebond on the bond pad from being transmitted to dielectric material within the substrate.

摘要翻译： 衬底内的电子器件中的凹陷接合焊盘以及相关联的制造方法。 电子设备包括N个相邻级联的互连冶金，其N级耦合到衬底。 形成第一组金属蚀刻停止点，级别为M <= N，在M-1级形成第二组金属蚀刻停止点。 第二组以重叠的多层矩阵模式与第一组进行导电接触。 在K <= M-2级形成凹陷的铜焊盘。 围绕金属垫的圆柱形空间包括水平1,2。 。 。 ，M-1在第一组以上，1,2级。 。 。 ，M-2高于第二组。 在圆柱形空间中的电介质材料被蚀刻掉，留下一个取代蚀刻介电材料的空隙，并留下圆柱形空间的暴露表面。 铜焊盘露出并凹进圆柱形空间内。 铝层保形地形成以封装暴露的铜垫，以保护铜垫免于氧化。 凹陷接合焊盘包括铜焊盘和封装铝层。 形成覆盖圆柱形空间的剩余暴露表面的毯子，同时留下接合垫的铝层的一部分露出。 橡皮布保护表面免受氧化，污染和机械应力。 接合焊盘的凹陷防止施加到接合焊盘上的引线键的力传递到衬底内的介电材料。

公开(公告)号：US07037824B2

公开(公告)日：2006-05-02

申请号：US10844533

申请日：2004-05-13

申请人： Lloyd G. Burrell ,  Edward E. Cooney, III ,  Jeffrey P. Gambino ,  John E. Heidenreich, III ,  Hyun Koo Lee ,  Mark D. Levy ,  Baozhen Li ,  Stephen E. Luce ,  Thomas L. McDevitt ,  Anthony K. Stamper ,  Kwong Hon Wong ,  Sally J. Yankee

发明人： Lloyd G. Burrell ,  Edward E. Cooney, III ,  Jeffrey P. Gambino ,  John E. Heidenreich, III ,  Hyun Koo Lee ,  Mark D. Levy ,  Baozhen Li ,  Stephen E. Luce ,  Thomas L. McDevitt ,  Anthony K. Stamper ,  Kwong Hon Wong ,  Sally J. Yankee

IPC分类号： H01L21/4763

CPC分类号： H01L21/76843 ,  H01L21/76838 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53228 ,  H01L2924/0002 ,  H01L2924/00

摘要： Tungsten studs of a size comparable to vias are provided to integrate and interface between copper and aluminum metallization layers in an integrated circuit and/or package therefor by lining a via opening, preferably with layers of tantalum nitride and PVD tungsten as a barrier against the corrosive effects of tungsten fluoride on copper. The reduced size of the tungsten studs relative to known interface structures allows wiring and connection pads to be formed in a single aluminum layer, improving performance and reducing process time and cost.

公开(公告)号：US06495917B1

公开(公告)日：2002-12-17

申请号：US09527276

申请日：2000-03-17

申请人： John J. Ellis-Monaghan ,  Paul M. Feeney ,  Robert M. Geffken ,  Howard S. Landis ,  Rosemary A. Previti-Kelly ,  Bette L. Bergman Reuter ,  Matthew J. Rutten ,  Anthony K. Stamper ,  Sally J. Yankee

发明人： John J. Ellis-Monaghan ,  Paul M. Feeney ,  Robert M. Geffken ,  Howard S. Landis ,  Rosemary A. Previti-Kelly ,  Bette L. Bergman Reuter ,  Matthew J. Rutten ,  Anthony K. Stamper ,  Sally J. Yankee

IPC分类号： H01L2358

CPC分类号： H01L24/12 ,  H01L21/76801 ,  H01L21/76835 ,  H01L23/3171 ,  H01L23/5329 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/45 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05006 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/05556

摘要： A method and structure for a semiconductor chip includes a plurality of layers of interconnect metallurgy, at least one layer of deformable dielectric material over the interconnect metallurgy, at least one input/output bonding pad, and a support structure that includes a substantially rigid dielectric in a supporting relationship to the pad that avoids crushing the deformable dielectric material.

摘要翻译： 半导体芯片的方法和结构包括多层互连冶金，互连冶金上的至少一层可变形介电材料，至少一个输入/输出接合焊盘和支撑结构，其包括基本上刚性的电介质 与垫的支撑关系，避免破坏可变形电介质材料。