公开(公告)号：US08717802B2

公开(公告)日：2014-05-06

申请号：US13230442

申请日：2011-09-12

申请人： Chung H. Lam ,  Scott C. Lewis ,  Jing Li

发明人： Chung H. Lam ,  Scott C. Lewis ,  Jing Li

IPC分类号： G11C11/00

CPC分类号： G11C11/5642 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0061 ,  G11C23/00 ,  G11C2211/5634 ,  G11C2211/5644

摘要： A method for sensing at least one parameter indicative of a logical state of a multi-level memory cell includes the steps of: measuring the parameter of the multi-level memory cell; comparing the measured parameter of the multi-level memory cell with a prescribed reference signal, the reference signal having a value which varies as a function of time; and storing a time value corresponding to a point in time at which the reference signal is substantially equal to the measured parameter of the multi-level memory cell, the stored time value being indicative of a sensed logical state of the multi-level memory cell.

摘要翻译： 用于感测指示多级存储器单元的逻辑状态的至少一个参数的方法包括以下步骤：测量多级存储器单元的参数; 将所述多电平存储单元的测量参数与规定的参考信号进行比较，所述参考信号具有随时间变化的值; 并且存储与所述参考信号基本上等于所述多电平存储器单元的测量参数的时间点相对应的时间值，所述存储的时间值指示所述多电平存储单元的感测逻辑状态。

公开(公告)号：US06555062B1

公开(公告)日：2003-04-29

申请号：US09438628

申请日：1999-11-12

申请人： Scott C. Lewis ,  Mary Beth Whitesel

发明人： Scott C. Lewis ,  Mary Beth Whitesel

IPC分类号： B01L300

CPC分类号： B01L3/508 ,  B01L2300/0854 ,  G01N21/76 ,  G01N35/0098 ,  G01N35/021 ,  G01N35/025 ,  G01N35/1002 ,  G01N35/1065 ,  G01N2035/00386 ,  G01N2035/00396 ,  G01N2035/00524 ,  G01N2035/00752 ,  G01N2035/0441 ,  G01N2035/0443 ,  G01N2035/0465 ,  G01N2035/0484 ,  G01N2035/0486 ,  G01N2035/1025 ,  Y10S215/01 ,  Y10S215/03 ,  Y10S215/08 ,  Y10T436/11 ,  Y10T436/113332 ,  Y10T436/114165 ,  Y10T436/114998 ,  Y10T436/119163 ,  Y10T436/25 ,  Y10T436/2575

摘要： An analyzer for performing automated assay testing. The analyzer includes a storage and conveyor system for conveying cuvettes to an incubation or processing conveyor, a storage and selection system for test sample containers, a storage and selection system for reagent containers, sample and reagent aspirating and dispensing probes, a separation system for separating bound from unbound tracer or labeled reagent, a detection system and date collection/processing system. AU of the sub-units of the machine are controlled by a central processing unit to coordinate the activity of all of the subunits of the analyzer. The analyzer is specifically suited for performing heterogeneous binding assay protocols, particularly immunoassays.

摘要翻译： 用于进行自动化测定测试的分析仪。 分析仪包括用于将比色皿输送到孵育或加工输送机的储存和输送系统，用于测试样品容器的储存和选择系统，用于试剂容器的储存和选择系统，样品和试剂抽吸和分配探针，用于分离的分离系统 绑定来自未结合的示踪剂或标记试剂，检测系统和日期收集/处理系统。 机器的各个子单元由中央处理单元控制，以协调分析器的所有子单元的活动。 分析仪特别适用于进行异质结合测定方案，特别是免疫测定。

公开(公告)号：US6074615A

公开(公告)日：2000-06-13

申请号：US238309

申请日：1999-01-28

申请人： Scott C. Lewis ,  Mary Beth Whitesel

发明人： Scott C. Lewis ,  Mary Beth Whitesel

IPC分类号： G01N21/78 ,  B01L3/00 ,  G01N21/03 ,  G01N21/76 ,  G01N33/53 ,  G01N33/543 ,  G01N33/553 ,  G01N35/00 ,  G01N35/02 ,  G01N35/04 ,  G01N35/10

CPC分类号： B01L3/508 ,  G01N21/76 ,  G01N35/021 ,  G01N35/025 ,  G01N35/1002 ,  B01L2300/0854 ,  G01N2035/00386 ,  G01N2035/00396 ,  G01N2035/00524 ,  G01N2035/00752 ,  G01N2035/0441 ,  G01N2035/0443 ,  G01N2035/0465 ,  G01N2035/0484 ,  G01N2035/0486 ,  G01N2035/1025 ,  G01N35/0098 ,  G01N35/1065 ,  Y10S215/01 ,  Y10S215/03 ,  Y10S215/08 ,  Y10T436/11 ,  Y10T436/113332 ,  Y10T436/114165 ,  Y10T436/114998 ,  Y10T436/119163 ,  Y10T436/25 ,  Y10T436/2575

摘要： An analyzer for performing automated assay testing. The analyzer includes a storage and conveyor system for conveying cuvettes to an incubation or processing conveyor, a storage and selection system for test sample containers, a storage and selection system for reagent containers, sample and reagent aspirating and dispensing probes, a separation system for separating bound from unbound tracer or labeled reagent, a detection system and date collection/processing system. All of the sub-units of the machine are controlled by a central processing unit to coordinate the activity of all of the subunits of the analyzer. The analyzer is specificallysuited for performing heterogeneous binding assay protocols, particularly immunoassays.

摘要翻译： 用于进行自动化测定测试的分析仪。 分析仪包括用于将比色皿输送到孵育或加工输送机的储存和输送系统，用于测试样品容器的储存和选择系统，用于试剂容器的储存和选择系统，样品和试剂抽吸和分配探针，用于分离的分离系统 绑定来自未结合的示踪剂或标记试剂，检测系统和日期收集/处理系统。 机器的所有子单元由中央处理单元控制，以协调分析仪的所有子单元的活动。 该分析仪特别用于进行异质结合测定方案，特别是免疫测定。

公开(公告)号：USD382061S

公开(公告)日：1997-08-05

申请号：US41342

申请日：1995-07-12

申请人： Scott E. Mathis ,  Scott C. Lewis

设计人： Scott E. Mathis ,  Scott C. Lewis

公开(公告)号：US5134616A

公开(公告)日：1992-07-28

申请号：US479145

申请日：1990-02-13

申请人： John E. Barth, Jr. ,  Charles E. Drake ,  John A. Fifield ,  William P. Hovis ,  Howard L. Kalter ,  Scott C. Lewis ,  Daniel J. Nickel ,  Charles H. Stapper ,  James A. Yankosky

发明人： John E. Barth, Jr. ,  Charles E. Drake ,  John A. Fifield ,  William P. Hovis ,  Howard L. Kalter ,  Scott C. Lewis ,  Daniel J. Nickel ,  Charles H. Stapper ,  James A. Yankosky

IPC分类号： G11C11/401 ,  G06F11/10 ,  G11C29/00 ,  G11C29/42

CPC分类号： G11C29/84 ,  G06F11/1008

摘要： A DRAM having on-chip ECC and both bit and word redundancy that have been optimized to support the on-chip ECC. The bit line redundancy features a switching network that provides an any-for-any substitution for the bit lines in the associated memory array. The word line redundancy is provided in a separate array section, and has been optimized to maximize signal while reducing soft errors. The array stores data in the form of error correction words (ECWs) on each word line. A first set of data lines (formed in a zig-zag pattern to minimize unequal capacitive loading on the underlying bit lines) are coupled to read out an ECW as well as the redundant bit lines. A second set of data lines receive the ECW as corrected by bit line redundancy, and a third set of data lines receive the ECW as corrected by the word line redundancy. The third set of data lines are coupled to the ECC block, which corrects errors encountered in the ECW. The ECC circuitry is optimized to reduce the access delays introduced by carrying out on-chip error correction. The ECC block provides both the corrected data bits and the check bits to an SRAM. Thus, the check bits can be externally accessed. At the same time, having a set of interrelated bits in the SRAM compensates for whatever access delays are introduced by the ECC. To maximize the efficiency of switching from mode to mode, the modes are set as a function of received address signals.

公开(公告)号：US5015880A

公开(公告)日：1991-05-14

申请号：US419341

申请日：1989-10-10

申请人： Charles E. Drake ,  Howard L. Kalter ,  Scott C. Lewis

发明人： Charles E. Drake ,  Howard L. Kalter ,  Scott C. Lewis

IPC分类号： H03K17/687 ,  H03K17/04 ,  H03K19/003 ,  H03K19/017 ,  H03K19/0185 ,  H03K19/0948

CPC分类号： H03K19/00361 ,  H03K19/01721

摘要： A CMOS integrated circuit for driving capacitance devices is provided. The circuit has an input node and an output node and includes a first transistor operatively connected to the input node which is turned "on" and "off" by the input node to supply an output signal to the output node when turned "on". A second transistor is provided, the output of which is connected to the output node when turned "on" to supply an output signal thereto. A control circuit is provided to turn on the first transistor prior to the second transistor, and to turn on the second transistor if and only if the slew rate of the output signal of the first transistor is less or slower than a given value. With this arrangement, if there is a low total capacitance of the capacitance devices being driven, the first transistor will have a fast enough slew rate that it will perform the entire charging function of the devices without turning on the second transistor; however, if the total capacitance of the devices being charged is sufficiently large, the low slew rate of the first transistor will cause the second transistor to be turned on, thereby providing additional charging voltage to the capacitance devices, thus decreasing the time that would be required if only the first transistor were employed for the entire charging.

公开(公告)号：US20120063195A1

公开(公告)日：2012-03-15

申请号：US13230442

申请日：2011-09-12

申请人： Chung H. Lam ,  Scott C. Lewis ,  Jing Li

发明人： Chung H. Lam ,  Scott C. Lewis ,  Jing Li

IPC分类号： G11C11/00 ,  G11C7/06

CPC分类号： G11C11/5642 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0061 ,  G11C23/00 ,  G11C2211/5634 ,  G11C2211/5644

摘要： A method for sensing at least one parameter indicative of a logical state of a multi-level memory cell includes the steps of: measuring the parameter of the multi-level memory cell; comparing the measured parameter of the multi-level memory cell with a prescribed reference signal, the reference signal having a value which varies as a function of time; and storing a time value corresponding to a point in time at which the reference signal is substantially equal to the measured parameter of the multi-level memory cell, the stored time value being indicative of a sensed logical state of the multi-level memory cell.

摘要翻译： 用于感测指示多级存储器单元的逻辑状态的至少一个参数的方法包括以下步骤：测量多级存储器单元的参数; 将所述多电平存储单元的测量参数与规定的参考信号进行比较，所述参考信号具有随时间变化的值; 并且存储与所述参考信号基本上等于所述多电平存储器单元的测量参数的时间点相对应的时间值，所述存储的时间值指示所述多电平存储单元的感测逻辑状态。

公开(公告)号：US06759598B2

公开(公告)日：2004-07-06

申请号：US09861148

申请日：2001-05-18

申请人： Timothy Kolody ,  Richard E. Trifiletti ,  Scott C. Lewis ,  Kurt P. Fattman

发明人： Timothy Kolody ,  Richard E. Trifiletti ,  Scott C. Lewis ,  Kurt P. Fattman

IPC分类号： H01R1204

CPC分类号： H05K7/1457 ,  G06F1/18 ,  G06F1/183

摘要： A power distribution backplane includes a pair of metal panels bonded to opposite sides of a dielectric spacer. One panel is for power and the other for ground, and each is painted a different color. Connectors are provided on each panel in connector areas, with some connectors being accessible from both sides of each panel, and busbars extend out from one end of each panel.

摘要翻译： 功率分配背板包括一对金属板，其结合到电介质隔板的相对侧。 一个面板用于电源，另一个面板用于地面，每个面板都涂上不同的颜色。 连接器设置在连接器区域的每个面板上，一些连接器可从每个面板的两侧进入，并且母线从每个面板的一端延伸出来。

公开(公告)号：US06436349B1

公开(公告)日：2002-08-20

申请号：US09655128

申请日：2000-09-05

申请人： Glen Carey ,  Scott C. Lewis ,  Mary Beth Whitesel ,  Frank C. Klingshirn

发明人： Glen Carey ,  Scott C. Lewis ,  Mary Beth Whitesel ,  Frank C. Klingshirn

IPC分类号： G01N3502

CPC分类号： G01N21/76 ,  B01L3/508 ,  B01L2300/0854 ,  G01N35/0098 ,  G01N35/021 ,  G01N35/025 ,  G01N35/1002 ,  G01N35/1065 ,  G01N2035/00386 ,  G01N2035/00396 ,  G01N2035/00524 ,  G01N2035/00752 ,  G01N2035/0441 ,  G01N2035/0443 ,  G01N2035/0465 ,  G01N2035/0486 ,  G01N2035/1025 ,  Y10T436/11 ,  Y10T436/111666 ,  Y10T436/113332

摘要： An analyzer for performing automated assay testing. The analyzer includes a storage and conveyor system for conveying cuvettes to an incubation or processing conveyor, a storage and selection system for test sample containers, a storage and selection system for reagent containers, sample and reagent aspirating and dispensing probes, a separation system for separating bound from unbound tracer or labeled reagent, a detection system and date collection/processing system. All of the subunits of the machine are controlled by a central processing unit to coordinate the activity of all of the subunits of the analyzer. The analyzer is specifically suited for performing heterogeneous binding assay protocols, particularly immunoassays.

摘要翻译： 用于进行自动化测定测试的分析仪。 分析仪包括用于将比色皿输送到孵育或加工输送机的储存和输送系统，用于测试样品容器的储存和选择系统，用于试剂容器的储存和选择系统，样品和试剂抽吸和分配探针，用于分离的分离系统 绑定来自未结合的示踪剂或标记试剂，检测系统和日期收集/处理系统。 机器的所有子单元由中央处理单元控制，以协调分析仪所有子单元的活动。 分析仪特别适用于进行异质结合测定方案，特别是免疫测定。

公开(公告)号：US6063340A

公开(公告)日：2000-05-16

申请号：US457702

申请日：1995-06-01

申请人： Scott C. Lewis ,  Mary Beth Whitesel

发明人： Scott C. Lewis ,  Mary Beth Whitesel

IPC分类号： G01N21/78 ,  B01L3/00 ,  G01N21/03 ,  G01N21/76 ,  G01N33/53 ,  G01N33/543 ,  G01N33/553 ,  G01N35/00 ,  G01N35/02 ,  G01N35/04 ,  G01N35/10

CPC分类号： B01L3/508 ,  G01N21/76 ,  G01N35/021 ,  G01N35/025 ,  G01N35/1002 ,  B01L2300/0854 ,  G01N2035/00386 ,  G01N2035/00396 ,  G01N2035/00524 ,  G01N2035/00752 ,  G01N2035/0441 ,  G01N2035/0443 ,  G01N2035/0465 ,  G01N2035/0484 ,  G01N2035/0486 ,  G01N2035/1025 ,  G01N35/0098 ,  G01N35/1065 ,  Y10S215/01 ,  Y10S215/03 ,  Y10S215/08 ,  Y10T436/11 ,  Y10T436/113332 ,  Y10T436/114165 ,  Y10T436/114998 ,  Y10T436/119163 ,  Y10T436/25 ,  Y10T436/2575

摘要： An analyzer for performing automated assay testing. The analyzer includes a storage and conveyor system for conveying cuvettes to an incubation or processing conveyor, a storage and selection system for test sample containers, a storage and selection system for reagent containers, sample and reagent aspirating and dispensing probes, a separation system for separating bound from unbound tracer or labeled reagent, a detection system and date collection/processing system All of the sub-units of the machine are controlled by a central processing unit to coordinate the activity of all of the subunits of the analyze. The analyzer is specifically suited for performing heterogeneous binding assay protocols, particularly immunoassays.

摘要翻译： 用于进行自动化测定测试的分析仪。 分析仪包括用于将比色皿输送到孵育或加工输送机的储存和输送系统，用于测试样品容器的储存和选择系统，用于试剂容器的储存和选择系统，样品和试剂抽吸和分配探针，用于分离的分离系统 绑定来自未绑定的示踪剂或标记试剂，检测系统和日期收集/处理系统机器的所有子单元由中央处理单元控制，以协调分析的所有亚基的活动。 分析仪特别适用于进行异质结合测定方案，特别是免疫测定。