Semiconductor Device and Method of Forming Substrate with 3-Sided Wettable Flank

    公开(公告)号:US20250062197A1

    公开(公告)日:2025-02-20

    申请号:US18935119

    申请日:2024-11-01

    Abstract: A semiconductor device has a substrate and leads formed on two or more sides of the substrate. An electrical component is disposed over the substrate and electrically connected to the lead with bumps or bond wires. The electrical component is encapsulated. A portion of the substrate is removed to form a wettable flank on at least three sides of the lead. The substrate has a molding compound and the lead is disposed within or adjacent to the molding compound. A portion of the molding compound can remain at corners of the substrate. The lead has a first surface or recessed surface on a first side of the lead, a second surface or recessed surface on a second side of the lead, and a third surface or recessed surface on a third side of the lead. A portion of a surface of the lead is plated.

    Analog FIR filter
    3.
    发明授权

    公开(公告)号:US12149221B2

    公开(公告)日:2024-11-19

    申请号:US17370565

    申请日:2021-07-08

    Abstract: A FIR filter (15), comprising an input terminal for receiving an input signal, a first filtering circuit comprising: a first transconductance device (30a) configured to generate a first current signal (i1) proportional to the input signal; a first analog switch (41a) commuted in n by a first digital gate signal (ϕ1) and configured to block the current signal when the first digital gate signal has a first value and to transmit the current signal to a first integrating capacitor (45a) when the first digital gate signal has a second value; characterized in that the first digital gate signal (ϕ1) comprises a periodic series of pulses, wherein the pulses have widths proportional to the filter coefficients.

    METHOD AND APPARATUS FOR MANAGING DEVICE TO DEVICE COMMUNICATIONS IN A WIRELESS NETWORK

    公开(公告)号:US20240314586A1

    公开(公告)日:2024-09-19

    申请号:US18575282

    申请日:2022-07-05

    CPC classification number: H04W24/02 H04W16/18 H04W24/10

    Abstract: There is provided a method and apparatus for managing device-to-device communications in a wireless network, for example a self-organizing network. The method includes collecting, by a wireless network controller, information regarding one or more key performance indicators (KPIs). The information relates to one or more of a 5 ranking of the one or more KPIs and a target value of the one or more KPIs. The method further includes determining, by the wireless network controller, an optimal configuration of the wireless network that best meets the collected information relating to the one or more KPIs. The method additionally includes assigning, by the wireless network controller, a role to each of one or more network devices associated with the 10 wireless network based on the optimal configuration of the wireless network. The role is selected from a gateway (GW), a mesh node, a cellular node and an end node (EN).

    Decision feedback equalizer with high input sensitivity and improved performance for signal processing

    公开(公告)号:US12081372B2

    公开(公告)日:2024-09-03

    申请号:US18105744

    申请日:2023-02-03

    CPC classification number: H04L25/03025 H04L25/03267 H04L2025/03777

    Abstract: A decision feedback equalizer (DFE) may include a summer configured to receive a signal stream, and a plurality of feedback taps including a first feedback tap connected to the summer. The first feedback tap may include a pre-amplifier, a combined latch and a digital to analog converter (DAC). The pre-amplifier may be configured to be clocked by a first clock signal, wherein the pre-amplifier may be configured to receive an output signal of the summer and to receive a first postcursor generated by the DFE of a previous signal in the signal stream. The combined latch may be configured to be clocked by a first clock signal and a second clock signal. The DAC may be coupled to an output node of the combined latch. The first postcursor may be provided to the pre-amplifier without being provided to the summer.

    VARIABLE TRANSIMPEDANCE AMPLIFIER FOR LOW POWER, HIGH DYNAMIC RANGE, HIGH DATA RATE LINEAR APPLICATIONS

    公开(公告)号:US20240195360A1

    公开(公告)日:2024-06-13

    申请号:US18079840

    申请日:2022-12-12

    CPC classification number: H03F1/0211 H03F3/4508

    Abstract: A variable transimpedance amplifier may include first and second amplifiers. Each of the first and second amplifiers may include a transistor amplifier with a feedback resistor and a capacitor. The output node of the first amplifier may be an output node of the variable transimpedance amplifier. The output node of the second amplifier is not part of the output node of the variable transimpedance amplifier. The open loop gains of the transistor amplifiers may be variable, but the feedback resistor values can be fixed. The transimpedance may be determined by the feedback resistors and a scaling factor proportional to ratio of open loop gains. The transistor amplifiers may share an input transistor. The configuration can provide a high dynamic range of variable transimpedance that is stable over process and operating condition variations, minimize input capacitance loading and noise contribution to small input signals.

    DISTRIBUTED OUTPUT STAGES WITH T-COILS
    8.
    发明公开

    公开(公告)号:US20240113920A1

    公开(公告)日:2024-04-04

    申请号:US17956748

    申请日:2022-09-29

    CPC classification number: H04L25/0272 H04L25/028 H04L25/0292

    Abstract: A signal driver may include a plurality of distributed drivers along a differential transmission line. Each of the plurality of the distributed drivers may include: an output tap configured to receive a portion of an incoming signal of the signal driver; and a T-coil connected to an output node of the output tap. The differential transmission line is connected to and intercepted by a first terminal and a second terminal of the T-coil, and a plurality of T-coils of the plurality of the distributed drivers are distributed along and spaced apart on the differential transmission line.

    ACTIVE DIFFERENTIAL TERMINATION CIRCUIT TO COMPENSATE FOR IMPEDANCE MISMATCH

    公开(公告)号:US20240097659A1

    公开(公告)日:2024-03-21

    申请号:US17947010

    申请日:2022-09-16

    CPC classification number: H03K3/012 H03F3/45475

    Abstract: A differential signal driver may include a driver circuit and a feedback loop. The driver circuit may include a first output node coupled to a first termination node for receiving a first termination bias voltage, a second output node coupled to a second termination node for receiving a second termination bias voltage, and a bias network connected to the second output node and to the second termination node. The feedback loop may include a first feedback resistor connected to the first output node at a first end of the first feedback resistor, a second feedback resistor connected to the second output node at a first end of the second feedback resistor, and a feedback amplifier configured to provide a feedback correction current from a common mode voltage to a node within the line from the first output node to the first termination node.

    OPTICAL RECEIVERS
    10.
    发明公开
    OPTICAL RECEIVERS 审中-公开

    公开(公告)号:US20240056194A1

    公开(公告)日:2024-02-15

    申请号:US17818909

    申请日:2022-08-10

    Inventor: Jacob MEACHEN

    CPC classification number: H04B10/60

    Abstract: A packaged optical receiver, comprising: a photodiode configured to receive an optical signal; a transimpedance amplifier (TIA) coupled to the photodiode; and a signal pin; wherein the optical receiver is configured to receive, via the signal pin, a reset signal; and wherein the optical receiver is configured to output in response to the reset signal, via the signal pin, a received signal strength indication (RSSI) for the received optical signal.

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