摘要:
An address transforming circuit that can change a memory mapping when a system is booted includes a switch control signal generating circuit and an address transforming unit. The switch control signal generating circuit generates alternately enabled switch control signals synchronized with a reset signal. The address transforming unit transforms bits of a first address to generate a second address in response to the switch control signals. Accordingly, a semiconductor memory device including the address transforming circuit has a long lifetime and high reliability.
摘要:
A memory module includes: an ODT circuit on a memory device and including pull-up and pull-down resistors connected between pull-up and pull-down transistors. A data masking (DM) pad is provided in a tap region of the module board. A current leakage monitoring unit is also provided and receives a ground state signal from the DM pad and a bit configuration signal from the memory device and disables the pull-up transistors to cut off a current path between the pull-up resistors of the ODT circuit and the DM pad during a ODT enable mode.
摘要:
A memory module comprises a plurality of semiconductor memory devices each having a termination circuit for a command/address bus. The semiconductor memory devices are formed in a substrate of the memory module, and they operate in response to a command/address signal, a data signal, and a termination resistance control signal.
摘要:
A semiconductor device includes a resistor terminal, a reference voltage generator and a detector. The resistor terminal is connected to an external resistor. The reference voltage generator generates at least one reference voltage. The detector generates a detection signal based at least in part on a resistor terminal voltage and the at least one reference voltage. The detection signal indicates a state of an electrical connection to the resistor terminal. The resistor terminal voltage is a voltage at the resistor terminal.
摘要:
A semiconductor device includes a resistor terminal, a reference voltage generator and a detector. The resistor terminal is connected to an external resistor. The reference voltage generator generates at least one reference voltage. The detector generates a detection signal based at least in part on a resistor terminal voltage and the at least one reference voltage. The detection signal indicates a state of an electrical connection to the resistor terminal. The resistor terminal voltage is a voltage at the resistor terminal.
摘要:
A memory module comprises a plurality of semiconductor memory devices each having a termination circuit for a command/address bus. The semiconductor memory devices are formed in a substrate of the memory module, and they operate in response to a command/address signal, a data signal, and a termination resistance control signal.
摘要:
A memory buffer selecting between a parallel test mode and a mode register control mode, and a memory module and memory system having the memory buffer are disclosed. The memory buffer includes a control circuit and a mode selecting circuit. The control circuit generates a mode control signal based on a first chip selecting signal, a second chip selecting signal, a row address signal, a column address signal, and a write enable signal. The mode selecting circuit selects one of a parallel test mode and a mode register control mode in response to the mode control signal.
摘要:
A semiconductor memory module and a semiconductor memory device are disclosed. In one embodiment, the invention provides a semiconductor memory module comprising a circuit board, a plurality of semiconductor memory devices adapted to operate during a test mode and a normal operation mode and mounted on the circuit board, a first signal line set comprising a plurality of first signal lines connected to the plurality of semiconductor memory devices, and a plurality of second signal line sets. Each semiconductor memory device comprises first terminals adapted to receive first signals from the first signal lines, second terminals connected to a corresponding one of the second signal line sets, a third terminal adapted to receive an enable signal during the test mode, and a signal transmitting unit adapted to output second signals to the second terminals in response to the enable signal.
摘要:
A seat weight sensor having a support frame, a fixed rail at least partially disposed above the support frame, an elastic deformation unit connected between the support frame and the fixed rail for supporting the fixed rail, and a strain gauge associated with the elastic deformation unit is disclosed.
摘要:
A semiconductor memory device capable of determining an operation mode by using states of data pins, and an operation mode determining method for the same are disclosed. The semiconductor memory device includes at least one MRS input pad, at least one data input pad, and an operation mode determining circuit. The operation mode determining circuit generates an operation mode determining signal, when an MRS command input through the MRS input pad corresponds to a predetermined MRS command and data signals input through the data input pad or pads include a predetermined combination. Accordingly, the efficiency in the manufacturing and producing processes may be improved by determining the operation mode of the semiconductor memory device in a module assembly process.