公开(公告)号：US08506786B2

公开(公告)日：2013-08-13

申请号：US12763512

申请日：2010-04-20

申请人： Joon-Bo Shim ,  Do-Hee Ahn ,  Seung-Woo Paek ,  Si-Hyung Kim ,  Sang-Woon Kwon ,  Kwang-Rag Kim ,  Han-Soo Lee

发明人： Joon-Bo Shim ,  Do-Hee Ahn ,  Seung-Woo Paek ,  Si-Hyung Kim ,  Sang-Woon Kwon ,  Kwang-Rag Kim ,  Han-Soo Lee

IPC分类号： C25C3/34 ,  G21C19/48

CPC分类号： C25C3/34 ,  C25C7/025 ,  G21C19/48 ,  G21F9/308 ,  Y02W30/884

摘要： A method for recovery of residual actinide element from chloride molten salts that are formed after electro-refining and/or electro-winning of a spent nuclear fuel and include actinide elements and rare-earth elements is provided. The method comprises conducting electrolysis using a liquid cadmium cathode (LCC) in the chloride molten salt that is formed after electro-refining and/or electro-winning of a spent nuclear fuel and contains rare-earth elements and actinide elements; electro-depositing the actinide elements contained in the chloride molten salt on the LCC in order to reduce a concentration of the actinide elements; and adding a CdCl2 oxidant to the chloride molten salt containing the LCC-metal alloy in order to oxidize the rare-earth elements co-deposited on the LCC, thereby forming the rare-earth chlorides in the chloride molten salt.

摘要翻译： 提供了一种从废核燃料的电解和/或电击中形成的氯化物熔融盐中残留的锕系元素回收方法，包括锕系元素和稀土元素。 该方法包括使用在电解精炼和/或电核燃料中形成的含有稀土元素和锕系元素的氯化物熔盐中的液体镉阴极（LCC）进行电解; 将包含在氯化物熔融盐中的锕系元素电沉积在LCC上以降低锕系元素的浓度; 并向含有LCC-金属合金的氯化物熔盐中加入CdCl 2氧化剂，以便氧化共沉淀在LCC上的稀土元素，从而在氯化物熔融盐中形成稀土氯化物。

公开(公告)号：US20110017601A1

公开(公告)日：2011-01-27

申请号：US12763512

申请日：2010-04-20

申请人： Joon-Bo Shim ,  Do-Hee Ahn ,  Seung-Woo Paek ,  Si-Hyung Kim ,  Sang-Woon Kwon ,  Kwang-Rag Kim ,  Han-Soo Lee

发明人： Joon-Bo Shim ,  Do-Hee Ahn ,  Seung-Woo Paek ,  Si-Hyung Kim ,  Sang-Woon Kwon ,  Kwang-Rag Kim ,  Han-Soo Lee

IPC分类号： C25C3/34

CPC分类号： C25C3/34 ,  C25C7/025 ,  G21C19/48 ,  G21F9/308 ,  Y02W30/884

摘要： A method for recovery of residual actinide element from chloride molten salts that are formed after electro-refining and/or electro-winning of a spent nuclear fuel and include actinide elements and rare-earth elements is provided. The method comprises conducting electrolysis using a liquid cadmium cathode (LCC) in the chloride molten salt that is formed after electro-refining and/or electro-winning of a spent nuclear fuel and contains rare-earth elements and actinide elements; electro-depositing the actinide elements contained in the chloride molten salt on the LCC in order to reduce a concentration of the actinide elements; and adding a CdCl2 oxidant to the chloride molten salt containing the LCC-metal alloy in order to oxidize the rare-earth elements co-deposited on the LCC, thereby forming the rare-earth chlorides in the chloride molten salt.

摘要翻译： 提供了一种从废核燃料的电解和/或电击中形成的氯化物熔融盐中残留的锕系元素回收方法，包括锕系元素和稀土元素。 该方法包括使用在电解精炼和/或电核燃料中形成的含有稀土元素和锕系元素的氯化物熔盐中的液体镉阴极（LCC）进行电解; 将包含在氯化物熔融盐中的锕系元素电沉积在LCC上以降低锕系元素的浓度; 并向含有LCC-金属合金的氯化物熔盐中加入CdCl 2氧化剂，以便氧化共沉淀在LCC上的稀土元素，从而在氯化物熔融盐中形成稀土氯化物。

公开(公告)号：US20140284695A1

公开(公告)日：2014-09-25

申请号：US14151288

申请日：2014-01-09

申请人： Jin-Yeon WON ,  Joon-Hee LEE ,  Seung-Woo PAEK ,  Dong-Seog EUN

发明人： Jin-Yeon WON ,  Joon-Hee LEE ,  Seung-Woo PAEK ,  Dong-Seog EUN

IPC分类号： H01L29/792

CPC分类号： H01L29/42344 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

摘要： According to example embodiments of inventive concepts, a semiconductor device includes: a substrate, and a stacked structure including interlayer insulating layers and gate electrodes alternately stacked on the substrate. The stacked structure defines a through-hole over the substrate. The gate electrodes each include a first portion between the through-hole and a second portion of the gate electrodes. A channel pattern may be in the through-hole. A tunneling layer may surround the channel pattern. A charge trap layer may surround the tunneling layer, and protective patterns may surround the first portions of the gate electrodes. The protective patterns may be between the first portions of the gate electrodes and the charge trap layer.

摘要翻译： 根据本发明构思的示例性实施例，半导体器件包括：衬底，以及包括层间绝缘层和交替层叠在衬底上的栅电极的堆叠结构。 堆叠结构在衬底上限定通孔。 栅电极各自包括在通孔和栅电极的第二部分之间的第一部分。 通道图案可以在通孔中。 隧道层可围绕通道图案。 电荷陷阱层可围绕隧道层，并且保护图案可围绕栅电极的第一部分。 保护图案可以在栅电极的第一部分和电荷陷阱层之间。

公开(公告)号：US20080197402A1

公开(公告)日：2008-08-21

申请号：US12031896

申请日：2008-02-15

申请人： Seung-woo Paek ,  Dae-hyun Jang ,  Jin-hong Kim

发明人： Seung-woo Paek ,  Dae-hyun Jang ,  Jin-hong Kim

IPC分类号： H01L29/788 ,  H01L21/336

CPC分类号： H01L29/42324 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/40114

摘要： Methods of forming non-volatile memory devices include forming a device isolation layer and a gate pattern of a non-volatile memory cell transistor, on a semiconductor substrate. This gate pattern includes a floating gate electrode and a control gate line that extends on the floating gate electrode and on the device isolation layer. At least a first portion of a first sidewall of the gate pattern is then covered with a first mask that exposes upper corners of the control gate line. The device isolation layer is then selectively etched at a first rate to define an at least partial opening therein. During this etching step, the upper corners of the control gate line are also etched back at a second rate less than the first rate.

摘要翻译： 形成非易失性存储器件的方法包括在半导体衬底上形成器件隔离层和非易失性存储单元晶体管的栅极图案。 该栅极图案包括在浮栅极和器件隔离层上延伸的浮栅电极和控制栅极线。 栅极图案的第一侧壁的至少第一部分然后被暴露控制栅极线的上角的第一掩模覆盖。 然后以第一速率选择性地蚀刻器件隔离层，以在其中限定至少部分开口。 在该蚀刻步骤期间，控制栅极线的上角也以比第一速率小的第二速率被回蚀。

公开(公告)号：US20160149010A1

公开(公告)日：2016-05-26

申请号：US15012979

申请日：2016-02-02

申请人： Jin-Yeon WON ,  Joon-Hee LEE ,  Seung-Woo PAEK ,  Dong-Seog EUN

发明人： Jin-Yeon WON ,  Joon-Hee LEE ,  Seung-Woo PAEK ,  Dong-Seog EUN

IPC分类号： H01L29/423 ,  H01L29/792 ,  H01L27/115

CPC分类号： H01L29/42344 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

摘要： According to example embodiments of inventive concepts, a semiconductor device includes: a substrate, and a stacked structure including interlayer insulating layers and gate electrodes alternately stacked on the substrate. The stacked structure defines a through-hole over the substrate. The gate electrodes each include a first portion between the through-hole and a second portion of the gate electrodes. A channel pattern may be in the through-hole. A tunneling layer may surround the channel pattern. A charge trap layer may surround the tunneling layer, and protective patterns may surround the first portions of the gate electrodes. The protective patterns may be between the first portions of the gate electrodes and the charge trap layer.

摘要翻译： 根据本发明构思的示例性实施例，半导体器件包括：衬底，以及包括层间绝缘层和交替层叠在衬底上的栅电极的堆叠结构。 堆叠结构在衬底上限定通孔。 栅电极各自包括在通孔和栅电极的第二部分之间的第一部分。 通道图案可以在通孔中。 隧道层可围绕通道图案。 电荷陷阱层可围绕隧道层，并且保护图案可围绕栅电极的第一部分。 保护图案可以在栅电极的第一部分和电荷陷阱层之间。

公开(公告)号：US09281414B2

公开(公告)日：2016-03-08

申请号：US14151288

申请日：2014-01-09

申请人： Jin-Yeon Won ,  Joon-Hee Lee ,  Seung-Woo Paek ,  Dong-Seog Eun

发明人： Jin-Yeon Won ,  Joon-Hee Lee ,  Seung-Woo Paek ,  Dong-Seog Eun

IPC分类号： H01L29/792 ,  H01L27/115 ,  H01L29/66

CPC分类号： H01L29/42344 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

摘要： According to example embodiments of inventive concepts, a semiconductor device includes: a substrate, and a stacked structure including interlayer insulating layers and gate electrodes alternately stacked on the substrate. The stacked structure defines a through-hole over the substrate. The gate electrodes each include a first portion between the through-hole and a second portion of the gate electrodes. A channel pattern may be in the through-hole. A tunneling layer may surround the channel pattern. A charge trap layer may surround the tunneling layer, and protective patterns may surround the first portions of the gate electrodes. The protective patterns may be between the first portions of the gate electrodes and the charge trap layer.

摘要翻译： 根据本发明构思的示例性实施例，半导体器件包括：衬底，以及包括层间绝缘层和交替层叠在衬底上的栅电极的堆叠结构。 堆叠结构在衬底上限定通孔。 栅电极各自包括在通孔和栅电极的第二部分之间的第一部分。 通道图案可以在通孔中。 隧道层可围绕通道图案。 电荷陷阱层可围绕隧道层，并且保护图案可围绕栅电极的第一部分。 保护图案可以在栅电极的第一部分和电荷陷阱层之间。