Efficient decoders for LDPC codes
    1.
    发明授权
    Efficient decoders for LDPC codes 有权
    用于LDPC码的高效解码器

    公开(公告)号:US07770090B1

    公开(公告)日:2010-08-03

    申请号:US11303449

    申请日:2005-12-16

    Abstract: An LDPC decoder, applicable to LDPC codes including codes where check nodes within the same group are connected to a common bit node, successively processes groups of check nodes in a particular iteration, including updating bit nodes in that same iteration responsive to messages generated in response to processing a group of check nodes. Within an iteration, the LDPC decoder may also track the number of unresolved parity check equations, and cease iterating or output to an outer block decoder if that number reaches a local minima or standard minimum, falls below a predetermined threshold, or its rate of change falls below a predetermined threshold, indicating a lack of convergence or false convergence condition. The LDPC decoder may also provide a feedback assist to a demodulator. Also, a novel memory configuration may store messages generated by the decoder in the course of check node processing. The decoder may also employ a novel method for generating check node to bit node messages through a prescribed series of pair-wise computations.

    Abstract translation: 一种LDPC解码器,适用于包括同一组内的校验节点连接到公共位节点的代码的LDPC码,在特定迭代中连续地处理校验节点组,包括响应于在响应中产生的消息在相同迭代中更新位节点 来处理一组校验节点。 在迭代中,LDPC解码器还可以跟踪未解决的奇偶校验方程的数量,并且如果该数量达到局部最小值或标准最小值,低于预定阈值或其变化率,则停止迭代或输出到外部块解码器 低于预定阈值,表示缺乏收敛或错误收敛条件。 LDPC解码器还可以向解调器提供反馈辅助。 此外,新颖的存储器配置可以在校验节点处理的过程中存储由解码器产生的消息。 解码器还可以采用一种新颖的方法,用于通过规定的一系列成对计算产生校验节点到位节点消息。

    Signal acquisition system and method
    2.
    发明授权
    Signal acquisition system and method 有权
    信号采集系统及方法

    公开(公告)号:US08335663B2

    公开(公告)日:2012-12-18

    申请号:US12126345

    申请日:2008-05-23

    CPC classification number: H04L27/0014 H03M13/00 H04L1/0045

    Abstract: A system for signal processing is provided. The system includes a steady state processing system for receiving a signal. A general purpose processing system is coupled to the steady state processing system and includes a signal acquisition system for receiving the signal and generating acquisition data. The steady state processing system can receive the acquisition data from the signal acquisition system and use the acquisition data to acquire the signal.

    Abstract translation: 提供了一种用于信号处理的系统。 该系统包括用于接收信号的稳态处理系统。 通用处理系统耦合到稳态处理系统,并且包括用于接收信号并产生采集数据的信号采集系统。 稳态处理系统可以从信号采集系统接收采集数据,并使用采集数据采集信号。

    Erasures assisted block code decoder and related method
    3.
    发明申请
    Erasures assisted block code decoder and related method 有权
    擦除辅助块码解码器及相关方法

    公开(公告)号:US20070245208A1

    公开(公告)日:2007-10-18

    申请号:US11595546

    申请日:2006-11-10

    CPC classification number: H03M13/2936 H03M13/2732 H03M13/293

    Abstract: An erasures assisted block code decoder and related method are provided. The erasures assisted block code decoder comprises a first block decoder, an erasures processor, and a second block code decoder. The first block decoder, for example, a Reed-Solomon decoder, is configured to decode blocks of data elements, e.g., bytes, that were previously affected by bursty errors. The first block decoder is also configured to identify those of such blocks it is unable to decode. The erasures processor is configured to identify, as erasures, data elements in the un-decodable blocks by utilizing, in the erasures identification process, data elements in the decoded blocks that were corrected by the first block decoder. The second block decoder, e.g., the same or different Reed-Solomon decoder, is configured to decode one or more of the un-decodable blocks by utilizing, in the decoding, the erasures identified by the erasures processor.

    Abstract translation: 提供了一种擦除辅助块代码解码器及相关方法。 擦除辅助块码解码器包括第一块解码器,擦除处理器和第二块码解码器。 第一块解码器,例如Reed-Solomon解码器,被配置为对先前受突发错误影响的诸如字节的数据元素块进行解码。 第一块解码器还被配置为识别其不能解码的这些块的那些。 擦除处理器被配置为通过在擦除识别处理中利用由第一块解码器校正的解码块中的数据元素来识别不可解码块中的数据元素作为擦除。 第二块解码器,例如相同或不同的里德 - 所罗门解码器,被配置为通过在解码中利用由擦除处理器识别的擦除来解码一个或多个不可解码块。

    Erasures Assisted Block Code Decoder And Related Method
    4.
    发明申请
    Erasures Assisted Block Code Decoder And Related Method 有权
    消除辅助块代码解码器及相关方法

    公开(公告)号:US20100229070A1

    公开(公告)日:2010-09-09

    申请号:US12781749

    申请日:2010-05-17

    CPC classification number: H03M13/2936 H03M13/2732 H03M13/293

    Abstract: An erasures assisted block code decoder and related method are provided. The erasures assisted block code decoder comprises a first block decoder, an erasures processor, and a second block code decoder. The first block decoder, for example, a Reed-Solomon decoder, is configured to decode blocks of data elements, e.g., bytes, that were previously affected by bursty errors. The first block decoder is also configured to identify those of such blocks it is unable to decode. The erasures processor is configured to identify, as erasures, data elements in the un-decodable blocks by utilizing, in the erasures identification process, data elements in the decoded blocks that were corrected by the first block decoder. The second block decoder, e.g., the same or different Reed-Solomon decoder, is configured to decode one or more of the un-decodable blocks by utilizing, in the decoding, the erasures identified by the erasures processor.

    Abstract translation: 提供了一种擦除辅助块代码解码器及相关方法。 擦除辅助块码解码器包括第一块解码器,擦除处理器和第二块码解码器。 第一块解码器,例如Reed-Solomon解码器,被配置为对先前受突发错误影响的诸如字节的数据元素块进行解码。 第一块解码器还被配置为识别其不能解码的这些块的那些。 擦除处理器被配置为通过在擦除识别处理中利用由第一块解码器校正的解码块中的数据元素来识别不可解码块中的数据元素作为擦除。 第二块解码器,例如相同或不同的里德 - 所罗门解码器,被配置为通过在解码中利用由擦除处理器识别的擦除来解码一个或多个不可解码块。

    System of and method for decoding trellis codes
    6.
    发明授权
    System of and method for decoding trellis codes 有权
    解码格码的系统和方法

    公开(公告)号:US06973615B1

    公开(公告)日:2005-12-06

    申请号:US10013490

    申请日:2001-12-13

    CPC classification number: H03M13/256 H03M13/3961

    Abstract: Systems and related methods are described for (1) determining one or more state probabilities for one or more states in a trellis representation; (2) determining an estimate of or extrinsic output for a bit using a trellis representation; (3) performing a MAX* 2−>1 operation; and (4) computing forward state probabilities in a forward mode of operation and computing backward state probabilities in a backward mode of operation. Combinations of the foregoing are also described.

    Abstract translation: 描述了系统和相关方法(1)确定网格表示中的一个或多个状态的一个或多个状态概率; (2)使用网格表示来确定比特的估计或外在输出; (3)执行MAX * 2-> 1操作; 以及(4)在正向操作模式中计算前向状态概率,并在后向操作模式下计算后向状态概率。 还描述了前述的组合。

    Method and apparatus for efficient computation of check equations in periodical low density parity check (LDPC) codes
    7.
    发明申请
    Method and apparatus for efficient computation of check equations in periodical low density parity check (LDPC) codes 失效
    用于在周期性低密度奇偶校验(LDPC)码中有效计算校验方程的方法和装置

    公开(公告)号:US20050223305A1

    公开(公告)日:2005-10-06

    申请号:US10867355

    申请日:2004-06-14

    Applicant: Shachar Kons

    Inventor: Shachar Kons

    Abstract: A periodic Low Density Parity Check (LPDC) coding apparatus and method allows reference to an LDPC code parity check matrix, where such reference is accomplished row by row. A specially configured memory and cyclical shift operation are used by the apparatus to efficiently compute check equations of the periodic LDPC code.

    Abstract translation: 周期性低密度奇偶校验(LPDC)编码装置和方法允许参考LDPC码奇偶校验矩阵,其中这种引用是逐行实现的。 该装置使用特殊配置的存储器和循环移位操作来有效地计算周期性LDPC码的校验方程。

    Erasures assisted block code decoder and related method
    8.
    发明授权
    Erasures assisted block code decoder and related method 有权
    擦除辅助块码解码器及相关方法

    公开(公告)号:US08065593B2

    公开(公告)日:2011-11-22

    申请号:US12781749

    申请日:2010-05-17

    CPC classification number: H03M13/2936 H03M13/2732 H03M13/293

    Abstract: An erasures assisted block code decoder and related method are provided. The erasures assisted block code decoder includes a first block decoder, an erasures processor, and a second block code decoder. The first block decoder, for example, a Reed-Solomon decoder, is configured to decode blocks of data elements, e.g., bytes, that were previously affected by bursty errors. The first block decoder is also configured to identify those of such blocks it is unable to decode. The erasures processor is configured to identify, as erasures, data elements in the un-decodable blocks by utilizing, in the erasures identification process, data elements in the decoded blocks that were corrected by the first block decoder. The second block decoder, e.g., the same or different Reed-Solomon decoder, is configured to decode one or more of the un-decodable blocks by utilizing, in the decoding, the erasures identified by the erasures processor.

    Abstract translation: 提供了一种擦除辅助块代码解码器及相关方法。 擦除辅助块码解码器包括第一块解码器,擦除处理器和第二块码解码器。 第一块解码器,例如Reed-Solomon解码器,被配置为对先前受突发错误影响的诸如字节的数据元素块进行解码。 第一块解码器还被配置为识别其不能解码的这些块的那些。 擦除处理器被配置为通过在擦除识别处理中利用由第一块解码器校正的解码块中的数据元素来识别不可解码块中的数据元素作为擦除。 第二块解码器,例如相同或不同的里德 - 所罗门解码器,被配置为通过在解码中利用由擦除处理器识别的擦除来解码一个或多个不可解码块。

    Method and apparatus for efficient computation of check equations in periodical low density parity check (LDPC) codes
    9.
    发明授权
    Method and apparatus for efficient computation of check equations in periodical low density parity check (LDPC) codes 失效
    用于在周期性低密度奇偶校验(LDPC)码中有效计算校验方程的方法和装置

    公开(公告)号:US07685497B2

    公开(公告)日:2010-03-23

    申请号:US10867355

    申请日:2004-06-14

    Applicant: Shachar Kons

    Inventor: Shachar Kons

    Abstract: A periodic Low Density Parity Check (LPDC) coding apparatus and method allows reference to an LDPC code parity check matrix, where such reference is accomplished row by row. A specially configured memory and cyclical shift operation are used by the apparatus to efficiently compute check equations of the periodic LDPC code.

    Abstract translation: 周期性低密度奇偶校验(LPDC)编码装置和方法允许参考LDPC码奇偶校验矩阵,其中这种引用是逐行实现的。 该装置使用特殊配置的存储器和循环移位操作来有效地计算周期性LDPC码的校验方程。

    System of and method for decoding trellis codes
    10.
    发明授权
    System of and method for decoding trellis codes 有权
    解码格码的系统和方法

    公开(公告)号:US06865711B2

    公开(公告)日:2005-03-08

    申请号:US10013492

    申请日:2001-12-13

    Abstract: Systems and related methods are described for (1) determining one or more state probabilities for one or more states in a trellis representation; (2) determining an estimate of or extrinsic output for one or more bits using a trellis representation; (3) determining a branch metric for a branch in a trellis representation; (4) performing a MAX*2->1 operation; (5) performing a MAX*2p->1 operation, where p is an integer of two or more, through a hierarchical arrangement of MAX*2->1 operations; and (6) computing forward state probabilities in a forward mode of operation and computing backward state probabilities in a backward mode of operation. Combinations of the foregoing are also described.

    Abstract translation: 描述了系统和相关方法(1)确定网格表示中的一个或多个状态的一个或多个状态概率; (2)使用网格表示确定一个或多个比特的估计或非本征输出; (3)确定网格表示中的分支的分支度量; (4)执行MAX * 2-> 1操作; (5)通过MAX * 2-> 1操作的分层排列执行MAX * 2→1操作,其中p是2或更大的整数; 以及(6)在向前操作模式中计算前向状态概率,并在后向操作模式下计算后向状态概率。 还描述了前述的组合。

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