公开(公告)号：US08748913B2

公开(公告)日：2014-06-10

申请号：US13305757

申请日：2011-11-29

Applicant: Shih-Cheng Huang ,  Po-Min Tu

Inventor： Shih-Cheng Huang ,  Po-Min Tu

IPC: H01L33/00

CPC classification number: H01L25/0753 ,  H01L24/24 ,  H01L24/82 ,  H01L33/42 ,  H01L33/44 ,  H01L33/62 ,  H01L2924/12041 ,  H01L2924/00

Abstract: An LED module includes a base, a circuit layer formed on the base and multiple LEDs each having an LED die connecting to the circuit layer. The circuit layer includes multiple connecting sections. Each connecting section includes a first connecting part and a second connecting part electrically insulating and spaced from each other. Each LED includes an electrode layer having a first section and a second section electrically insulated from the first section and respectively electrically connecting the first and second connecting parts of a corresponding connecting section. The LED die is electrically connected to the second section. A transparent electrically conductive layer is formed on the LED die and electrically connects the LED die to the first section of the electrode layer. An electrically insulating layer is located between the LED die and surrounding the LED die except where the transparent electrically conductive layer connects.

Abstract translation: LED模块包括基座，形成在基座上的电路层和多个LED，每个LED具有连接到电路层的LED管芯。 电路层包括多个连接部分。 每个连接部分包括彼此电绝缘和间隔开的第一连接部分和第二连接部分。 每个LED包括具有第一部分的电极层和与第一部分电绝缘并分别电连接相应连接部分的第一和第二连接部分的第二部分。 LED管芯与第二部分电连接。 在LED管芯上形成透明导电层，并将LED管芯电连接到电极层的第一部分。 除了透明导电层连接之外，电绝缘层位于LED管芯之间并围绕LED管芯。

公开(公告)号：US08742443B2

公开(公告)日：2014-06-03

申请号：US13517554

申请日：2012-06-13

Applicant: Ya-Wen Lin ,  Shih-Cheng Huang ,  Po-Min Tu

Inventor： Ya-Wen Lin ,  Shih-Cheng Huang ,  Po-Min Tu

IPC: H01L27/15 ,  H01L33/22 ,  H01L33/20

CPC classification number: H01L33/22 ,  H01L33/10 ,  H01L33/12 ,  H01L33/20

Abstract: An LED epitaxial structure includes a substrate, a buffer layer, a functional layer and a light generating layer. The buffer layer is located on a top surface of the substrate. The functional layer includes a plurality of high-temperature epitaxial layers and low-temperature epitaxial layers alternatively arranged between the buffer layer and light generating layer. A textured structure is formed in the low-temperature epitaxial layer. A SiO2 layer including a plurality of convexes is located on the textured structure to increase light extraction efficiency of the LED epitaxial structure. A manufacturing method of the LED epitaxial structure is also disclosed.

Abstract translation: LED外延结构包括衬底，缓冲层，功能层和发光层。 缓冲层位于衬底的顶表面上。 功能层包括交替布置在缓冲层和发光层之间的多个高温外延层和低温外延层。 在低温外延层中形成纹理结构。 包含多个凸起的SiO 2层位于织构结构上，以增加LED外延结构的光提取效率。 还公开了一种LED外延结构的制造方法。

公开(公告)号：US08580590B2

公开(公告)日：2013-11-12

申请号：US13434860

申请日：2012-03-30

Applicant: Shih-Cheng Huang ,  Po-Min Tu ,  Ying-Chao Yeh ,  Wen-Yu Lin ,  Peng-Yi Wu ,  Shih-Hsiung Chan

Inventor： Shih-Cheng Huang ,  Po-Min Tu ,  Ying-Chao Yeh ,  Wen-Yu Lin ,  Peng-Yi Wu ,  Shih-Hsiung Chan

IPC: H01L21/00

CPC classification number: H01L33/08 ,  H01L33/0079

Abstract: A method for manufacturing a polychromatic light emitting diode device, comprising steps of providing an epitaxial substrate and forming a multiple semiconductor layer on the epitaxial substrate, wherein the multiple semiconductor layer comprises an n-type semiconductor layer, a p-type semiconductor layer and an active layer. The active layer emits light of a first wavelength. Thereafter a first wavelength conversion layer is formed on the multiple semiconductor layer. The first wavelength conversion layer is made of semiconductor and absorbs a portion of the light of a first wavelength and emits light of a second wavelength, wherein the second wavelength is longer than the first wavelength.

Abstract translation: 一种制造多色发光二极管器件的方法，包括以下步骤：在外延衬底上提供外延衬底和形成多重半导体层，其中所述多重半导体层包括n型半导体层，p型半导体层和 活动层 有源层发射第一波长的光。 此后，在多个半导体层上形成第一波长转换层。 第一波长转换层由半导体制成，并吸收一部分第一波长的光并发射第二波长的光，其中第二波长比第一波长长。

公开(公告)号：US08513039B2

公开(公告)日：2013-08-20

申请号：US13216260

申请日：2011-08-24

Applicant: Po-Min Tu ,  Shih-Cheng Huang ,  Tzu-Chien Hung ,  Ya-Wen Lin

Inventor： Po-Min Tu ,  Shih-Cheng Huang ,  Tzu-Chien Hung ,  Ya-Wen Lin

IPC: H01L21/00 ,  H01L21/461 ,  H01L21/302

CPC classification number: H01L33/20 ,  H01L33/007 ,  H01L33/12

Abstract: A method for fabricating a semiconductor lighting chip includes steps of: providing a substrate; forming a first etching layer on the substrate; forming a connecting layer on the first etching layer; forming a second etching layer on the connecting layer; forming a lighting structure on the second etching layer; and etching the first etching layer, the connecting layer, the second etching layer and the lighting structure, wherein an etching rate of the first etching layer and the second etching layer is lager than that of the connecting layer and the lighting structure, thereby to form the connecting layer and the lighting structure each with an inverted frustum-shaped structure.

Abstract translation: 一种制造半导体照明芯片的方法包括以下步骤：提供衬底; 在所述基板上形成第一蚀刻层; 在所述第一蚀刻层上形成连接层; 在连接层上形成第二蚀刻层; 在所述第二蚀刻层上形成照明结构; 并且蚀刻第一蚀刻层，连接层，第二蚀刻层和照明结构，其中第一蚀刻层和第二蚀刻层的蚀刻速率比连接层和照明结构的蚀刻速率大，从而形成 连接层和照明结构均具有倒立的截头锥形结构。

公开(公告)号：US08501582B2

公开(公告)日：2013-08-06

申请号：US12975235

申请日：2010-12-21

Applicant: Shih-Cheng Huang ,  Po-Min Tu ,  Shun-Kuei Yang ,  Chia-Hung Huang

Inventor： Shih-Cheng Huang ,  Po-Min Tu ,  Shun-Kuei Yang ,  Chia-Hung Huang

IPC: H01L21/76

CPC classification number: H01L29/06 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02614 ,  H01L21/02639 ,  H01L21/0265 ,  H01L33/007 ,  H01L33/12 ,  H01L33/20

Abstract: A semiconductor structure includes a Si substrate, a supporting layer and a blocking layer formed on the substrate and an epitaxy layer formed on the supporting layer. The supporting layer defines a plurality of grooves therein to receive the blocking layer. The epitaxy layer is grown from the supporting layer. A plurality of slots is defined in the epitaxy layer and over the blocking layer. The epitaxy layer includes an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer. A method for manufacturing the semiconductor structure is also disclosed.

Abstract translation: 半导体结构包括Si衬底，支撑层和形成在衬底上的阻挡层和形成在支撑层上的外延层。 支撑层在其中限定多个凹槽以接收阻挡层。 外延层从支撑层生长。 在外延层中和阻挡层上限定多个槽。 外延层包括N型半导体层，发光层和P型半导体层。 还公开了半导体结构的制造方法。

公开(公告)号：US08461619B2

公开(公告)日：2013-06-11

申请号：US13397688

申请日：2012-02-16

Applicant: Chia-Hung Huang ,  Shih-Cheng Huang ,  Po-Min Tu ,  Shun-Kuei Yang

Inventor： Chia-Hung Huang ,  Shih-Cheng Huang ,  Po-Min Tu ,  Shun-Kuei Yang

IPC: H01L33/36

CPC classification number: H01L33/38 ,  H01L33/14 ,  H01L33/20 ,  H01L33/42 ,  H01L2933/0016

Abstract: An LED chip includes a substrate, a first type semiconductor layer, a light-emitting layer, a second type semiconductor layer, a first electrode and a second electrode formed on the substrate in sequence. A surface of the first type semiconductor layer away from the substrate comprises an exposed first area and a second area covered by the light-emitting layer. The first electrode is formed on the exposed first area of the substrate. A number of recesses are defined in the second area of the surface of the first type semiconductor layer. The recesses are spaced apart from each other and arranged in sequence in a direction away from the first electrode; depths of the recesses gradually decrease following an increase of a distance between the recesses and the first electrode. The second electrode is formed on the second type semiconductor layer.

Abstract translation: LED芯片依次包括基板，第一类型半导体层，发光层，第二类型半导体层，第一电极和第二电极。 离开衬底的第一类型半导体层的表面包括暴露的第一区域和被发光层覆盖的第二区域。 第一电极形成在基板的暴露的第一区域上。 在第一类型半导体层的表面的第二区域中限定多个凹部。 凹部彼此间隔开并且沿远离第一电极的方向依次布置; 随着凹部和第一电极之间的距离的增加，凹部的深度逐渐减小。 第二电极形成在第二类型半导体层上。

公开(公告)号：US08450749B2

公开(公告)日：2013-05-28

申请号：US12986186

申请日：2011-01-07

Applicant: Po-Min Tu ,  Shih-Cheng Huang ,  Shun-Kuei Yang ,  Chia-Hung Huang

Inventor： Po-Min Tu ,  Shih-Cheng Huang ,  Shun-Kuei Yang ,  Chia-Hung Huang

IPC: H01L33/30 ,  H01L33/44

CPC classification number: H01L33/12 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02647 ,  H01L21/02661 ,  H01L33/007

Abstract: A light emitting element includes a substrate, a GaN layer formed on the substrate, a first low refractive index semiconductor layer formed on the GaN layer, and a lighting structure having a high refractive index formed on the first low refractive index semiconductor layer. A second low refractive index semiconductor layer is embedded in the first low refractive index semiconductor layer. The first low refractive index semiconductor layer and the GaN layer exhibit a lattice mismatch therebetween.

Abstract translation: 发光元件包括衬底，形成在衬底上的GaN层，形成在GaN层上的第一低折射率半导体层和形成在第一低折射率半导体层上的具有高折射率的点亮结构。 第二低折射率半导体层嵌入在第一低折射率半导体层中。 第一低折射率半导体层和GaN层之间呈现晶格失配。

公开(公告)号：US20120211771A1

公开(公告)日：2012-08-23

申请号：US13300617

申请日：2011-11-20

Applicant: PO-MIN TU ,  SHIH-CHENG HUANG

Inventor： PO-MIN TU ,  SHIH-CHENG HUANG

IPC: H01L33/12

CPC classification number: H01L33/025 ,  H01L21/02502 ,  H01L21/02513 ,  H01L21/02576 ,  H01L33/007 ,  H01L33/10 ,  H01L33/12

Abstract: An LED epitaxial structure includes a substrate, a buffer layer and an epitaxial layer. The buffer layer is grown on a top surface of the substrate, and the epitaxial layer is formed on a surface of the buffer layer. The epitaxial layer has a first n-type epitaxial layer and a second n-type epitaxial layer. The first n-type epitaxial layer is formed between the buffer layer and the second n-type epitaxial layer. The first n-type epitaxial layer has a plurality of irregular holes therein.

Abstract translation: LED外延结构包括衬底，缓冲层和外延层。 缓冲层在衬底的顶表面上生长，并且外延层形成在缓冲层的表面上。 外延层具有第一n型外延层和第二n型外延层。 第一n型外延层形成在缓冲层和第二n型外延层之间。 第一n型外延层在其中具有多个不规则孔。

公开(公告)号：US20120205690A1

公开(公告)日：2012-08-16

申请号：US13304414

申请日：2011-11-25

Applicant: PO-MIN TU ,  SHIH-CHENG HUANG

Inventor： PO-MIN TU ,  SHIH-CHENG HUANG

IPC: H01L33/32

CPC classification number: H01L33/06 ,  H01L33/32

Abstract: A group III-nitride based semiconductor LED includes a sapphire substrate, an n-type semiconductor layer, an active layer, and a p-type semiconductor layer grown sequentially on the sapphire substrate. An n-type strain lattice structure is arranged between the n-type semiconductor layer and the active layer. A lattice constant of the n-type strain lattice structure exceeds that of the active layer, and is less than that of the n-type semiconductor layer.

Abstract translation: III族氮化物基半导体LED包括在蓝宝石衬底上顺序生长的蓝宝石衬底，n型半导体层，有源层和p型半导体层。 在n型半导体层和有源层之间配置n型应变格子结构。 n型应变格子结构的晶格常数超过有源层的晶格常数，并且小于n型半导体层的晶格常数。

公开(公告)号：US20120196391A1

公开(公告)日：2012-08-02

申请号：US13231715

申请日：2011-09-13

Applicant: PO-MIN TU ,  SHIH-CHENG HUANG ,  YA-WEN LIN

Inventor： PO-MIN TU ,  SHIH-CHENG HUANG ,  YA-WEN LIN

IPC: H01L33/20 ,  B82Y40/00

CPC classification number: H01L33/22 ,  B82Y40/00 ,  H01L33/0095 ,  H01L33/18 ,  H01L33/32

Abstract: A method for fabricating a semiconductor lighting chip includes steps: providing a substrate with an epitaxial layer, the epitaxial layer comprising a first semiconductor layer, a second semiconductor layer and an active layer located between the first semiconductor layer and the second semiconductor layer; dipping the epitaxial layer into an electrolyte to etch surfaces of the epitaxial layer and form a number of holes on the epitaxial layer; and forming electrodes on the epitaxial layer.

Abstract translation: 一种制造半导体照明芯片的方法包括以下步骤：为衬底提供外延层，所述外延层包括位于第一半导体层和第二半导体层之间的第一半导体层，第二半导体层和有源层; 将外延层浸入电解质中以蚀刻外延层的表面并在外延层上形成许多孔; 以及在外延层上形成电极。