公开(公告)号：US07888238B2

公开(公告)日：2011-02-15

申请号：US12330745

申请日：2008-12-09

申请人： Shinji Wakisaka ,  Norihiko Kaneko

发明人： Shinji Wakisaka ,  Norihiko Kaneko

IPC分类号： H01L21/00

CPC分类号： H01L23/525 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/172 ,  H01L21/561 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/5329 ,  H01L24/11 ,  H01L24/12 ,  H01L24/94 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/18301 ,  H01L2924/30105

摘要： A wafer process material is prepared which has a plurality of semiconductor formation regions of different planar sizes, each including a low dielectric constant film/wiring line stack structure component. A laser beam is applied onto a dicing street of the necessary semiconductor formation region and onto its straight extension in order to remove partial areas of the low dielectric constant film/wiring line stack structure components of the necessary semiconductor formation region and the unnecessary semiconductor formation region so that first groove and the second groove are formed. A protective film is formed in the second groove formed in the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component. An upper wiring line and a sealing film are formed on the protective film, and a semiconductor wafer is cut along the dicing street.

摘要翻译： 制备具有多个不同平面尺寸的半导体形成区域的晶片处理材料，每个半导体形成区域包括低介电常数膜/布线层叠结构部件。 将激光束施加到必要的半导体形成区域的切割街道上，并将其施加到其直线延伸部上，以便去除所需半导体形成区域的低介电常数薄膜/布线层叠结构部件的部分区域和不需要的半导体形成区域 从而形成第一槽和第二槽。 在形成于不需要的半导体形成区域的第二沟槽和低介电常数膜/布线堆叠结构部件上形成保护膜。 在保护膜上形成上部布线和密封膜，沿着切割街切割半导体晶片。

公开(公告)号：US07808073B2

公开(公告)日：2010-10-05

申请号：US11093571

申请日：2005-03-30

申请人： Shinji Wakisaka

发明人： Shinji Wakisaka

IPC分类号： H01L23/52

CPC分类号： H01L25/16 ,  H01G4/228 ,  H01G4/33 ,  H01L23/3114 ,  H01L23/5389 ,  H01L23/544 ,  H01L23/642 ,  H01L24/11 ,  H01L24/12 ,  H01L24/19 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/54466 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05647 ,  H01L2224/1147 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/1411 ,  H01L2224/24137 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3025 ,  H03H1/02 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01024 ,  H01L2924/013

摘要： A network electronic component comprises a network-electronic-component substrate, a thin-film passive element provided on the substrate, and a plurality of external connection electrodes provided on the substrate in connection with the thin-film passive element.

摘要翻译： 网络电子部件包括网络电子部件基板，设置在基板上的薄膜无源元件以及与薄膜无源元件连接而设置在基板上的多个外部连接电极。

公开(公告)号：US07692282B2

公开(公告)日：2010-04-06

申请号：US11853673

申请日：2007-09-11

申请人： Shinji Wakisaka ,  Hiroyasu Jobetto ,  Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Shinji Wakisaka ,  Hiroyasu Jobetto ,  Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L23/52

CPC分类号： H01L24/27 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/20 ,  H01L2224/274 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4943 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/3025 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/07025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A first semiconductor element is mounted on a base plate, and is in a sealed state by the periphery thereof being covered by an insulation member, and the upper surface thereof being covered by an upper insulation film. An upper wiring layer formed on the upper insulation film, and the lower wiring layer formed below the base plate via lower insulation films are connected by conductors. A second semiconductor element is mounted exposed, being connected to the lower wiring layer.

摘要翻译： 第一半导体元件安装在基板上，其周边处于密封状态，被绝缘构件覆盖，其上表面被上绝缘膜覆盖。 通过导体将形成在上绝缘膜上的上布线层和通过下绝缘膜形成在基板下方的下布线层连接。 第二半导体元件被暴露安装，连接到下布线层。

公开(公告)号：US20080006943A1

公开(公告)日：2008-01-10

申请号：US11853673

申请日：2007-09-11

申请人： Shinji WAKISAKA ,  Hiroyasu Jobetto ,  Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Shinji WAKISAKA ,  Hiroyasu Jobetto ,  Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L23/488

CPC分类号： H01L24/27 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/20 ,  H01L2224/274 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4943 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/3025 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/07025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A first semiconductor element is mounted on a base plate, and is in a sealed state by the periphery thereof being covered by an insulation member, and the upper surface thereof being covered by an upper insulation film. An upper wiring layer formed on the upper insulation film, and the lower wiring layer formed below the base plate via lower insulation films are connected by conductors. A second semiconductor element is mounted exposed, being connected to the lower wiring layer.

摘要翻译： 第一半导体元件安装在基板上，其周边处于密封状态，被绝缘构件覆盖，其上表面被上绝缘膜覆盖。 通过导体将形成在上绝缘膜上的上布线层和通过下绝缘膜形成在基板下方的下布线层连接。 第二半导体元件被暴露安装，连接到下布线层。

公开(公告)号：US20050062147A1

公开(公告)日：2005-03-24

申请号：US10940232

申请日：2004-09-13

申请人： Shinji Wakisaka ,  Hiroyasu Jobetto

发明人： Shinji Wakisaka ,  Hiroyasu Jobetto

IPC分类号： H01L23/52 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/12 ,  H01L23/31 ,  H01L23/34 ,  H01L23/367 ,  H01L23/498 ,  H05K1/00

CPC分类号： H01L24/83 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/49816 ,  H01L24/19 ,  H01L24/27 ,  H01L24/29 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/2518 ,  H01L2224/274 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/92244 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00

摘要： A semiconductor device includes a semiconductor constructing body which has a semiconductor substrate, a plurality of external connection electrodes formed on the semiconductor substrate, and heat dissipation columnar electrodes. Upper interconnections are mounted on one side of the semiconductor constructing body and connected to the external connection electrodes of the semiconductor constructing body. A heat dissipation layer is mounted on one side of the semiconductor constructing body and made of the same material as that of the upper interconnections.

摘要翻译： 半导体器件包括半导体构造体，其具有半导体衬底，形成在半导体衬底上的多个外部连接电极和散热柱状电极。 上部互连件安装在半导体构造体的一侧并连接到半导体构造体的外部连接电极。 散热层安装在半导体构造体的一侧，由与上部互连相同的材料制成。

公开(公告)号：US08487443B2

公开(公告)日：2013-07-16

申请号：US13074233

申请日：2011-03-29

申请人： Shinji Wakisaka

发明人： Shinji Wakisaka

IPC分类号： H01L23/48

CPC分类号： H01L23/49827 ,  B81B7/007 ,  B81B2207/095 ,  B81B2207/096 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/3107 ,  H01L23/49822 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/82102 ,  H01L2224/92244 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1461 ,  H01L2924/00

摘要： Disclosed is a semiconductor structure including a semiconductor substrate including an electronic circuit which is provided in a predetermined region of the semiconductor substrate, a wiring provided on the semiconductor substrate in a region outside of the predetermined region, an external connection electrode provided on the wiring, a sealing resin which covers a side surface of the external connection electrode and a wall which intervenes between the electronic circuit and the sealing resin.

摘要翻译： 公开了一种半导体结构，包括半导体衬底，该半导体衬底包括设置在半导体衬底的预定区域中的电子电路，设置在半导体衬底上的预定区域外的区域中的布线，设置在布线上的外部连接电极， 覆盖外部连接电极的侧面的密封树脂和介于电子电路和密封树脂之间的壁。

公开(公告)号：US20110304043A1

公开(公告)日：2011-12-15

申请号：US13152620

申请日：2011-06-03

申请人： Shinji Wakisaka

发明人： Shinji Wakisaka

IPC分类号： H01L23/498 ,  H01L21/56

CPC分类号： H01L21/568 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/562 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00

摘要： A semiconductor device comprises a semiconductor chip which comprises mode-set terminals, and mode-set wiring lines respectively connected to the mode-set terminals, a sealing layer which covers the semiconductor chip and also covers a land of a first mode-set wiring line that is one of the mode-set wiring lines, the sealing layer including a mode-set via hole formed above a land of a second mode-set wiring line, the second mode-set wiring line being one of the mode-set wiring lines and being different from the first mode-set wiring line, a mode-set embedded conductor provided within the mode-set via hole to be connected to the second mode-set wiring line, and a mode-set conductive pattern which is connected to the mode-set embedded conductor and which is provided on the sealing layer above the land of the first mode-set wiring line.

摘要翻译： 一种半导体器件包括：半导体芯片，其包括模式设定端子和分别连接到模拟端子的模式布线;覆盖半导体芯片的密封层，并且还覆盖第一模式布线的焊盘 即模式布线中的一个，密封层包括形成在第二模式布线的平台上的模式通孔，第二模式设置布线是模式布线 并且与第一模式布线不同，设置在与第二模式组布线连接的模式设定通孔内的模式设置嵌入式导体以及连接到第二模式组布线的模式设置导体图案 模式嵌入式导体，其设置在第一模式配线的焊盘上方的密封层上。

公开(公告)号：US20110001238A1

公开(公告)日：2011-01-06

申请号：US12828492

申请日：2010-07-01

申请人： Shinji WAKISAKA ,  Takeshi Wakabayashi

发明人： Shinji WAKISAKA ,  Takeshi Wakabayashi

IPC分类号： H01L23/48 ,  H01L23/485 ,  H01L21/768 ,  H01L21/60

CPC分类号： H01L24/49 ,  H01L21/561 ,  H01L21/6835 ,  H01L23/28 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/525 ,  H01L23/5389 ,  H01L24/09 ,  H01L24/14 ,  H01L24/19 ,  H01L24/27 ,  H01L24/28 ,  H01L24/29 ,  H01L24/48 ,  H01L24/83 ,  H01L24/97 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05599 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/274 ,  H01L2224/2919 ,  H01L2224/48151 ,  H01L2224/48491 ,  H01L2224/49 ,  H01L2224/73267 ,  H01L2224/83191 ,  H01L2224/83855 ,  H01L2224/83856 ,  H01L2224/85399 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/19043 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2224/214

摘要： A semiconductor construct includes a semiconductor substrate and connection pads provided on the semiconductor substrate. Some of the connection pads are connected to a common wiring and at least one of the remaining of the connection pads are connected to a wiring. The construct also includes a first columnar electrode provided to be connected to the common wiring and a second columnar electrode provided to be connected to a connection pad portion of the wiring.

摘要翻译： 半导体构造包括半导体衬底和设置在半导体衬底上的连接焊盘。 一些连接焊盘连接到公共布线，并且剩余的连接焊盘中的至少一个连接到布线。 该构造还包括设置成连接到公共布线的第一柱状电极和设置成连接到布线的连接焊盘部分的第二柱状电极。

公开(公告)号：US20100059895A1

公开(公告)日：2010-03-11

申请号：US12555997

申请日：2009-09-09

申请人： Shinji WAKISAKA

发明人： Shinji WAKISAKA

IPC分类号： H01L23/522 ,  H01L21/768

CPC分类号： H01L21/78 ,  H01L23/3114 ,  H01L24/06 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05647 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2224/03 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00014

摘要： In the manufacture of a semiconductor, in unnecessary semiconductor device formation areas 22b and 22c, a columnar electrode 14 made of copper is formed only in an area excluding an area corresponding to a dicing street 23 and both sides of the dicing street 23, and is not formed in the area corresponding to the dicing street 23 and both sides of the dicing street 23. As a result, the dicing blade is prevented from being clogged with copper. In this case, a plurality of layers of low-dielectric film and the same number of layers of wiring are formed on a semiconductor wafer such that they are alternately laminated, and the columnar electrode is formed on a connection pad portion of upper layer wiring formed on the low-dielectric film wiring laminated structure section with an insulating film therebetween.

摘要翻译： 在制造半导体时，在不必要的半导体器件形成区域22b和22c中，仅在除切割街道23和切割街道23的两侧的区域之外的区域中形成由铜制成的柱状电极14，并且 没有形成在与切割街道23相对应的区域和切割街道23的两侧。结果，防止切割刀被铜堵塞。 在这种情况下，在半导体晶片上形成多层低电介质膜和相同数量的布线，使得它们交替层叠，并且柱状电极形成在形成的上层布线的连接焊盘部分上 在其间具有绝缘膜的低电介质膜布线层叠结构部分上。

公开(公告)号：US20090155982A1

公开(公告)日：2009-06-18

申请号：US12330745

申请日：2008-12-09

申请人： Shinji WAKISAKA ,  Norihiko KANEKO

发明人： Shinji WAKISAKA ,  Norihiko KANEKO

IPC分类号： H01L21/302

CPC分类号： H01L23/525 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/172 ,  H01L21/561 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/5329 ,  H01L24/11 ,  H01L24/12 ,  H01L24/94 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/18301 ,  H01L2924/30105

摘要： A wafer process material is prepared which has a plurality of semiconductor formation regions of different planar sizes, each including a low dielectric constant film/wiring line stack structure component. A laser beam is applied onto a dicing street of the necessary semiconductor formation region and onto its straight extension in order to remove partial areas of the low dielectric constant film/wiring line stack structure components of the necessary semiconductor formation region and the unnecessary semiconductor formation region so that first groove and the second groove are formed. A protective film is formed in the second groove formed in the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component. An upper wiring line and a sealing film are formed on the protective film, and a semiconductor wafer is cut along the dicing street.

摘要翻译： 制备具有多个不同平面尺寸的半导体形成区域的晶片处理材料，每个半导体形成区域包括低介电常数膜/布线层叠结构部件。 将激光束施加到必要的半导体形成区域的切割街道上，并将其施加到其直线延伸部上，以便去除所需半导体形成区域的低介电常数薄膜/布线层叠结构部件的部分区域和不需要的半导体形成区域 从而形成第一槽和第二槽。 在形成于不需要的半导体形成区域的第二沟槽和低介电常数膜/布线堆叠结构部件上形成保护膜。 在保护膜上形成上部布线和密封膜，沿着切割街切割半导体晶片。