Switching circuit, DC-DC converter and display driver integrated circuit including the same
    1.
    发明申请
    Switching circuit, DC-DC converter and display driver integrated circuit including the same 失效
    开关电路,DC-DC转换器和显示驱动器集成电路包括相同的

    公开(公告)号:US20100091002A1

    公开(公告)日:2010-04-15

    申请号:US12587512

    申请日:2009-10-08

    IPC分类号: H03K17/687 G06F3/038

    CPC分类号: H03K17/693 H02J7/0065

    摘要: A switching circuit and a DC-DC converter including the same are provided. The switching circuit includes an output terminal, a plurality of input terminals, and a plurality of switches configured to selectively connect the plurality of input terminals to the output terminal. The plurality of switches include a first switch directly connected to the output terminal and a plurality of second switches connecting the plurality of input terminals to the first switch. The first switch is implemented using a high-voltage transistor. Each of the second switches is implemented using a low-voltage transistor. A gate of the high-voltage transistor is at least two times longer than a gate of the low-voltage transistor. The DC-DC converter increases or decreases a signal selected from among a plurality of input signals input through the input terminals by a predetermined voltage level. Most of switches in the switching circuit are implemented using low-voltage transistors, thereby decreasing the area of the switching circuit.

    摘要翻译: 提供一种开关电路和包括该开关电路的DC-DC转换器。 开关电路包括输出端子,多个输入端子以及被配置为将多个输入端子选择性地连接到输出端子的多个开关。 多个开关包括直接连接到输出端子的第一开关和将多个输入端子连接到第一开关的多个第二开关。 第一个开关是使用高压晶体管实现的。 使用低压晶体管来实现每个第二开关。 高压晶体管的栅极比低压晶体管的栅极长至少两倍。 DC-DC转换器将从输入端子输入的多个输入信号中选出的信号增加或减少预定的电压电平。 开关电路中的大多数开关使用低压晶体管来实现,从而减小开关电路的面积。

    VOLTAGE GENERATOR THAT PREVENTS LATCH-UP
    2.
    发明申请
    VOLTAGE GENERATOR THAT PREVENTS LATCH-UP 失效
    电压发生器,防止锁定

    公开(公告)号:US20080284497A1

    公开(公告)日:2008-11-20

    申请号:US12117445

    申请日:2008-05-08

    IPC分类号: G05F3/02 G09G5/00

    摘要: A voltage generator that prevents latch-up includes: a charge pump circuit that is controlled by first through third enable signals, boosts an internal power voltage generated from an external power voltage, and generates first through fourth voltages; a detector that detects the first through third voltages and generates first through third flag signals that go logic high when the first through third voltages reach predetermined respective voltage levels and maintain logic low when the voltages do not reach the predetermined respective voltage levels; and a charge pump controller that receives the first through third flag signals, and generates the first through third enable signals to have the first through fourth voltages sequentially generated. The voltage generator can prevent latch-up that may occur in a boosting mode or in a normal operation mode.

    摘要翻译: 防止闩锁的电压发生器包括:由第一至第三使能信号控制的电荷泵电路,升高由外部电源电压产生的内部电源电压,并产生第一至第四电压; 检测器,其检测第一至第三电压并产生第一至第三标志信号,当第一至第三电压达到预定的各个电压电平时,第一至第三标志信号变为逻辑高电平,并且当电压未达到预定的相应电压电平时维持逻辑低电平; 以及电荷泵控制器,其接收第一至第三标志信号,并且产生第一至第三使能信号以顺序产生第一至第四电压。 电压发生器可以防止在升压模式或正常工作模式下可能发生的闩锁。

    Charge pump circuit and method of controlling the same
    3.
    发明申请
    Charge pump circuit and method of controlling the same 有权
    电荷泵电路及其控制方法

    公开(公告)号:US20080272832A1

    公开(公告)日:2008-11-06

    申请号:US12068281

    申请日:2008-02-05

    IPC分类号: G05F1/10

    CPC分类号: H01L27/0222 H02M3/07

    摘要: A charge pump circuit and related method are provided. The charge pump circuit includes first, second and third voltage generation units, first and second control units, and a latch-up prevention unit. The first generation unit regulates a first output signal, the second generation unit boosts a second output signal, and the third generation unit boosts a third output signal in response to the first and second output signals. The first control unit is connected between the first generation unit and the third generation unit, and the second control unit is connected between the second generation unit and the third generation unit. The first and second control units block respective outputs of the first and second generation units during the boosting time for the second output signal. The latch-up prevention unit prevents a latch-up operation caused by a parasitic transistor until the third output signal is maintained at a third voltage.

    摘要翻译: 提供电荷泵电路及相关方法。 电荷泵电路包括第一,第二和第三电压产生单元,第一和第二控制单元以及闭锁预防单元。 第一代单元调节第一输出信号,第二代单元升高第二输出信号,第三代单元响应于第一和第二输出信号升高第三输出信号。 第一控制单元连接在第一生成单元和第三生成单元之间,第二控制单元连接在第二生成单元和第三生成单元之间。 第一和第二控制单元在第二输出信号的升压时间期间阻止第一和第二发电单元的相应输出。 闩锁防止单元防止由寄生晶体管引起的闩锁操作,直到第三输出信号保持在第三电压。

    Switching circuit, DC-DC converter and display driver integrated circuit including the same
    4.
    发明授权
    Switching circuit, DC-DC converter and display driver integrated circuit including the same 失效
    开关电路,DC-DC转换器和显示驱动器集成电路包括相同的

    公开(公告)号:US08350840B2

    公开(公告)日:2013-01-08

    申请号:US12587512

    申请日:2009-10-08

    IPC分类号: H03K17/687 G06F3/038

    CPC分类号: H03K17/693 H02J7/0065

    摘要: A switching circuit and a DC-DC converter including the same are provided. The switching circuit includes an output terminal, a plurality of input terminals, and a plurality of switches configured to selectively connect the plurality of input terminals to the output terminal. The plurality of switches include a first switch directly connected to the output terminal and a plurality of second switches connecting the plurality of input terminals to the first switch. The first switch is implemented using a high-voltage transistor. Each of the second switches is implemented using a low-voltage transistor. A gate of the high-voltage transistor is at least two times longer than a gate of the low-voltage transistor. The DC-DC converter increases or decreases a signal selected from among a plurality of input signals input through the input terminals by a predetermined voltage level. Most of switches in the switching circuit are implemented using low-voltage transistors, thereby decreasing the area of the switching circuit.

    摘要翻译: 提供一种开关电路和包括该开关电路的DC-DC转换器。 开关电路包括输出端子,多个输入端子以及被配置为将多个输入端子选择性地连接到输出端子的多个开关。 多个开关包括直接连接到输出端子的第一开关和将多个输入端子连接到第一开关的多个第二开关。 第一个开关是使用高压晶体管实现的。 使用低压晶体管来实现每个第二开关。 高压晶体管的栅极比低压晶体管的栅极长至少两倍。 DC-DC转换器将从输入端子输入的多个输入信号中选出的信号增加或减少预定的电压电平。 开关电路中的大多数开关使用低压晶体管来实现,从而减小开关电路的面积。

    Charge pump circuit and method of controlling the same
    5.
    发明授权
    Charge pump circuit and method of controlling the same 有权
    电荷泵电路及其控制方法

    公开(公告)号:US07576592B2

    公开(公告)日:2009-08-18

    申请号:US12068281

    申请日:2008-02-05

    IPC分类号: G05F1/10

    CPC分类号: H01L27/0222 H02M3/07

    摘要: A charge pump circuit and related method are provided. The charge pump circuit includes first, second and third voltage generation units, first and second control units, and a latch-up prevention unit. The first generation unit regulates a first output signal, the second generation unit boosts a second output signal, and the third generation unit boosts a third output signal in response to the first and second output signals. The first control unit is connected between the first generation unit and the third generation unit, and the second control unit is connected between the second generation unit and the third generation unit. The first and second control units block respective outputs of the first and second generation units during the boosting time for the second output signal. The latch-up prevention unit prevents a latch-up operation caused by a parasitic transistor until the third output signal is maintained at a third voltage.

    摘要翻译: 提供电荷泵电路及相关方法。 电荷泵电路包括第一,第二和第三电压产生单元,第一和第二控制单元以及闭锁预防单元。 第一代单元调节第一输出信号,第二代单元升高第二输出信号,第三代单元响应于第一和第二输出信号升高第三输出信号。 第一控制单元连接在第一生成单元和第三生成单元之间,第二控制单元连接在第二生成单元和第三生成单元之间。 第一和第二控制单元在第二输出信号的升压时间期间阻止第一和第二发电单元的相应输出。 闩锁防止单元防止由寄生晶体管引起的闩锁操作,直到第三输出信号保持在第三电压。

    Voltage generator that prevents latch-up
    6.
    发明授权
    Voltage generator that prevents latch-up 失效
    电压发生器,防止闩锁

    公开(公告)号:US07990204B2

    公开(公告)日:2011-08-02

    申请号:US12117445

    申请日:2008-05-08

    IPC分类号: G05F1/10

    摘要: A voltage generator that prevents latch-up includes: a charge pump circuit that is controlled by first through third enable signals, boosts an internal power voltage generated from an external power voltage, and generates first through fourth voltages; a detector that detects the first through third voltages and generates first through third flag signals that go logic high when the first through third voltages reach predetermined respective voltage levels and maintain logic low when the voltages do not reach the predetermined respective voltage levels; and a charge pump controller that receives the first through third flag signals, and generates the first through third enable signals to have the first through fourth voltages sequentially generated. The voltage generator can prevent latch-up that may occur in a boosting mode or in a normal operation mode.

    摘要翻译: 防止闩锁的电压发生器包括:由第一至第三使能信号控制的电荷泵电路,升高由外部电源电压产生的内部电源电压,并产生第一至第四电压; 检测器,其检测第一至第三电压并产生第一至第三标志信号,当第一至第三电压达到预定的各个电压电平时,第一至第三标志信号变为逻辑高电平,并且当电压未达到预定的各个电压电平时维持逻辑低电平; 以及电荷泵控制器,其接收第一至第三标志信号,并且产生第一至第三使能信号以顺序产生第一至第四电压。 电压发生器可以防止在升压模式或正常工作模式下可能发生的闩锁。

    Common voltage generator, display device including the same, and method thereof
    7.
    发明申请
    Common voltage generator, display device including the same, and method thereof 有权
    共电压发生器,包括其的显示装置及其方法

    公开(公告)号:US20090267882A1

    公开(公告)日:2009-10-29

    申请号:US12385706

    申请日:2009-04-16

    IPC分类号: G09G3/36 H03F3/45

    CPC分类号: G09G3/3655

    摘要: The common voltage generator includes an operational amplifier and a plurality of switches. The operational amplifier is configured to amplify a difference between a first voltage and a second voltage and to output the amplified voltage as a common voltage. The plurality of switches are configured to transmit a third voltage and a fourth voltage as a power supply to the operational amplifier in a first voltage output mode and to transmit a fifth voltage and a sixth voltage as a power supply to the operational amplifier in a second voltage output mode.

    摘要翻译: 公共电压发生器包括运算放大器和多个开关。 运算放大器被配置为放大第一电压和第二电压之间的差,并将放大的电压作为公共电压输出。 多个开关被配置为以第一电压输出模式将作为电源的第三电压和第四电压作为电源发送到运算放大器,并且在第二电压输出模式中将第五电压和第六电压作为电源发送到运算放大器 电压输出模式。

    MEMORY CELL AND MEMORY DEVICE HAVING THE SAME
    8.
    发明申请
    MEMORY CELL AND MEMORY DEVICE HAVING THE SAME 有权
    存储单元和具有该存储单元的存储器件

    公开(公告)号:US20140198560A1

    公开(公告)日:2014-07-17

    申请号:US14083569

    申请日:2013-11-19

    IPC分类号: G11C11/4096

    摘要: A memory cell includes a metal oxide semiconductor (MOS) capacitor including a gate coupled to a storage node and an electrode coupled to a synchronization control line. The MOS capacitor adds a coupling voltage to the gate based on a change in voltage on the synchronization control line. The coupling voltage may maintain the storage node within a predetermined range.

    摘要翻译: 存储单元包括金属氧化物半导体(MOS)电容器,其包括耦合到存储节点的栅极和耦合到同步控制线的电极。 MOS电容器基于同步控制线上的电压变化,向栅极增加耦合电压。 耦合电压可以将存储节点维持在预定范围内。

    SOURCE DRIVER AND DISPLAY DEVICE INCLUDING THE SAME
    10.
    发明申请
    SOURCE DRIVER AND DISPLAY DEVICE INCLUDING THE SAME 审中-公开
    源驱动器和显示器件,包括它们

    公开(公告)号:US20090278865A1

    公开(公告)日:2009-11-12

    申请号:US12420924

    申请日:2009-04-09

    IPC分类号: G09G5/10

    摘要: A source driver having a small layout area and low power consumption includes a signal generation block generating a plurality of pulse width modulation (PWM) signals and a plurality of staircase waveform grayscale voltage signals according to a digital code generated based on an oscillation signal and a channel driver. The channel driver divides latched video data into upper bits and lower bits, generates a plurality of switching signals using one PWM signal selected from among the plurality of PWM signals in response to the lower bits, outputs one staircase waveform grayscale voltage signal selected from among the plurality of staircase waveform grayscale voltage signals in response to the upper bits, and outputs a particular grayscale voltage level included in the one staircase waveform grayscale voltage signal in response to the plurality of switching signals.

    摘要翻译: 具有小布局面积和低功耗的源极驱动器包括根据基于振荡信号产生的数字码产生多个脉宽调制(PWM)信号和多个阶梯波形灰度电压信号的信号产生块, 频道驱动 通道驱动器将锁存的视频数据分割为高位和低位,使用从多个PWM信号中选择的一个PWM信号响应于低位产生多个切换信号,输出从下列位置中选出的一个阶梯波形灰度电压信号: 多个阶梯波形灰度级电压信号,并且响应于多个切换信号输出包括在一个阶梯波形灰度电压信号中的特定灰度级电压电平。