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公开(公告)号:US06214647B1
公开(公告)日:2001-04-10
申请号:US09159239
申请日:1998-09-23
申请人: Giulio Di Giacomo , Stephen S. Drofitz, Jr. , David L. Edwards , Sushumna Iruvanti , David J. Womac
发明人: Giulio Di Giacomo , Stephen S. Drofitz, Jr. , David L. Edwards , Sushumna Iruvanti , David J. Womac
IPC分类号: H01L2144
CPC分类号: H01L23/4338 , H01L2224/16 , H01L2224/73253 , H01L2924/09701
摘要: A method and structure for thermally connecting a thermal conductor to at least one chip, the thermal conductor including a lower surface and at least one piston extending from the lower surface corresponding to each of the chips, each of the chips having an upper surface opposing each of the pistons, the chips being mounted on a substrate, the method comprising steps of metalizing the lower surface of the thermal conductor and the pistons, applying a solder to the lower surface of the thermal conductor, applying a thermal paste between the upper surface of the chips and the pistons, positioning the substrate and the thermal conductor such that the substrate is aligned with the thermal conductor, biasing the thermal conductor toward the substrate, biasing the pistons toward the chips such that the thermal paste has a consistent thickness between each of the chips and the pistons, reflowing the solder, such that the solder bonds the substrate to the thermal conductor and the pistons form a metallurgical bond with the thermal conductor, wherein after the reflowing step, the pistons and the thermal conductor form a unitary structure for maintaining the consistent thickness of the thermal paste between each of the chips and the pistons which achieves a considerably thinner thermal paste layer and greater thermal conduction.
摘要翻译: 一种用于将热导体热连接到至少一个芯片的方法和结构,所述热导体包括下表面和从与每个芯片对应的下表面延伸的至少一个活塞,每个芯片具有与每个芯片相对的上表面 的活塞,所述芯片安装在基板上,所述方法包括以下步骤:使所述导热体和所述活塞的下表面金属化,向所述导热体的下表面施加焊料,在所述导热体的上表面 芯片和活塞,定位衬底和热导体,使得衬底与热导体对准,将热导体偏压朝向衬底,将活塞偏压到芯片,使得热膏在每个之间具有一致的厚度 芯片和活塞,回流焊料,使得焊料将基板粘合到热导体和活塞上 与热导体进行冶金结合,其中在回流步骤之后,活塞和热导体形成整体结构,用于保持每个芯片和活塞之间的热粘合剂的厚度一致,其实现相当薄的热糊层,并且 更大的热传导。
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公开(公告)号:US5981310A
公开(公告)日:1999-11-09
申请号:US12071
申请日:1998-01-22
申请人: Giulio DiGiacomo , Stephen S. Drofitz, Jr. , David L. Edwards , Larry D. Gross , Sushumna Iruvanti , Raed A. Sherif , Subhash L. Shinde , David J. Womac , David B. Goland , Lester W. Herron
发明人: Giulio DiGiacomo , Stephen S. Drofitz, Jr. , David L. Edwards , Larry D. Gross , Sushumna Iruvanti , Raed A. Sherif , Subhash L. Shinde , David J. Womac , David B. Goland , Lester W. Herron
IPC分类号: H01L23/433 , H01L25/065 , H01L21/44 , H01L21/48 , H01L21/50
CPC分类号: H01L23/433 , H01L24/83 , H01L25/0655 , H01L2224/16225 , H01L2224/29111 , H01L2224/32245 , H01L2224/73253 , H01L2224/83193 , H01L2224/83801 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/157 , H01L2924/15724 , H01L2924/15788 , H01L2924/16152 , H01L2924/16251
摘要: A multi-chip module and heat-sink cap assembly and method of fabrication, which provides sufficient cooling for higher power density chips. The heat-sink cap has heat-sink columns disposed over each chip on a substrate. The heat-sink columns are interconnected by flexible members to provide a unitary cover. Thin film metallization of at least a portion of the mating surfaces of the substrate, chips and heat-sink column permits soldering of the cap to the chips and substrate to form the package which is a mechanically stable structure with no degradation of interconnection fatigue life due to thermal cycling of the assembly when in use.
摘要翻译: 一种多芯片模块和散热帽组件及其制造方法,为更高功率密度的芯片提供足够的冷却。 散热器盖具有设置在基板上的每个芯片上的散热柱。 散热柱通过柔性构件相互连接,以提供整体盖。 衬底,芯片和散热柱的配合表面的至少一部分的薄膜金属化允许将帽焊接到芯片和衬底以形成封装,其是机械稳定的结构,而不会降低互连疲劳寿命 在使用时对组件进行热循环。
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公开(公告)号:US5881944A
公开(公告)日:1999-03-16
申请号:US846929
申请日:1997-04-30
申请人: David L. Edwards , Armando S. Cammarano , Jeffrey T. Coffin , Mark G. Courtney , Stephen S. Drofitz, Jr. , Michael J. Ellsworth, Jr. , Lewis S. Goldmann , Sushumna Iruvanti , Frank L. Pompeo , William E. Sablinski , Raed A. Sherif , Hilton T. Toy
发明人: David L. Edwards , Armando S. Cammarano , Jeffrey T. Coffin , Mark G. Courtney , Stephen S. Drofitz, Jr. , Michael J. Ellsworth, Jr. , Lewis S. Goldmann , Sushumna Iruvanti , Frank L. Pompeo , William E. Sablinski , Raed A. Sherif , Hilton T. Toy
CPC分类号: H01L23/10 , B23K35/0238 , B23K35/26 , B23K2201/40 , H01L2224/16 , H01L2224/73253 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/09701 , H01L2924/15312 , H01L2924/16152 , H01L2924/163 , Y10T428/12361
摘要: The present invention relates generally to a new scheme of providing a seal band for semi-conductor substrates and chip carriers. More particularly, the invention encompasses a structure and a method that uses a multi-layer metallic seal to provide protection to chips on a chip carrier. This multi-layer metal seal provides both enhanced hermeticity lifetime and environmental protection. For the preferred embodiment the multi-layer metallic seal band is a three layer, solder sandwich structure which is used to create a low cost, high reliability, hermetic seal for the module. This solder sandwich has a high melting temperature thick solder inner core, and lower melting point thin interconnecting solder layers, where the thin interconnecting solder layers may have similar or different melting points.
摘要翻译: 本发明一般涉及为半导体衬底和芯片载体提供密封带的新方案。 更具体地,本发明包括使用多层金属密封件来为芯片载体上的芯片提供保护的结构和方法。 这种多层金属密封提供增强的气密寿命和环境保护。 对于优选实施例,多层金属密封带是用于为模块产生低成本,高可靠性气密密封的三层焊料夹层结构。 该焊料夹层具有较高的熔化温度较厚的焊料内芯和较低熔点的薄互连焊料层,其中薄的互连焊料层可具有相似或不同的熔点。
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公开(公告)号:US06373133B1
公开(公告)日:2002-04-16
申请号:US09353467
申请日:1999-07-13
申请人: Giulio DiGiacomo , Stephen S. Drofitz, Jr. , David L. Edwards , Larry D. Gross , Sushumna Iruvanti , Raed A. Sherif , Subhash L. Shinde , David J. Womac , David B. Goland , Lester W. Herron
发明人: Giulio DiGiacomo , Stephen S. Drofitz, Jr. , David L. Edwards , Larry D. Gross , Sushumna Iruvanti , Raed A. Sherif , Subhash L. Shinde , David J. Womac , David B. Goland , Lester W. Herron
IPC分类号: H01L2334
CPC分类号: H01L23/433 , H01L24/83 , H01L25/0655 , H01L2224/16225 , H01L2224/29111 , H01L2224/32245 , H01L2224/73253 , H01L2224/83193 , H01L2224/83801 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/157 , H01L2924/15724 , H01L2924/15788 , H01L2924/16152 , H01L2924/16251 , H01L2924/01014
摘要: A multi-chip module and heat-sink cap assembly and method of fabrication, which provides sufficient cooling for higher power density chips. The heat-sink cap has heat-sink columns disposed over each chip on a substrate. The heat-sink columns are interconnected by flexible members to provide a unitary cover. Thin film metallization of at least a portion of the mating surfaces of the substrate, chips and heat-sink column permits soldering of the cap to the chips and substrate to form the package which is a mechanically stable structure with no degradation of interconnection fatigue life due to thermal cycling of the assembly when in use.
摘要翻译: 一种多芯片模块和散热帽组件及其制造方法,为更高功率密度的芯片提供足够的冷却。 散热器盖具有设置在基板上的每个芯片上的散热柱。 散热柱通过柔性构件相互连接,以提供整体盖。 衬底,芯片和散热柱的配合表面的至少一部分的薄膜金属化允许将帽焊接到芯片和衬底以形成封装,其是机械稳定的结构,而不会降低互连疲劳寿命 在使用时对组件进行热循环。
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公开(公告)号:US4272722A
公开(公告)日:1981-06-09
申请号:US26491
申请日:1979-04-03
IPC分类号: G01R19/00 , G01R19/08 , G01R19/15 , G01R31/302 , H01L21/66
CPC分类号: G01R19/15 , G01R19/0092 , G01R19/08
摘要: A method for determining the paths of current flow in an irregularly shaped conductor. A metal is plated onto a substrate in the desired geometric pattern. The metal is then brought to within about 4 percent of its melting point and a current is put through it. After an amount of time that depends upon the temperature and current utilized, there will have been a mass migration in the metal resulting in a corrugated surface having ridges and valleys that are parallel to the current flow. The ridges and valleys may be observed optically or by scanning electron microscope.
摘要翻译: 一种用于确定不规则形状导体中的电流流动路径的方法。 以期望的几何图案将金属镀在基底上。 然后将金属置于其熔点的约4%内,并通过电流。 在取决于所使用的温度和电流的一段时间之后,在金属中将存在质量迁移,导致波纹表面具有平行于电流的脊和谷。 可以光学地或通过扫描电子显微镜观察脊和谷。
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公开(公告)号:US5990418A
公开(公告)日:1999-11-23
申请号:US902556
申请日:1997-07-29
申请人: Kevin G. Bivona , Jeffrey T. Coffin , Stephen S. Drofitz, Jr. , Lewis S. Goldmann , Mario J. Interrante , Sushumna Iruvanti , Raed A. Sherif
发明人: Kevin G. Bivona , Jeffrey T. Coffin , Stephen S. Drofitz, Jr. , Lewis S. Goldmann , Mario J. Interrante , Sushumna Iruvanti , Raed A. Sherif
CPC分类号: H01L23/562 , H01L23/16 , H01L23/42 , H01L2224/16 , H01L2224/16225 , H01L2224/32245 , H01L2224/73253 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/15311 , H01L2924/16152 , H01L2924/16251
摘要: A device and method for hermetically sealing an integrated circuit chip between a substrate and a lid while providing effective dissipation of heat generated by the integrated circuit chip. The device includes an integrated circuit chip, carrier substrate, interface coolant, and a lid. The integrated circuit chip is attached to the top of the carrier substrate. The interface coolant is disposed on the top of the integrated circuit chip and the lid is placed on top of the carrier substrate/integrated circuit chip combination and contacts the interface coolant. The interface coolant provides a thermal path for conducting heat from the integrated circuit chip to the lid. The substrate is attached to a circuit board by a ceramic ball grid array (CBGA) or a ceramic column grid array (CCGA).
摘要翻译: 一种用于在集成电路芯片产生的热量的有效耗散的同时在衬底和盖子之间气密密封集成电路芯片的装置和方法。 该装置包括集成电路芯片,载体基板,界面冷却剂和盖子。 集成电路芯片附着到载体衬底的顶部。 接口冷却剂设置在集成电路芯片的顶部,并且盖子被放置在载体基板/集成电路芯片组合的顶部上并且接触界面冷却剂。 界面冷却剂提供用于将热量从集成电路芯片传导到盖子的热路径。 衬底通过陶瓷球栅阵列(CBGA)或陶瓷柱栅阵列(CCGA)连接到电路板。
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公开(公告)号:US5881945A
公开(公告)日:1999-03-16
申请号:US846935
申请日:1997-04-30
申请人: David L. Edwards , Armando S. Cammarano , Jeffrey T. Coffin , Mark G. Courtney , Stephen S. Drofitz, Jr. , Michael J. Ellsworth, Jr. , Lewis S. Goldmann , Sushumna Iruvanti , Frank L. Pompeo , William E. Sablinski , Raed A. Sherif , Hilton T. Toy
发明人: David L. Edwards , Armando S. Cammarano , Jeffrey T. Coffin , Mark G. Courtney , Stephen S. Drofitz, Jr. , Michael J. Ellsworth, Jr. , Lewis S. Goldmann , Sushumna Iruvanti , Frank L. Pompeo , William E. Sablinski , Raed A. Sherif , Hilton T. Toy
IPC分类号: B23K35/14 , B23K35/26 , H01L21/50 , H01L21/60 , H01L23/02 , H01L23/10 , B23K31/02 , B23K35/22
CPC分类号: H01L23/10 , H01L21/50 , H01L2224/16 , H01L2224/73253 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/09701 , H01L2924/15312 , H01L2924/16152
摘要: The present invention relates generally to a new scheme of providing a seal band for semi-conductor substrates and chip carriers. More particularly, the invention encompasses a structure and a method that uses a multi-layer metallic seal to provide protection to chips on a chip carrier. This multi-layer metal seal provides both enhanced hermeticity lifetime and environmental protection. For the preferred embodiment the multi-layer metallic seal band is a three layer, solder sandwich structure which is used to create a low cost, high reliability, hermetic seal for the module. This solder sandwich has a high melting temperature thick solder inner core, and lower melting point thin interconnecting solder layers, where the thin interconnecting solder layers may have similar or different melting points.
摘要翻译: 本发明一般涉及为半导体衬底和芯片载体提供密封带的新方案。 更具体地,本发明包括使用多层金属密封件来为芯片载体上的芯片提供保护的结构和方法。 这种多层金属密封提供增强的气密寿命和环境保护。 对于优选实施例,多层金属密封带是用于为模块产生低成本,高可靠性气密密封的三层焊料夹层结构。 该焊料夹层具有较高的熔化温度较厚的焊料内芯和较低熔点的薄互连焊料层,其中薄的互连焊料层可具有相似或不同的熔点。
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