公开(公告)号：US09343672B2

公开(公告)日：2016-05-17

申请号：US13442595

申请日：2012-04-09

Applicant: Chan-Jin Park ,  Sun-Jung Kim ,  Soon-Oh Park ,  Hyun-Su Ju ,  Soo-Doo Chae

Inventor： Chan-Jin Park ,  Sun-Jung Kim ,  Soon-Oh Park ,  Hyun-Su Ju ,  Soo-Doo Chae

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1253 ,  H01L27/2472 ,  H01L27/249 ,  H01L45/04 ,  H01L45/1226 ,  H01L45/146

Abstract: A nonvolatile memory cell includes first and second interlayer insulating films which are separated from each other and are stacked sequentially, a first electrode which penetrates the first interlayer insulating film and the second interlayer insulating film, a resistance change film which is formed along a side surface of the first electrode and extends parallel to the first electrode, and a second electrode which is formed between the first interlayer insulating film and the second interlayer insulating film. The second electrode includes a conductive film which is made of metal and a diffusion preventing film which prevents diffusion of a conductive material contained in the conductive film.

Abstract translation: 非易失性存储单元包括彼此分离并依次堆叠的第一和第二层间绝缘膜，穿过第一层间绝缘膜和第二层间绝缘膜的第一电极，沿着侧表面形成的电阻变化膜 并且平行于第一电极延伸，以及形成在第一层间绝缘膜和第二层间绝缘膜之间的第二电极。 第二电极包括由金属制成的导电膜和防止导电膜中包含的导电材料扩散的防扩散膜。

公开(公告)号：US20110198685A1

公开(公告)日：2011-08-18

申请号：US13095408

申请日：2011-04-27

Applicant: Hyun-Suk Kim ,  Sun-II Shim ,  Chang-Seok Kang ,  Won-Cheol Jeong ,  Jung-Dal Choi ,  Jae-Kwan Park ,  Seung-Hyun Lim ,  Sun-Jung Kim

Inventor： Hyun-Suk Kim ,  Sun-II Shim ,  Chang-Seok Kang ,  Won-Cheol Jeong ,  Jung-Dal Choi ,  Jae-Kwan Park ,  Seung-Hyun Lim ,  Sun-Jung Kim

IPC: H01L29/792

CPC classification number: H01L21/28282 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/7881 ,  H01L29/792

Abstract: Non-volatile memory devices are provided including a control gate electrode on a substrate; a charge storage insulation layer between the control gate electrode and the substrate; a tunnel insulation layer between the charge storage insulation layer and the substrate; a blocking insulation layer between the charge storage insulation layer and the control gate electrode; and a material layer between the tunnel insulation layer and the blocking insulation layer, the material layer having an energy level constituting a bottom of a potential well.

Abstract translation: 提供了非易失性存储器件，其包括在衬底上的控制栅电极; 在控制栅电极和衬底之间的电荷存储绝缘层; 在电荷存储绝缘层和衬底之间的隧道绝缘层; 电荷存储绝缘层和控制栅电极之间的阻挡绝缘层; 以及隧道绝缘层和阻挡绝缘层之间的材料层，材料层具有构成势阱底部的能级。

公开(公告)号：US07820514B2

公开(公告)日：2010-10-26

申请号：US11756427

申请日：2007-05-31

Applicant: Min-kyung Ryu ,  Han-mei Choi ,  Seung-hwan Lee ,  Sun-jung Kim ,  Se-hoon Oh

Inventor： Min-kyung Ryu ,  Han-mei Choi ,  Seung-hwan Lee ,  Sun-jung Kim ,  Se-hoon Oh

IPC: H01L21/336

CPC classification number: H01L29/513 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/28194 ,  H01L21/28282 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78 ,  H01L29/792

Abstract: A method of forming a flash memory device can include forming a tunneling oxide film on a semiconductor substrate, forming a charge storing layer on the tunneling oxide film, forming a first blocking oxide film on the charge storing layer at a first temperature, forming a second blocking oxide film on the first blocking oxide film at a second temperature higher than the first temperature, and forming a gate electrode on the second blocking oxide film.

Abstract translation: 形成闪速存储器件的方法可以包括在半导体衬底上形成隧穿氧化膜，在隧道氧化膜上形成电荷存储层，在第一温度下在电荷存储层上形成第一阻挡氧化膜，形成第二 在高于第一温度的第二温度下在第一阻挡氧化膜上形成阻挡氧化膜，以及在第二阻挡氧化膜上形成栅电极。

公开(公告)号：US07768025B2

公开(公告)日：2010-08-03

申请号：US11898368

申请日：2007-09-11

Applicant: Jun Ho Jang ,  Jae Wan Choi ,  Duk Kyu Bae ,  Hyun Kyong Cho ,  Jong Kook Park ,  Sun Jung Kim ,  Jeong Soo Lee

Inventor： Jun Ho Jang ,  Jae Wan Choi ,  Duk Kyu Bae ,  Hyun Kyong Cho ,  Jong Kook Park ,  Sun Jung Kim ,  Jeong Soo Lee

IPC: H01L33/00

CPC classification number: H01L33/405 ,  H01L33/0075 ,  H01L33/0079 ,  H01L33/04 ,  H01L33/06 ,  H01L33/20 ,  H01L33/22 ,  H01L33/32 ,  H01L33/38 ,  H01L33/40 ,  H01L33/44 ,  H01L2933/0016 ,  H01L2933/0083

Abstract: An LED having vertical topology and a method of making the same is capable of improving a luminous efficiency and reliability, and is also capable of achieving mass productivity. The method includes forming a semiconductor layer on a substrate; forming a first electrode on the semiconductor layer; forming a supporting layer on the first electrode; generating an acoustic stress wave at the interface between the substrate and semiconductor layer, thereby separating the substrate from the semiconductor layer; and forming a second electrode on the semiconductor layer exposed by the separation of the substrate.

公开(公告)号：US07412982B2

公开(公告)日：2008-08-19

申请号：US11240554

申请日：2005-10-03

Applicant: Sun-Jung Kim

Inventor： Sun-Jung Kim

IPC: B08B3/00 ,  B08B3/12 ,  B08B6/00

CPC classification number: H01L21/67051 ,  B08B3/12 ,  Y10S134/902 ,  Y10S438/906

Abstract: A cleaning probe capable of providing uniform cleaning to an entire wafer while not damaging the edge portion of the wafer, and a megasonic cleaning apparatus having the cleaning probe are provided. The cleaning probe comprises a front portion located near the center of the wafer, a rear portion connected to a piezoelectric transducer, and a protrusion located between the rear portion and the front portion, located on an edge portion of the wafer, and having a larger cross section width than the front portion.

Abstract translation: 提供能够在不损坏晶片的边缘部分的同时对整个晶片提供均匀清洁的清洁探针，以及具有清洁探针的兆声波清洗装置。 清洁探针包括位于晶片中心附近的前部，连接到压电换能器的后部，以及位于晶片的边缘部分之间位于后部和前部之间的突起，并且具有较大的 横截面宽度大于前面部分。

公开(公告)号：US06635474B1

公开(公告)日：2003-10-21

申请号：US09582490

申请日：2000-11-14

Applicant: Ook Joon Yoo ,  Kyung Kwang Lee ,  Young Mahn Han ,  Sun Jung Kim ,  Hae Young Jeong ,  Jung Ho Ko ,  Won Jun Oh

Inventor： Ook Joon Yoo ,  Kyung Kwang Lee ,  Young Mahn Han ,  Sun Jung Kim ,  Hae Young Jeong ,  Jung Ho Ko ,  Won Jun Oh

IPC: C12N1563

CPC classification number: A01K67/0275 ,  A01K2217/05 ,  A01K2227/105 ,  A01K2267/01 ,  C07K14/4732 ,  C07K14/535 ,  C12N15/63 ,  C12N15/85 ,  C12N15/8509 ,  C12N2830/008 ,  C12N2830/42 ,  C12N2830/85

Abstract: There are disclosed mammary gland tissue-specific expression systems using the promoter site for the &bgr;-casein gene of Korean native goats, by use of which physiological activating substances can be produced. In each of the expression systems, that is, novel plasmids pGbc, pGbc_L and pGbc_S (deposition Nos. KCTC 0515BP, 0514BP and 0513BP, respectively), a &bgr;-casein gene expression-regulating region, a physiological activating substance gene and a termination-regulating region are linked. Human granulocyte colony stimulating factor (hG-CSF) or human granulocyte macrophage colony stimulating factor (hGM-CSF) can be produced in HC11 cells, a mouse mammary gland tissue-derived cell line, and in the milk secreted from the transgenic mice by use of a hG-CSF or hGM-CSF gene-carrying pGbc, pGbc_L or pGbc_S in transfection into cell and microinjection to mouse. The proteins are those which experience the posttranslational modification and maintain their normal activity in the human body. The expression systems make it possible to easily produce the proteins at a great amount, to scale up protein production to the extent of industrialization, and to isolate and purify the desired protein with ease and safety.

Abstract translation: 已经公开了使用韩国本地山羊的β-酪蛋白基因的启动子位点的乳腺组织特异性表达系统，通过使用可以产生生理活化物质。 在每个表达系统中，即新型质粒pGbc，pGbc_L和pGbc_S（分别为沉积编号KCTC 0515BP，0514BP和0513BP），β-酪蛋白基因表达调节区，生理活化物质基因和终止 - 调节区域相连。 人类粒细胞集落刺激因子（hG-CSF）或人粒细胞巨噬细胞集落刺激因子（hGM-CSF）可以在HC11细胞，小鼠乳腺组织来源的细胞系和转基因小鼠分泌的乳中产生 的hG-CSF或携带hGM-CSF基因的pGbc，pGbc_L或pGbc_S转染入细胞和显微注射到小鼠。 蛋白质是经历翻译后修饰并维持其在人体中的正常活性的蛋白质。 表达系统使得可以容易地大量生产蛋白质，将蛋白质生产扩大到工业化程度，并且容易且安全地分离和纯化所需的蛋白质。

公开(公告)号：US09818824B2

公开(公告)日：2017-11-14

申请号：US14968049

申请日：2015-12-14

Applicant: Moon Seung Yang ,  Eun Hye Choi ,  Sun Jung Kim ,  Seung Hun Lee ,  Hyun-Jung Lee

Inventor： Moon Seung Yang ,  Eun Hye Choi ,  Sun Jung Kim ,  Seung Hun Lee ,  Hyun-Jung Lee

IPC: H01L29/161 ,  H01L29/10 ,  H01L29/78 ,  H01L21/02

CPC classification number: H01L29/1054 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/02532 ,  H01L29/161 ,  H01L29/78 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor substrate and a semiconductor device are provided. The semiconductor substrate includes a base substrate, a first silicon germanium layer on the base substrate and a second silicon germanium layer on the first silicon germanium layer. A germanium fraction of the second silicon germanium layer decreases in the direction away from the base substrate, and a germanium fraction of a lowermost part of the second silicon germanium layer is greater than a germanium fraction of an uppermost part of the first silicon germanium layer.

公开(公告)号：US09462199B2

公开(公告)日：2016-10-04

申请号：US14051999

申请日：2013-10-11

Applicant: Sun Jung Kim ,  Kwang Hyun Lee ,  Seung Hoon Lee ,  Ju Hwan Jung ,  Young Gu Jin

Inventor： Sun Jung Kim ,  Kwang Hyun Lee ,  Seung Hoon Lee ,  Ju Hwan Jung ,  Young Gu Jin

IPC: H04N5/335 ,  H04N5/357 ,  H04N5/378

CPC classification number: H04N5/335 ,  H04N5/357 ,  H04N5/378

Abstract: A method of operating an image sensor includes: generating a pixel signal according to intensity of incident light; and generating a digital pixel signal based on a comparison between the pixel signal and at least one reference current. Accordingly, a current output from a 1T pixel in the image sensor is sensed such that the influence of noise is reduced and a pixel signal is sensed more precisely.

Abstract translation: 操作图像传感器的方法包括：根据入射光的强度产生像素信号; 以及基于像素信号和至少一个参考电流之间的比较产生数字像素信号。 因此，感测图像传感器中的1T像素的电流输出，使得噪声的影响减小，并且更精确地感测像素信号。

公开(公告)号：US08884262B2

公开(公告)日：2014-11-11

申请号：US13487570

申请日：2012-06-04

Applicant: Hyun-Su Ju ,  Sun-Jung Kim ,  Soo-Doo Chae

Inventor： Hyun-Su Ju ,  Sun-Jung Kim ,  Soo-Doo Chae

IPC: H01L29/06 ,  H01L27/24 ,  H01L45/00

CPC classification number: H01L27/249 ,  H01L45/04 ,  H01L45/1226 ,  H01L45/146

Abstract: A non-volatile memory device is provided wherein a lower molding layer is formed on a substrate; a first horizontal interconnection is formed on the lower molding layer; an upper molding layer is formed on the first horizontal interconnection; a pillar is formed connected to the substrate by vertically passing through the upper molding layer, the first horizontal interconnection and the lower molding layer. The pillar has a lower part and an upper part, wherein the lower part is disposed on the same level as the first horizontal interconnection and has a first width and the upper part is disposed on a higher level than the first horizontal interconnection and has a second width different from the first width.

Abstract translation: 提供了一种非易失性存储器件，其中在基底上形成下模制层; 在下模制层上形成第一水平互连; 上模塑层形成在第一水平互连上; 通过垂直地穿过上模制层，第一水平互连和下模制层而形成连接到基板的支柱。 所述支柱具有下部和上部，其中所述下部设置在与所述第一水平互连相同的高度上并具有第一宽度，并且所述上部设置在比所述第一水平互连更高的高度上，并且具有第二 宽度与第一宽度不同。

公开(公告)号：US20120305877A1

公开(公告)日：2012-12-06

申请号：US13487570

申请日：2012-06-04

Applicant: Hyun-Su Ju ,  Sun-Jung Kim ,  Soo-Doo Chae

Inventor： Hyun-Su Ju ,  Sun-Jung Kim ,  Soo-Doo Chae

IPC: H01L47/00

CPC classification number: H01L27/249 ,  H01L45/04 ,  H01L45/1226 ,  H01L45/146

Abstract: A non-volatile memory device is provided wherein a lower molding layer is formed on a substrate; a first horizontal interconnection is formed on the lower molding layer; an upper molding layer is formed on the first horizontal interconnection; a pillar is formed connected to the substrate by vertically passing through the upper molding layer, the first horizontal interconnection and the lower molding layer. The pillar has a lower part and an upper part, wherein the lower part is disposed on the same level as the first horizontal interconnection and has a first width and the upper part is disposed on a higher level than the first horizontal interconnection and has a second width different from the first width.

Abstract translation: 提供了一种非易失性存储器件，其中在基底上形成下模制层; 在下模制层上形成第一水平互连; 上模塑层形成在第一水平互连上; 通过垂直地穿过上模制层，第一水平互连和下模制层而形成连接到基板的支柱。 支柱具有下部和上部，其中下部设置在与第一水平互连相同的高度上并具有第一宽度，并且上部设置在比第一水平互连更高的高度上，并且具有第二 宽度与第一宽度不同。