公开(公告)号：US20120068161A1

公开(公告)日：2012-03-22

申请号：US13233553

申请日：2011-09-15

申请人： Keon-Jae LEE ,  In-Sung Choi ,  Sung-Yool Choi ,  Byung-Hee Hong

发明人： Keon-Jae LEE ,  In-Sung Choi ,  Sung-Yool Choi ,  Byung-Hee Hong

IPC分类号： H01L29/66 ,  B01J19/12 ,  H01L21/268 ,  B82Y40/00 ,  B82Y30/00

CPC分类号： B82Y30/00 ,  B82Y40/00 ,  C01B32/184 ,  C01B32/188 ,  H01L21/268

摘要： A method for forming graphene includes introducing a substrate and a carbon-containing reactant source into a chamber, and radiating a laser beam onto the substrate to decompose the carbon-containing reactant source and form graphene over the substrate using carbon atoms generated by decomposition of the carbon-containing reactant source. A carbon-containing gas (methane) decomposes upon radiation of a laser beam. The carbon-containing gas has a decomposition rate on the order of femtoseconds and the laser beam has a pulse on the order of nanoseconds or more. The graphene is grown in a single layer along the surface of the substrate. Then, the graphene is selectively patterned using a laser beam to form a desired pattern.

摘要翻译： 用于形成石墨烯的方法包括将基底和含碳反应物源引入室中，并且将激光束辐射到基底上以分解含碳反应物源，并使用由分解产生的碳原子在基底上形成石墨烯 含碳反应物源。 含碳气体（甲烷）在激光束的辐射下分解。 含碳气体具有飞秒级的分解率，激光束具有大约数毫安以上的脉冲。 石墨烯沿着衬底的表面生长在单层中。 然后，使用激光束选择性地图案化石墨烯以形成期望的图案。

公开(公告)号：US07960774B2

公开(公告)日：2011-06-14

申请号：US11607500

申请日：2006-12-01

申请人： Sung-Yool Choi ,  Min Ki Ryu ,  Ansoon Kim ,  Chil Seong Ah ,  Han Young Yu

发明人： Sung-Yool Choi ,  Min Ki Ryu ,  Ansoon Kim ,  Chil Seong Ah ,  Han Young Yu

IPC分类号： H01L29/94

CPC分类号： H01G7/06 ,  H01L21/02175 ,  H01L21/02197 ,  H01L21/022 ,  H01L21/28282 ,  H01L21/28291 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/31691 ,  H01L28/56

摘要： A memory device including a dielectric thin film having a plurality of dielectric layers and a method of manufacturing the same are provided. The memory device includes: a bottom electrode; at least one dielectric thin film disposed on the bottom electrode and having a plurality of dielectric layers with different charge trap densities from each other; and an top electrode disposed on the dielectric thin film. Therefore, a memory device, which can be readily manufactured by a simple process and can be highly integrated using its simple structure, can be provided.

摘要翻译： 提供了包括具有多个电介质层的电介质薄膜及其制造方法的存储器件。 存储器件包括：底部电极; 至少一个电介质薄膜，其设置在所述底部电极上并且具有彼此具有不同电荷陷阱密度的多个电介质层; 以及设置在电介质薄膜上的顶部电极。 因此，可以提供可以容易地通过简单的过程制造并且可以使用其简单的结构高度集成的存储器件。

公开(公告)号：US07537883B2

公开(公告)日：2009-05-26

申请号：US11447820

申请日：2006-06-06

申请人： Han Young Yu ,  In Bok Baek ,  Chang Geun Ahn ,  Ki Ju Im ,  Jong Heon Yang ,  Ung Hwan Pi ,  Min Ki Ryu ,  Chan Woo Park ,  Sung Yool Choi ,  Seong Jae Lee

发明人： Han Young Yu ,  In Bok Baek ,  Chang Geun Ahn ,  Ki Ju Im ,  Jong Heon Yang ,  Ung Hwan Pi ,  Min Ki Ryu ,  Chan Woo Park ,  Sung Yool Choi ,  Seong Jae Lee

IPC分类号： G03F7/00 ,  H01L51/40 ,  C25D5/18

CPC分类号： H01L51/105 ,  B82Y10/00 ,  H01L51/0023 ,  H01L51/0595

摘要： Provided is a method of manufacturing a nano size-gap electrode device. The method includes the steps of: disposing a floated nano structure on a semiconductor layer; forming a mask layer having at least one opening pattern to intersect the nano structure; and depositing a metal on the semiconductor layer exposed through the opening pattern to form an electrode, such that a nano size-gap is provided under the nano structure by the nano structure.

摘要翻译： 提供一种制造纳米尺寸间隙电极器件的方法。 该方法包括以下步骤：在半导体层上设置漂浮的纳米结构; 形成具有至少一个开口图案以与纳米结构相交的掩模层; 以及在通过所述开口图案暴露的所述半导体层上沉积金属以形成电极，使得通过所述纳米结构在所述纳米结构下方提供纳米尺寸间隙。

公开(公告)号：US20070126001A1

公开(公告)日：2007-06-07

申请号：US11497057

申请日：2006-08-01

申请人： Sung-Yool Choi ,  Min Ki Ryu ,  Ansoon Kim ,  Chil Seong Ah ,  Han Young Yu

发明人： Sung-Yool Choi ,  Min Ki Ryu ,  Ansoon Kim ,  Chil Seong Ah ,  Han Young Yu

IPC分类号： H01L29/08

CPC分类号： G11C13/00 ,  B82Y10/00 ,  G11C13/0014 ,  H01L51/0075

摘要： An organic semiconductor device and a method of fabricating the same are provided. The device includes: a first electrode; an electron channel layer formed on the first electrode; and a second electrode formed on the electron channel layer, wherein the electron channel layer comprises: a lower organic layer formed on the first electrode; a nano-particle layer formed on the lower organic layer and including predetermined sizes of nano-particles that are spaced a predetermined distance apart from each other; and an upper organic layer formed over the nano-particle layer. Accordingly, a highly integrated organic semiconductor device can be fabricated by a simple fabrication process, and nonuniformity of devices due to threshold voltage characteristics and downsizing of the device can resolved, so that a semiconductor device having excellent performance can be implemented.

摘要翻译： 提供一种有机半导体器件及其制造方法。 该装置包括：第一电极; 形成在第一电极上的电子通道层; 以及形成在所述电子通道层上的第二电极，其中所述电子通道层包括：形成在所述第一电极上的下部有机层; 形成在下部有机层上并且包括彼此间隔开预定距离的预定尺寸的纳米颗粒的纳米颗粒层; 和在纳米颗粒层上形成的上部有机层。 因此，可以通过简单的制造工艺制造高度集成的有机半导体器件，并且可以解决由于阈值电压特性而导致的器件的不均匀性和器件的小型化，从而可以实现具有优异性能的半导体器件。

公开(公告)号：US20060102889A1

公开(公告)日：2006-05-18

申请号：US11135285

申请日：2005-05-24

申请人： Chan Woo Park ,  Sung Yool Choi ,  Han Young Yu ,  Ung Hwan Pi

发明人： Chan Woo Park ,  Sung Yool Choi ,  Han Young Yu ,  Ung Hwan Pi

IPC分类号： H01L29/06

CPC分类号： B82Y10/00 ,  H01L51/0545 ,  H01L51/0595 ,  Y10S977/936 ,  Y10S977/937 ,  Y10S977/938

摘要： Provided is a tri-gated molecular field effect transistor (FET) and a method of fabricating the same. The tri-gated molecular field effect transistor includes a gate electrode formed on a substrate and having grooves in a source region, a drain region and a channel region, and at least one molecule inserted between the source and drain electrodes in the channel region. The effects of the gate voltage on electrons passing through the channel can be maximized, and a variation gain of current supplied between the source and drain electrodes relative to the gate voltage can be greatly increased. Thus, a molecular electronic circuit having high functionality and reliability can be obtained.

摘要翻译： 提供三门分子场效应晶体管（FET）及其制造方法。 三门分子场效应晶体管包括形成在衬底上的栅电极，在源极区，漏区和沟道区中具有沟槽，以及在沟道区中插入在源极和漏极之间的至少一个分子。 可以使栅极电压对通过沟道的电子的影响最大化，并且可以大大提高源极和漏极之间相对于栅极电压提供的电流的变化增益。 因此，可以获得具有高功能性和可靠性的分子电子电路。

公开(公告)号：US06648712B2

公开(公告)日：2003-11-18

申请号：US10263580

申请日：2002-10-02

申请人： Sung-Yool Choi ,  Mun-Cheol Paek ,  Kyoung-Ik Cho ,  Jeen Hur ,  Gi-Pyung Han

发明人： Sung-Yool Choi ,  Mun-Cheol Paek ,  Kyoung-Ik Cho ,  Jeen Hur ,  Gi-Pyung Han

IPC分类号： H01J904

CPC分类号： H01J3/022 ,  H01J31/127

摘要： A triode-type field emission device includes an insulating substrate; a cathode formed on the insulating substrate; a field emitter aligned on the cathode, wherein the field emitter includes a plurality of emitter tips and each emitter tip has the diameter of nanometers; an insulating layer positioned around the field emitter for electrically isolating the field emitter; and a gate electrode formed on the insulating layer, wherein the gate electrode is closed to an upper portion of the field emitter. Therefore, the triode-type field emission device may be operable in a low voltage.

公开(公告)号：US20130041434A1

公开(公告)日：2013-02-14

申请号：US13571309

申请日：2012-08-09

申请人： Doo Hyeb YOUN ,  Sung-Yool Choi ,  HongKyw Choi ,  Jongyun Kim

发明人： Doo Hyeb YOUN ,  Sung-Yool Choi ,  HongKyw Choi ,  Jongyun Kim

IPC分类号： A61N5/06

CPC分类号： A61N5/0625 ,  A61N2005/0645 ,  A61N2005/0652 ,  A61N2005/0659 ,  A61N2005/0661 ,  A61N2005/0662

摘要： A pad for thermotherapy includes: a stretchable and flexible substrate; an electrode pattern positioned over the stretchable and flexible substrate, and including a plurality of light source electrodes and a linear electrode connecting the light source electrodes; light sources positioned over the electrode pattern; and a power supply unit for supplying power to the light source, wherein the linear electrode is formed longer than intervals between neighboring light source electrodes and separated from the substrate.

摘要翻译： 用于热疗的垫包括：可拉伸和柔性基底; 电极图案，其位于所述伸缩性柔性基板上方，并且包括多个光源电极和连接所述光源电极的线状电极; 位于电极图案上的光源; 以及用于向光源供电的电源单元，其中所述线性电极形成得比相邻光源电极之间的间隔长并且与所述衬底分离。

公开(公告)号：US08344344B2

公开(公告)日：2013-01-01

申请号：US12773228

申请日：2010-05-04

申请人： Sung-Yool Choi

发明人： Sung-Yool Choi

IPC分类号： H01L29/72

CPC分类号： H01L45/00 ,  H01L27/24

摘要： Provided are resistive memory devices and methods of fabricating the same. The resistive memory devices and the methods are advantageous for high integration because they can provide a multilayer memory cell structure. Also, the parallel conductive lines of adjacent layers do not overlap each other in the vertical direction, thus reducing errors in program/erase operations.

公开(公告)号：US20110212612A1

公开(公告)日：2011-09-01

申请号：US13101556

申请日：2011-05-05

申请人： Sung-Yool CHOI ,  Min Ki RYU ,  Ansoon KIM ,  Chil Seong AH ,  Han Young YU

发明人： Sung-Yool CHOI ,  Min Ki RYU ,  Ansoon KIM ,  Chil Seong AH ,  Han Young YU

IPC分类号： H01L21/28

CPC分类号： H01G7/06 ,  H01L21/02175 ,  H01L21/02197 ,  H01L21/022 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/31691 ,  H01L28/56 ,  H01L29/40111 ,  H01L29/40117

摘要： A memory device including a dielectric thin film having a plurality of dielectric layers and a method of manufacturing the same are provided. The memory device includes: a bottom electrode; at least one dielectric thin film disposed on the bottom electrode and having a plurality of dielectric layers with different charge trap densities from each other; and an top electrode disposed on the dielectric thin film. Therefore, a memory device, which can be readily manufactured by a simple process and can be highly integrated using its simple structure, can be provided.

摘要翻译： 提供了包括具有多个电介质层的电介质薄膜及其制造方法的存储器件。 存储器件包括：底部电极; 至少一个电介质薄膜，其设置在所述底部电极上并且具有彼此具有不同电荷陷阱密度的多个电介质层; 以及设置在电介质薄膜上的顶部电极。 因此，可以提供可以容易地通过简单的过程制造并且可以使用其简单的结构高度集成的存储器件。

公开(公告)号：US20110133148A1

公开(公告)日：2011-06-09

申请号：US12773228

申请日：2010-05-04

申请人： Sung-Yool CHOI

发明人： Sung-Yool CHOI

IPC分类号： H01L45/00 ,  H01L21/16

CPC分类号： H01L45/00 ,  H01L27/24

摘要： Provided are resistive memory devices and methods of fabricating the same. The resistive memory devices and the methods are advantageous for high integration because they can provide a multilayer memory cell structure. Also, the parallel conductive lines of adjacent layers do not overlap each other in the vertical direction, thus reducing errors in program/erase operations.

摘要翻译： 提供了电阻式存储器件及其制造方法。 电阻存储器件和方法对于高集成是有利的，因为它们可以提供多层存储器单元结构。 此外，相邻层的平行导线在垂直方向上彼此不重叠，从而减少了编程/擦除操作中的错误。