公开(公告)号：US5243202A

公开(公告)日：1993-09-07

申请号：US4641

申请日：1993-01-12

申请人： Hisatoshi Mori ,  Syunichi Sato ,  Naohiro Konya ,  Ichiro Ohno ,  Hiromitsu Ishii ,  Kunihiro Matsuda

发明人： Hisatoshi Mori ,  Syunichi Sato ,  Naohiro Konya ,  Ichiro Ohno ,  Hiromitsu Ishii ,  Kunihiro Matsuda

IPC分类号： H01L21/316 ,  H01L21/318 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L29/49 ,  H01L29/786

CPC分类号： H01L21/0217 ,  H01L21/02164 ,  H01L21/02183 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02266 ,  H01L21/02274 ,  H01L21/31612 ,  H01L21/3185 ,  H01L27/1214 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78663

摘要： A thin-film transistor comprises a gate electrode formed on a glass substrate, a gate insulating film formed essentially over an entire surface of the substrate to cover the gate electrode, a non-single-crystal silicon semiconductor film placed on the gate insulating film to cover the gate electrode; and a drain electrode and a source electrode spaced a specified distance apart on the semiconductor film and electrically connected to the semiconductor film so as to form the channel region of the transistor. The gate electrode is made of titanium-containing aluminum.

摘要翻译： 薄膜晶体管包括形成在玻璃基板上的栅极电极，基本上在基板的整个表面上形成以覆盖栅电极的栅极绝缘膜，将栅极绝缘膜上的非单晶硅半导体膜， 覆盖栅电极; 以及在半导体膜上间隔规定距离并与半导体膜电连接的漏电极和源电极，以形成晶体管的沟道区。 栅电极由含钛的铝制成。

公开(公告)号：US5166085A

公开(公告)日：1992-11-24

申请号：US503269

申请日：1990-04-02

申请人： Haruo Wakai ,  Nobuyuki Yamamura ,  Syunichi Sato ,  Minoru Kanbara

发明人： Haruo Wakai ,  Nobuyuki Yamamura ,  Syunichi Sato ,  Minoru Kanbara

IPC分类号： G02F1/1333 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/786

CPC分类号： H01L29/78696 ,  G02F1/1368 ,  H01L27/12 ,  G02F1/136227 ,  G02F2001/133357

摘要： First, a gate metal layer, a gate insulating film, a semiconductor layer, an n-type semiconductor layer, and an ohmic metal layer formed on a substrate in the order mentioned. Then, the film and the layers are patterned into those having the same shape and size. Next, a source metal layer and a drain metal layer are formed on the ohmic metal layer. Further, a portion of the ohmic metal layer, a portion of said source metal layer, and a portion of said drain metal layer are etched, thereby forming a channel portion. Finally, a transparent electrode is formed on the source metal layer, thus manufacturing a TFT. Since the film and the layer, the major components of the TFT, are sequentially formed, and are patterned simultaneously, the TFT can be manufacture with high yield. Further, since the transparent electrode is formed on the uppermost layer, i.e., the source metal layer, the pixel has a great opening ratio.

摘要翻译： 首先，按照上述顺序在基板上形成栅极金属层，栅极绝缘膜，半导体层，n型半导体层和欧姆金属层。 然后，将膜和层图案化成具有相同形状和尺寸的那些。 接着，在欧姆金属层上形成源极金属层和漏极金属层。 此外，欧姆金属层的一部分，所述源极金属层的一部分和所述漏极金属层的一部分被蚀刻，从而形成沟道部分。 最后，在源极金属层上形成透明电极，制造TFT。 由于TFT和TFT的主要部分依次形成，并且被图案化，TFT可以高产率制造。 此外，由于透明电极形成在最上层即源极金属层上，所以像素具有大的开口率。

公开(公告)号：US5327001A

公开(公告)日：1994-07-05

申请号：US41537

申请日：1993-04-01

申请人： Haruo Wakai ,  Nobuyuki Yamamura ,  Syunichi Sato ,  Minoru Kanbara

发明人： Haruo Wakai ,  Nobuyuki Yamamura ,  Syunichi Sato ,  Minoru Kanbara

IPC分类号： G02F1/1362 ,  H01L27/01 ,  H01L27/13 ,  H01L29/78

CPC分类号： G02F1/136209 ,  G02F1/136227

摘要： A TFT array has a plurality of gate lines and a plurality of drain lines formed on a transparent insulating substrate. The gate lines intersect with the drain lines. TFTs are formed at the intersections of the gate lines and the drain lines. An opaque film is formed above the gate lines, the drain lines, and the TFTs, allowing no passage of light passing through the gaps between the transparent electrode, on the one hand, and the gate and drain lines, on the other hand. Therefore, when the TFT array is incorporated into a liquid-crystal display, the display will display high-contrast images.

摘要翻译： TFT阵列具有形成在透明绝缘基板上的多条栅极线和多条漏极线。 栅极线与漏极线相交。 TFT形成在栅极线和漏极线的交点处。 另一方面，在栅极线，漏极线和TFT的上方形成不透明的膜，从而允许一方面透过透明电极与栅极和漏极线之间的间隙的光通过。 因此，当TFT阵列结合到液晶显示器中时，显示器将显示高对比度图像。

公开(公告)号：US5284789A

公开(公告)日：1994-02-08

申请号：US690816

申请日：1991-04-23

申请人： Hisatoshi Mori ,  Syunichi Sato ,  Naohiro Konya

发明人： Hisatoshi Mori ,  Syunichi Sato ,  Naohiro Konya

IPC分类号： H01L21/316 ,  H01L21/318 ,  H01L21/336 ,  H01L21/84 ,  H01L21/00 ,  H01L21/02 ,  H01L21/326

CPC分类号： H01L29/66757 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/31612 ,  H01L21/3185 ,  H01L21/84 ,  H01L29/66765

摘要： Method of forming a thin film consisting of a silicon-based material includes a first step of setting a substrate subjected to formation of a thin insulating film consisting of the silicon-based material in a chamber having high-frequency electrodes for receiving a high-frequency power while the substrate is kept heated at a predetermined temperature, a second step of supplying a process gas to the chamber, a third step of applying a high-frequency power to the high-frequency electrodes to generate a plasma, a fourth step of depositing an insulator consisting of the silicon-based material on the substrate to a predetermined thickness while gas supply in the second step and supply of the high-frequency power in the third step are kept maintained, and a fifth step of cooling the substrate on which the insulating film is formed and unloading the substrate from the chamber. In the fourth step, the substrate is kept heated within the temperature range of 230.degree. C. to 270.degree. C., and the high-frequency power is controlled to be supplied so that an RF discharge power density falls within the range of 60 to 100 mW/cm.sup.2.

摘要翻译： 形成由硅系材料构成的薄膜的方法包括：将具有由硅系材料构成的薄绝缘膜的基板设定在具有高频电极的室内的第一工序， 在将衬底保持加热到预定温度的第二步骤中，向腔室供给处理气体的第二步骤，向高频电极施加高频电力以产生等离子体的第三步骤;第四步骤： 在基板上由硅基材料构成的预定厚度的绝缘体保持在第二步骤中的供气和第三步骤中的高频电力的供应，第五步骤是将基板上的 形成绝缘膜并从腔室卸载基板。 在第四步骤中，将衬底在230℃至270℃的温度范围内保持加热，并且控制高频功率以使RF放电功率密度落在60至 100 mW / cm2。

公开(公告)号：US5084905A

公开(公告)日：1992-01-28

申请号：US415889

申请日：1989-10-02

申请人： Makoto Sasaki ,  Syunichi Sato ,  Hisatoshi Mori

发明人： Makoto Sasaki ,  Syunichi Sato ,  Hisatoshi Mori

IPC分类号： G02F1/1343 ,  G02F1/1362 ,  H01L27/12

CPC分类号： G02F1/136227 ,  H01L27/12 ,  G02F1/13439

摘要： A thin film transistor panel has a substrate on which a plurality of electrode lines are aligned in a matrix form, thin film transistors which are formed on crossing portions of the plurality of the electrode lines, a diffusible insulating film for covering said thin film transistors, and metal-diffused layers and are connected to source electrodes. The metal-diffused layers are formed by diffusing a metal into predetermined areas of said insulating film. If the metal-diffused layers are used as the pixel electrodes, high density display can be obtained due to the fine pixel electrodes. In addition, a manufacturing method of thin film transistor panel having the steps of forming gate electrode on a substrate, forming gate insulating films on the gate electrodes, forming semiconductor layers on said gate insulating films, forming source and drain electrodes on said semiconductor layers except for channel portions, forming a diffusible insulating film which covers the whole surface of the substrate, providing contact holes in said insulating film corresponding to said source electrodes, and forming metal-diffused layers by diffusing a metal into the insulating film and inner surfaces of said contact holes. The metal-diffused areas can be formed in high pattern accuracy, and the fine pixel electrodes can be easily obtained if the metal-diffused areas are used as the pixel electrodes.

摘要翻译： 薄膜晶体管面板具有多个电极线以矩阵形式排列的基板，形成在多条电极线的交叉部分上的薄膜晶体管，用于覆盖所述薄膜晶体管的可扩散绝缘膜， 和金属扩散层，并连接到源电极。 金属扩散层通过将金属扩散到所述绝缘膜的预定区域中而形成。 如果使用金属扩散层作为像素电极，则由于精细的像素电极，可以获得高密度显示。 另外，薄膜晶体管面板的制造方法具有如下步骤：在基板上形成栅电极，在栅电极上形成栅极绝缘膜，在所述栅极绝缘膜上形成半导体层，在所述半导体层上形成源极和漏极，除了 对于沟道部分，形成覆盖基板的整个表面的可扩散绝缘膜，在与所述源电极相对应的所述绝缘膜中提供接触孔，并且通过将金属扩散到所述绝缘膜和所述绝缘膜的内表面中而形成金属扩散层 接触孔 金属扩散区域可以以高图案精度形成，并且如果使用金属扩散区域作为像素电极，则可以容易地获得精细像素电极。

公开(公告)号：US5519521A

公开(公告)日：1996-05-21

申请号：US63007

申请日：1993-05-17

申请人： Hiroyuki Okimoto ,  Syunichi Sato

发明人： Hiroyuki Okimoto ,  Syunichi Sato

IPC分类号： G02F1/133 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  G09G3/36

CPC分类号： G02F1/1368 ,  G09G3/3655 ,  G02F2001/13625 ,  G02F2201/122

摘要： A liquid crystal display device comprises a first substrate on which a plurality of thin-film transistors, a plurality of pixel electrodes respectively connected to the thin-film transistors, a plurality of gate lines for connecting gate electrodes of the thin-film transistors, and a plurality of drain lines for connecting drain electrodes of the thin-film transistors are arranged in a matrix pattern, a second substrate on which a plurality of divisional common electrodes which face the plurality of pixel electrodes are formed, and a liquid crystal material encapsulated by the first and second substrates and a sealing member, and interposed between the plurality of pixel electrodes and the plurality of divisional common electrodes. The matrix pattern on the first substrate is formed by a photolithograpy process comprising a step of divisionally exposing photoresist in a plurality of divisional regions by using a stepper. The plurality of divisional common electrodes have sizes corresponding to the divisional regions divisionally exposed by the stepper and are separated from one another.

摘要翻译： 液晶显示装置包括第一基板，多个薄膜晶体管，分别连接到薄膜晶体管的多个像素电极，用于连接薄膜晶体管的栅电极的多条栅极线，以及 用于连接薄膜晶体管的漏极的多个漏极线布置成矩阵图案，其上形成有面对多个像素电极的多个分开的公共电极的第二基板和由 第一和第二基板和密封构件，并且插入在多个像素电极和多个分割公共电极之间。 第一基板上的矩阵图案通过光刻工艺形成，该光刻工艺包括通过使用步进器在多个分区中分开曝光光致抗蚀剂的步骤。 多个分开的公共电极具有对应于由步进器分开地分开并且彼此分离的分割区域的尺寸。

公开(公告)号：US5367179A

公开(公告)日：1994-11-22

申请号：US975282

申请日：1992-11-12

申请人： Hisatoshi Mori ,  Syunichi Sato ,  Naohiro Konya ,  Ichiro Ohno ,  Hiromitsu Ishii ,  Kunihiro Matsuda ,  Junji Shiota

发明人： Hisatoshi Mori ,  Syunichi Sato ,  Naohiro Konya ,  Ichiro Ohno ,  Hiromitsu Ishii ,  Kunihiro Matsuda ,  Junji Shiota

IPC分类号： H01L21/316 ,  H01L21/318 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L29/49 ,  H01L29/786 ,  H01L23/48

CPC分类号： H01L21/0217 ,  H01L21/02274 ,  H01L21/31612 ,  H01L21/3185 ,  H01L27/1214 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78663

摘要： A thin-film transistor comprises a gate electrode formed on an insulating substrate, a gate insulating film covering the gate electrode and the insulating substrate, an i-type semiconductor layer formed on the gate insulating film, and a source electrode and a drain electrode electrically connected to two ends of the i-type semiconductor layer, respectively. The gate electrode is made of aluminum alloy containing high-melting-point metal such as Ti and Ta and oxygen or nitrogen or both.

摘要翻译： 薄膜晶体管包括形成在绝缘基板上的栅极电极，覆盖栅极电极和绝缘基板的栅极绝缘膜，形成在栅极绝缘膜上的i型半导体层，以及电极和漏极电极 分别连接到i型半导体层的两端。 栅电极由含有Ti和Ta等高熔点金属和氧或氮的铝合金构成。

公开(公告)号：US5032883A

公开(公告)日：1991-07-16

申请号：US241304

申请日：1988-09-07

申请人： Haruo Wakai ,  Nobuyuki Yamamura ,  Syunichi Sato ,  Minoru Kanbara

发明人： Haruo Wakai ,  Nobuyuki Yamamura ,  Syunichi Sato ,  Minoru Kanbara

IPC分类号： G02F1/1333 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/786

CPC分类号： H01L29/78696 ,  H01L27/12 ,  H01L29/41733 ,  G02F1/136209 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2001/133357 ,  G02F2001/13606

摘要： A TFT of the present invention includes a transparent insulative substrate, a gate electrode formed on the substrate, a gate insulating film formed on at least the gate electrode, a semiconductor film formed at a position on the gate insulating film corresponding to the gate electrode, source and drain electrodes arranged on the semiconductor film so as to form a channel portion, a transparent insulating film covering the source and drain electrodes and the semiconductor film, and a transparent electrode connected to the source electrode. A through hole is formed in the transparent insulating film above the source electrode. The transparent electrode is formed on a portion of the transparent insulating film except for a portion above the channel portion on the semiconductor film.

摘要翻译： 本发明的TFT包括透明绝缘基板，形成在基板上的栅电极，至少形成在栅电极上的栅极绝缘膜，形成在对应于栅电极的栅极绝缘膜上的位置处的半导体膜， 排列在半导体膜上的源极和漏极，以形成沟道部分，覆盖源电极和漏极以及半导体膜的透明绝缘膜，以及连接到源电极的透明电极。 在源极上方的透明绝缘膜上形成有通孔。 透明电极形成在透明绝缘膜的除了半导体膜上的沟道部分之上的部分之外。

公开(公告)号：US06506988B2

公开(公告)日：2003-01-14

申请号：US09801810

申请日：2001-03-09

申请人： Syunichi Sato ,  Tsutomu Watada

发明人： Syunichi Sato ,  Tsutomu Watada

IPC分类号： H01H906

CPC分类号： F16H59/105

摘要： An inhibitor switch is disclosed, including a permanent magnet and a magnetic sensor which detects a magnetic force of the permanent magnet in a non-contacting state and outputs a linear change in a voltage value in response to a change in a relative position between the permanent magnet and the magnetic sensor. One of the permanent magnet and the magnetic sensor is mounted on a manual valve shaft side for changing over change gear range positions of an automatic transmission by operating a manual valve of the automatic transmission in an interlocking manner with the manual valve shaft. The other one of the permanent magnet and the magnetic sensor is mounted on a transmission case side of the automatic transmission. The change gear range position of the automatic transmission is detectable in response to an output of the voltage value corresponding to the change gear range position.

摘要翻译： 公开了一种抑制开关，其包括永磁体和磁传感器，该磁传感器在非接触状态下检测永磁体的磁力，并且响应于永磁体之间的相对位置的变化而输出电压值的线性变化 磁铁和磁性传感器。 永磁体和磁传感器之一安装在手动阀轴侧，用于通过与手动阀轴互锁地操作自动变速器的手动阀来改变自动变速器的换档范围位置。 永磁体和磁传感器中的另一个安装在自动变速箱的变速箱侧。 响应于对应于变速档位置的电压值的输出，可以检测自动变速器的变速范围位置。

公开(公告)号：US5278428A

公开(公告)日：1994-01-11

申请号：US720895

申请日：1991-06-25

申请人： Hiroyasu Yamada ,  Hiroshi Matsumoto ,  Syunichi Sato

发明人： Hiroyasu Yamada ,  Hiroshi Matsumoto ,  Syunichi Sato

IPC分类号： G11C16/04 ,  H01L27/115 ,  H01L29/792 ,  H01L29/04 ,  H01L27/108 ,  H01L31/036 ,  H01L31/20

CPC分类号： G11C16/0466 ,  H01L27/115 ,  H01L29/792

摘要： A memory cell has a thin film memory transistor and a thin film selective transistor. The thin film memory transistor has a charge trapping structure and a positive-negative-charge occurrence structure. The charge trapping structure includes a first thin film semiconductor layer, an insulating memory gate layer formed on the first thin film semiconductor layer, and a memory gate electrode. The positive-negative-charge occurrence structure includes an impurity high density layer with a portion facing the memory gate electrode. The thin film selective transistor is coupled to the thin film memory transistor in a serial form and has an only n-channel occurrence structure which includes a second thin film semiconductor layer, an insulating selective gate layer formed on the second thin film semiconductor layer and being thicker than the insulating memory gate layer, and a selective gate electrode formed on said insulating selective gate layer.

摘要翻译： 存储单元具有薄膜存储晶体管和薄膜选择晶体管。 薄膜存储晶体管具有电荷捕获结构和正负电荷发生结构。 电荷捕获结构包括第一薄膜半导体层，形成在第一薄膜半导体层上的绝缘存储栅极层和存储栅电极。 正 - 负电荷发生结构包括具有面向存储栅电极的部分的杂质高密度层。 薄膜选择晶体管以串行形式耦合到薄膜存储晶体管，并且具有唯一的n沟道出现结构，其包括第二薄膜半导体层，形成在第二薄膜半导体层上的绝缘选择栅层，并且是 比绝缘存储器栅极层厚，以及形成在所述绝缘选择栅极层上的选择栅电极。