公开(公告)号：US07321615B2

公开(公告)日：2008-01-22

申请号：US10728959

申请日：2003-12-08

申请人： Tadanori Ryu ,  Yasuhiro Ishizaka ,  Izumi Kinoshita

发明人： Tadanori Ryu ,  Yasuhiro Ishizaka ,  Izumi Kinoshita

IPC分类号： H04B1/38

CPC分类号： H04L5/14 ,  H04L7/02 ,  H04L25/0262

摘要： An UART receives asynchronous transmission serial data based on a baud-rate clock from a DTE. An MPU analyzes the data received by the UART. A baud-rate generating portion generates the baud-rate clock to be output to the UART in accordance with instructions from the MPU. A first counter measures the span of the start bit of the first character of an AT command transmitted from the DTE based on instructions from the MPU. A decoder receives a measurement result of the first counter, outputs frequency-dividing data for producing a clock for sampling the first character, and also outputs, when the rate of the start bit is more than a preset value, a flag indicating this matter. A second counter selects, in accordance with whether or not the flag is has been set, the frequency-dividing data from either the decoder or the MPU, and produces the sampling clock. A shift register receives data subsequent to the start bit of the first character based on the sampling clock from the second register, holds the received data, which data is then read by the MPU.

摘要翻译： UART根据DTE的波特率时钟接收异步传输串行数据。 MPU分析UART接收的数据。 波特率产生部分根据MPU的指令产生要输出到UART的波特率时钟。 第一个计数器根据MPU的指令来测量从DTE发送的AT命令的第一个字符的起始位的跨度。 解码器接收第一计数器的测量结果，输出用于产生用于对第一字符进行采样的时钟的分频数据，并且当起始比特的比率大于预设值时，还输出指示该事项的标志。 第二计数器根据该标志是否被设置，从解码器或MPU中选择分频数据，并产生采样时钟。 移位寄存器基于来自第二寄存器的采样时钟接收第一字符的起始位之后的数据，保存接收到的数据，然后由MPU读取该数据。

公开(公告)号：US5812873A

公开(公告)日：1998-09-22

申请号：US564536

申请日：1995-11-29

申请人： Tadanori Ryu

发明人： Tadanori Ryu

IPC分类号： H04N5/92 ,  G06T1/20 ,  G06T1/60 ,  G06T9/00 ,  G11B20/00 ,  G11B20/10 ,  H03M7/30 ,  H04N19/00 ,  H04N19/423 ,  H04N19/426 ,  H04N19/44 ,  G06F13/00

CPC分类号： G11B20/00007 ,  G11B20/10 ,  H04N19/00

摘要： An address generating circuit generates addresses. A decoder reads compressed data from a recording medium according to the addresses supplied by the address generating circuit and decodes thus-read data. An address switching circuit selects one of an address supplied by the address generating circuit and an address supplied from an external address bus. A data switching circuit selects one of data supplied from the recording medium and data supplied by the decoder. The decoder circuits enters one of a through mode and a decoding mode, input data being output as it is in the through mode, input compressed data being decoded and the thus-decoded data being output in the decoding mode. When an address relevant to the recording medium is given externally, the decoder circuit enters the through mode and data thus read out from the recording medium is output to the data bus, and when an address relevant to the recording medium is given from the address generating circuit, the decoder circuit enters the decoding mode, reads compressed data from the recording medium, decodes it and outputs the decoded data to the data bus.

摘要翻译： 地址产生电路产生地址。 解码器根据由地址产生电路提供的地址从记录介质读取压缩数据并解码这样读取的数据。 地址切换电路选择由地址产生电路提供的地址和从外部地址总线提供的地址之一。 数据切换电路选择从记录介质提供的数据和由解码器提供的数据之一。 解码器电路进入直通模式和解码模式之一，直接输出输入数据，输入正在解码的压缩数据，并以解码模式输出这样解码的数据。 当外部给出与记录介质相关的地址时，解码器电路进入通过模式，并且从记录介质读出的数据被输出到数据总线，并且当从产生的地址给出与记录介质相关的地址时 电路中，解码器电路进入解码模式，从记录介质读取压缩数据，对其进行解码并将解码的数据输出到数据总线。

公开(公告)号：US06704350B1

公开(公告)日：2004-03-09

申请号：US09479889

申请日：2000-01-10

申请人： Tadanori Ryu ,  Yasuhiro Ishizaka ,  Izumi Kinoshita

发明人： Tadanori Ryu ,  Yasuhiro Ishizaka ,  Izumi Kinoshita

IPC分类号： H04B138

CPC分类号： H04L5/14 ,  H04L7/02 ,  H04L25/0262

摘要： A first counter measures the span of the start bit of a first character of an AT command transmitted from a DTE based on instructions from an MPU. A decoder receives a measurement result of the first counter, outputs frequency-dividing data for producing a clock for sampling the first character, and also outputs, when the rate of the start bit is more than a preset value, a flag indicating this matter. A second counter selects, in accordance with whether or not the flag has been set, the frequency-dividing data from either the decoder or the MPU, and produces the sampling clock. A shift register receives data subsequent to the start bit of the first character based on the sampling clock from the second register, holds the received data, which data is then read by the MPU.

摘要翻译： 第一计数器基于来自MPU的指令来测量从DTE发送的AT命令的第一个字符的起始位的跨度。 解码器接收第一计数器的测量结果，输出用于产生用于对第一字符进行采样的时钟的分频数据，并且当起始比特的比率大于预设值时，还输出指示该事项的标志。 第二计数器根据该标志是否被设置，从解码器或MPU中选择分频数据，并产生采样时钟。 移位寄存器基于来自第二寄存器的采样时钟接收第一字符的起始位之后的数据，保存接收到的数据，然后由MPU读取该数据。

公开(公告)号：US10305685B2

公开(公告)日：2019-05-28

申请号：US15213587

申请日：2016-07-19

申请人： Tsutomu Kawase ,  Masahiko Itoh ,  Fumihiko Itoh ,  Tadanori Ryu ,  Kei Inaba

发明人： Tsutomu Kawase ,  Masahiko Itoh ,  Fumihiko Itoh ,  Tadanori Ryu ,  Kei Inaba

IPC分类号： H04L9/08 ,  H04L9/16 ,  H04L9/32 ,  G06F21/35 ,  G06F21/62 ,  H04L29/06

摘要： An identification information transmitter encrypts identification information for identifying a person or an object using an encryption key, transmits the encrypted identification information, and, after receiving another encryption key, switches the encryption key from the encryption key to the other encryption key. A server receives the encrypted identification information from the identification information transmitter, determines whether the encryption key is to be switched, and, if the encryption key is to be switched, generates the other encryption key. Another server authenticates the identification information that an identification information receiver receives from the identification information transmitter, and, if authentication is successful, acquires the other encryption key from the server, and transmits the other encryption key to the identification information receiver. The identification information receiver, when receiving the other encryption key from the second server, transmits the other encryption key to the identification information transmitter.

公开(公告)号：US20170099135A1

公开(公告)日：2017-04-06

申请号：US15213587

申请日：2016-07-19

申请人： Tsutomu KAWASE ,  Masahiko Itoh ,  Fumihiko Itoh ,  Tadanori Ryu ,  Kei Inaba

发明人： Tsutomu KAWASE ,  Masahiko Itoh ,  Fumihiko Itoh ,  Tadanori Ryu ,  Kei Inaba

IPC分类号： H04L9/08 ,  H04L9/16 ,  H04L29/06 ,  H04L9/32

CPC分类号： H04L9/083 ,  G06F21/35 ,  G06F21/6245 ,  H04L9/0861 ,  H04L9/0891 ,  H04L9/16 ,  H04L9/32 ,  H04L63/0428

摘要： An identification information transmitter encrypts identification information for identifying a person or an object using an encryption key, transmits the encrypted identification information, and, after receiving another encryption key, switches the encryption key from the encryption key to the other encryption key. A server receives the encrypted identification information from the identification information transmitter, determines whether the encryption key is to be switched, and, if the encryption key is to be switched, generates the other encryption key. Another server authenticates the identification information that an identification information receiver receives from the identification information transmitter, and, if authentication is successful, acquires the other encryption key from the server, and transmits the other encryption key to the identification information receiver. The identification information receiver, when receiving the other encryption key from the second server, transmits the other encryption key to the identification information transmitter.

公开(公告)号：US5923787A

公开(公告)日：1999-07-13

申请号：US828999

申请日：1997-03-31

申请人： Junichi Hara ,  Tadanori Ryu

发明人： Junichi Hara ,  Tadanori Ryu

IPC分类号： H03M7/30 ,  G06F17/16 ,  G06T9/00 ,  H04N1/41 ,  H04N19/126 ,  H04N19/134 ,  H04N19/176 ,  H04N19/423 ,  H04N19/60 ,  H04N19/85 ,  H04N19/91 ,  G06K9/36

CPC分类号： G06T9/005

摘要： A quantization device includes a multiplying unit for multiplying one of n.times.n values of quantization matrix information by a selected scale factor so as to provide quantization basis information.The n.times.n values correspond to n.times.n pixels of a process block. These values are used as threshold values for quantization. A quantization operation unit for carrying out a quantization process on one of n.times.n orthogonal transformation coefficients uses the quantization basis information to provide a quantization coefficient, and a scale factor supplying unit for providing the noted one of the scale factors for the multiplying unit for using process location information which indicates a location in n.times.n matrix of the noted one of the n.times.n orthogonal transformation coefficients.

摘要翻译： 量化装置包括乘法单元，用于将量化矩阵信息的n×n个值之一乘以所选择的比例因子，以便提供量化基础信息。 nxn值对应于处理块的nxn个像素。 这些值用作量化的阈值。 用于对n×n个正交变换系数之一执行量化处理的量化运算单元使用量化基础信息来提供量化系数，以及比例因子提供单元，用于为乘法单元提供用于使用处理的所述一个比例因子 位置信息，其指示n×n个正交变换系数中的所述一个的n×n矩阵中的位置。

公开(公告)号：US07548581B2

公开(公告)日：2009-06-16

申请号：US11987349

申请日：2007-11-29

申请人： Tadanori Ryu ,  Yasuhiro Ishizaka ,  Izumi Kinoshita

发明人： Tadanori Ryu ,  Yasuhiro Ishizaka ,  Izumi Kinoshita

IPC分类号： H04B1/38

CPC分类号： H04L5/14 ,  H04L7/02 ,  H04L25/0262

摘要： An UART receives asynchronous transmission serial data based on a baud-rate clock from a DTE. An MPU analyzes the data received by the UART. A baud-rate generating portion generates the baud-rate clock to be output to the UART in accordance with instructions from the MPU. A first counter measures the span of the start bit of the first character of an AT command transmitted from the DTE based on instructions from the MPU. A decoder receives a measurement result of the first counter, outputs frequency-dividing data for producing a clock for sampling the first character, and also outputs, when the rate of the start bit is more than a preset value, a flag indicating this matter. A second counter selects, in accordance with whether or not the flag is has been set, the frequency-dividing data from either the decoder or the MPU, and produces the sampling clock. A shift register receives data subsequent to the start bit of the first character based on the sampling clock from the second register, holds the received data, which data is then read by the MPU.

摘要翻译： UART根据DTE的波特率时钟接收异步传输串行数据。 MPU分析UART接收的数据。 波特率产生部分根据MPU的指令产生要输出到UART的波特率时钟。 第一个计数器根据MPU的指令来测量从DTE发送的AT命令的第一个字符的起始位的跨度。 解码器接收第一计数器的测量结果，输出用于产生用于对第一字符进行采样的时钟的分频数据，并且当起始比特的比率大于预设值时，还输出指示该事项的标志。 第二计数器根据该标志是否被设置，从解码器或MPU中选择分频数据，并产生采样时钟。 移位寄存器基于来自第二寄存器的采样时钟接收第一字符的起始位之后的数据，保存接收到的数据，然后由MPU读取该数据。

公开(公告)号：US20080144706A1

公开(公告)日：2008-06-19

申请号：US11987349

申请日：2007-11-29

申请人： Tadanori Ryu ,  Yasuhiro Ishizaka ,  Izumi Kinoshita

发明人： Tadanori Ryu ,  Yasuhiro Ishizaka ,  Izumi Kinoshita

IPC分类号： H04B1/38

CPC分类号： H04L5/14 ,  H04L7/02 ,  H04L25/0262

摘要： An UART receives asynchronous transmission serial data based on a baud-rate clock from a DTE. An MPU analyzes the data received by the UART. A baud-rate generating portion generates the baud-rate clock to be output to the UART in accordance with instructions from the MPU. A first counter measures the span of the start bit of the first character of an AT command transmitted from the DTE based on instructions from the MPU. A decoder receives a measurement result of the first counter, outputs frequency-dividing data for producing a clock for sampling the first character, and also outputs, when the rate of the start bit is more than a preset value, a flag indicating this matter. A second counter selects, in accordance with whether or not the flag is has been set, the frequency-dividing data from either the decoder or the MPU, and produces the sampling clock. A shift register receives data subsequent to the start bit of the first character based on the sampling clock from the second register, holds the received data, which data is then read by the MPU.

摘要翻译： UART根据DTE的波特率时钟接收异步传输串行数据。 MPU分析UART接收的数据。 波特率产生部分根据MPU的指令产生要输出到UART的波特率时钟。 第一个计数器根据MPU的指令来测量从DTE发送的AT命令的第一个字符的起始位的跨度。 解码器接收第一计数器的测量结果，输出用于产生用于对第一字符进行采样的时钟的分频数据，并且当起始比特的比率大于预设值时，还输出指示该事项的标志。 第二计数器根据该标志是否被设置，从解码器或MPU中选择分频数据，并产生采样时钟。 移位寄存器基于来自第二寄存器的采样时钟接收第一字符的起始位之后的数据，保存接收到的数据，然后由MPU读取该数据。

公开(公告)号：US5861824A

公开(公告)日：1999-01-19

申请号：US776994

申请日：1997-02-06

申请人： Tadanori Ryu ,  Masashi Tokuda

发明人： Tadanori Ryu ,  Masashi Tokuda

IPC分类号： H04N1/411 ,  G06T9/00 ,  H03M7/30 ,  H03M7/48 ,  H04N1/41 ,  H03M7/00

CPC分类号： H03M7/48 ,  G06T9/005 ,  H04N1/41

摘要： In S2, to-be-compressed image data is encoded and thus compressed each time when using a respective one of a plurality of templates. In S4, compression rates of encoded data are compared with each other which encoded data was encoded each time when a respective one of the plurality of templates was used in S2. In S6, encoded data having the highest compression rate and template identification information of a template used when the encoded data having the highest compression rate was obtained in S2 are output. The encoding comprises entropy encoding. The to-be-compressed data comprises video game software programs.

摘要翻译： PCT No.PCT / JP96 / 01661 Sec。 371日期1997年2月6日 102（e）1997年2月6日PCT PCT 1996年6月17日PCT公布。 公开号WO97 / 01237 日期1997年1月9日在S2中，每当使用多个模板中的相应一个模板时，被压缩的图像数据被编码并因此被压缩。 在S4中，每当在S2中使用多个模板中的相应一个模板时，编码数据的压缩率彼此进行比较，编码数据被编码。 在S6中，输出在S2中获得具有最高压缩率的编码数据时使用的具有最高压缩率的编码数据和模板识别信息。 编码包括熵编码。 要压缩的数据包括视频游戏软件程序。

公开(公告)号：US5673043A

公开(公告)日：1997-09-30

申请号：US579296

申请日：1995-12-27

申请人： Nobutake Hayashi ,  Yutaka Sato ,  Tadanori Ryu

发明人： Nobutake Hayashi ,  Yutaka Sato ,  Tadanori Ryu

IPC分类号： H04N1/419 ,  G06T9/00 ,  H03M7/42 ,  H03M7/46 ,  H03M7/00

CPC分类号： H03M7/42 ,  G06T9/005

摘要： An entropy encoder includes: a memory for storing a code table in a compressed data format in which continuing digits "1" that continue successively from the most significant bit of a code word for a predetermined number of bits are removed, together with a control code indicative of the type of the original code word, and a code word restoring unit for restoring the original code word from the compressed code word by supplementing a predetermined number of digits "1" to the compressed code word according to the type of the original code word.

摘要翻译： 熵编码器包括：存储器，用于以压缩数据格式存储代码表，其中从预定位数的码字的最高有效位连续连续的连续数字“1”与控制码 指示原始码字的类型，以及码字恢复单元，用于根据原始码的类型向压缩码字补充预定数量的数字“1”，从压缩码字恢复原始码字 字。