公开(公告)号：US08411730B2

公开(公告)日：2013-04-02

申请号：US12955865

申请日：2010-11-29

申请人： Koji Maeda ,  Taizo Yamawaki ,  Yukinori Akamine

发明人： Koji Maeda ,  Taizo Yamawaki ,  Yukinori Akamine

IPC分类号： H04B1/38

CPC分类号： H04L27/3863 ,  H04B17/0085 ,  H04B17/21 ,  H04L25/06

摘要： The semiconductor integrated communication circuit includes:a low-noise amplifier; a receive mixer; a receive VCO; a demodulation-processing circuit; a modulation-processing circuit; a transmit mixer; a transmit VCO; a second-order-distortion-characteristic-calibration circuit; a quadrature-receive-signal-calibration circuit; and a test-signal generator. The test-signal generator generates first and second test signals using the transmit VCO. In the second-order-distortion-characteristic-calibration mode, the second-order-distortion-characteristic-calibration circuit variably changes an operation parameter of the receive mixer thereby to calibrate the second-order distortion characteristic to achieve its best condition while the first test signal is supplied to the receive mixer. In the quadrature-receive-signal-calibration mode, the quadrature-receive-signal-calibration circuit calibrates IQ mismatch of a quadrature receive signal to achieve the best condition thereof while the second test signal is supplied to the receive mixer. The integrated communication circuit can minimize the increase in chip footprint of a test-signal-generating circuit used to perform calibrations of both the second-order characteristic and IQ mismatch.

摘要翻译： 半导体集成通信电路包括：低噪声放大器; 接收混音器 接收VCO; 解调处理电路; 调制处理电路; 发射混频器; 发射VCO; 二阶畸变特征校准电路; 正交接收信号校准电路; 和测试信号发生器。 测试信号发生器使用发射VCO产生第一和第二测试信号。 在二次失真特性校准模式中，二阶失真特性校准电路可变地改变接收混频器的操作参数，从而校正二阶失真特性，以实现其最佳状态，而第一 测试信号被提供给接收混频器。 在正交接收信号校准模式中，正交接收信号校准电路校准正交接收信号的IQ失配，以实现其最佳状态，同时将第二测试信号提供给接收混频器。 集成通信电路可以最小化用于执行二阶特性和IQ失配校准的测试信号发生电路的芯片占用面积的增加。

公开(公告)号：US08396430B2

公开(公告)日：2013-03-12

申请号：US13114340

申请日：2011-05-24

申请人： Taizo Yamawaki ,  Tomonori Tanoue ,  Kazuaki Hori

发明人： Taizo Yamawaki ,  Tomonori Tanoue ,  Kazuaki Hori

IPC分类号： H04B1/44

CPC分类号： H04B1/006 ,  H04B1/52

摘要： Disclosed are a semiconductor integrated circuit device and a wireless communication system that are capable of improving reception sensitivity. The wireless communication system includes, for instance, a first duplexer, a second duplexer, a first low-noise amplifier circuit, and a second low-noise amplifier circuit. A transmission band compliant with a communication standard is split into two segments for use, namely, low- and high-frequency transmission bands. A reception band compliant with the communication standard is split into two segments for use, namely, low- and high-frequency reception bands. The first duplexer uses the low-frequency transmission band and low-frequency reception band as passbands. The second duplexer uses the high-frequency transmission band and high-frequency reception band as passbands. A signal received from the first duplexer and a signal received from the second duplexer are respectively amplified by the first and the second low-noise amplifier circuits, which are respectively provided to handle such signals.

摘要翻译： 公开了能够提高接收灵敏度的半导体集成电路装置和无线通信系统。 无线通信系统包括例如第一双工器，第二双工器，第一低噪声放大器电路和第二低噪声放大器电路。 符合通信​​标准的传输频带被分成两个段，即低频和高频传输频带。 符合通信​​标准的接收频段被分为两段供低频和高频接收频段使用。 第一双工器使用低频传输频带和低频接收频带作为通带。 第二双工器使用高频传输频带和高频接收频带作为通带。 从第一双工器接收的信号和从第二双工器接收的信号分别由分别提供以处理这种信号的第一和第二低噪声放大器电路放大。

公开(公告)号：US08359067B2

公开(公告)日：2013-01-22

申请号：US13197684

申请日：2011-08-03

申请人： Akira Kuriyama ,  Taizo Yamawaki ,  Satoshi Tanaka

发明人： Akira Kuriyama ,  Taizo Yamawaki ,  Satoshi Tanaka

IPC分类号： H04M1/00

CPC分类号： H04B1/0483 ,  H04B1/0458

摘要： There is provided a radio frequency circuit device for multi-band and multi-mode which is low in a circuit loss, and a mobile communication terminal using the radio frequency circuit device. The radio frequency circuit device has a first path 110 that includes an amplifier 10a that amplifies signals of at least two modulation techniques in power, a matching network 20 that is connected to the amplifier and a duplexer 50 and allows the matching network to be coupled with an antenna, and a second path 111 that does not include the duplexer and allows the matching network to be coupled with the antenna. The first path is selected when the amplifier amplifies one of the signals of at least two modulation techniques, and the second path is selected when the amplifier amplifies another signal. An output impedance of the amplifier is matched with an impedance when viewing the antenna side from the amplifier in the first path and the second path.

摘要翻译： 提供了一种电路损耗低的用于多频和多模的射频电路装置，以及使用射频电路装置的移动通信终端。 射频电路装置具有第一路径110，其包括放大器10a，其放大至少两个功率调制技术的信号，连接到放大器的匹配网络20和双工器50，并允许匹配网络与 天线和第二路径111，其不包括双工器并且允许匹配网络与天线耦合。 当放大器放大至少两个调制技术的信号之一时，选择第一路径，并且当放大器放大另一信号时选择第二路径。 当从第一路径和第二路径中的放大器观看天线侧时，放大器的输出阻抗与阻抗匹配。

公开(公告)号：US08299865B2

公开(公告)日：2012-10-30

申请号：US12942533

申请日：2010-11-09

申请人： Takahiro Nakamura ,  Taizo Yamawaki ,  Takayasu Norimatsu ,  Takao Kihara

发明人： Takahiro Nakamura ,  Taizo Yamawaki ,  Takayasu Norimatsu ,  Takao Kihara

IPC分类号： H04L27/20 ,  H03C3/40

CPC分类号： H04L27/36

摘要： A quadrature modulator has first to fourth transistors, a first node, a second node, and a first output node. A non-inversion in-phase analog signal, an inversion in-phase analog signal, a non-inversion quadrature analog signal, and an inversion quadrature analog signal are supplied to input electrodes of the first to fourth transistors, respectively. Control electrodes of the first to fourth transistors respond to a non-inversion in-phase RF signal, an inversion in-phase RF signal, a non-inversion quadrature RF signal, and an inversion quadrature RF signal, respectively. Output electrodes of the first and second transistors are coupled to the first node, and output electrodes of the third and fourth transistors are coupled to the second node. A first high-pass filter is coupled between the first node and the first output node, and a second high-pass filter is coupled between the second node and the first output node.

摘要翻译： 正交调制器具有第一至第四晶体管，第一节点，第二节点和第一输出节点。 分别向第一至第四晶体管的输入电极提供非反相同相模拟信号，反相同相模拟信号，非反相正交模拟信号和反相正交模拟信号。 第一至第四晶体管的控制电极分别响应非反相同相RF信号，反相同相RF信号，非反相正交RF信号和反相正交RF信号。 第一和第二晶体管的输出电极耦合到第一节点，并且第三和第四晶体管的输出电极耦合到第二节点。 第一高通滤波器耦合在第一节点和第一输出节点之间，并且第二高通滤波器耦合在第二节点和第一输出节点之间。

公开(公告)号：US08169350B2

公开(公告)日：2012-05-01

申请号：US12273240

申请日：2008-11-18

申请人： Takashi Oshima ,  Taizo Yamawaki

发明人： Takashi Oshima ,  Taizo Yamawaki

IPC分类号： H03M1/10 ,  H04B1/12 ,  H04B1/18

CPC分类号： H03M1/122 ,  H03M1/1033 ,  H03M1/167

摘要： A wireless receiving circuit having an analog-digital converter of digital calibration type constituted by plural analog-digital converter units, shares portions about digital calibration, and applies the result of calibration of one analog-digital converter unit to other analog-digital converter units to appropriately perform each digital calibration of the plural analog-digital converter units. For example, in a wireless receiving circuit having an analog-digital converter of digital calibration type constituted of an analog-digital converter unit of I side and an analog-digital converter unit of Q side, portions about digital calibration are shared, and a calibration result of I side is applied to Q side.

摘要翻译： 一种无线接收电路，具有由多个模拟数字转换器单元构成的具有数字校准类型的模拟数字转换器，共享关于数字校准的部分，并将一个模拟数字转换器单元的校准结果应用于其它模数转换器单元， 适当地执行多个模拟数字转换器单元的每个数字校准。 例如，在具有由I侧的模拟数字转换器单元和Q侧的模拟数字转换器单元构成的数字校准类型的模拟数字转换器的无线接收电路中，共享关于数字校准的部分，并且校准 我方的结果适用于Q方。

公开(公告)号：US08095094B2

公开(公告)日：2012-01-10

申请号：US12263571

申请日：2008-11-03

申请人： Hiroaki Matsui ,  Taizo Yamawaki ,  Yoshiaki Harasawa ,  Steve Williams

发明人： Hiroaki Matsui ,  Taizo Yamawaki ,  Yoshiaki Harasawa ,  Steve Williams

IPC分类号： H01Q11/12 ,  H04B1/04

CPC分类号： H03F3/211 ,  H03F3/45085 ,  H03F2200/78 ,  H03G3/3042

摘要： A communication semiconductor integrated circuit includes a phase control loop and an amplitude control loop. A gain of a variable gain amplifier when it is detected from an output of the comparator that the amplitudes of the reference signal and the feedback signal are equal to each other while a predetermined DC voltage is applied to an amplifier which amplifies an output of a transmission oscillation circuit and is controlled by the amplitude control loop to vary the gain of the variable gain amplifier on a feedback path is held in a register. Thereafter, the DC voltage is changed to another value to detect the gain of the variable gain amplifier, so that the gain of a variable gain amplifier on the forward path is decided on the basis of the detected gain and the gain held in the register.

摘要翻译： 通信半导体集成电路包括相位控制环路和幅度控制环路。 当从比较器的输出检测到可变增益放大器的增益时，参考信号和反馈信号的幅度彼此相等，同时将预定的DC电压施加到放大器，其放大传输的输出 振荡电路并由幅度控制环路控制，将可变增益放大器的增益在反馈路径上保持在寄存器中。 此后，将DC电压改变为另一个值以检测可变增益放大器的增益，从而基于检测到的增益和保持在寄存器中的增益来确定正向通路上的可变增益放大器的增益。

公开(公告)号：US20110286368A1

公开(公告)日：2011-11-24

申请号：US13197684

申请日：2011-08-03

申请人： Akira KURIYAMA ,  Taizo YAMAWAKI ,  Satoshi TANAKA

发明人： Akira KURIYAMA ,  Taizo YAMAWAKI ,  Satoshi TANAKA

IPC分类号： H04W4/00

CPC分类号： H04B1/0483 ,  H04B1/0458

摘要： There is provided a radio frequency circuit device for multi-band and multi-mode which is low in a circuit loss, and a mobile communication terminal using the radio frequency circuit device. The radio frequency circuit device has a first path 110 that includes an amplifier 10a that amplifies signals of at least two modulation techniques in power, a matching network 20 that is connected to the amplifier and a duplexer 50 and allows the matching network to be coupled with an antenna, and a second path 111 that does not include the duplexer and allows the matching network to be coupled with the antenna. The first path is selected when the amplifier amplifies one of the signals of at least two modulation techniques, and the second path is selected when the amplifier amplifies another signal. An output impedance of the amplifier is matched with an impedance when viewing the antenna side from the amplifier in the first path and the second path.

摘要翻译： 提供了一种电路损耗低的用于多频和多模的射频电路装置，以及使用射频电路装置的移动通信终端。 射频电路装置具有第一路径110，其包括放大器10a，其放大至少两个功率调制技术的信号，连接到放大器的匹配网络20和双工器50，并允许匹配网络与 天线和第二路径111，其不包括双工器并且允许匹配网络与天线耦合。 当放大器放大至少两个调制技术的信号之一时，选择第一路径，并且当放大器放大另一信号时选择第二路径。 当从第一路径和第二路径中的放大器观看天线侧时，放大器的输出阻抗与阻抗匹配。

公开(公告)号：US08004445B2

公开(公告)日：2011-08-23

申请号：US12720669

申请日：2010-03-10

申请人： Takashi Oshima ,  Taizo Yamawaki

发明人： Takashi Oshima ,  Taizo Yamawaki

IPC分类号： H03M1/34

CPC分类号： H03M1/1004 ,  H03M1/002 ,  H03M1/005 ,  H03M1/1009 ,  H03M1/126 ,  H03M1/44

摘要： In a wireless chip receiving the multi-rate data according to the related art, power consumption and a circuit area of an analog-to-digital converter become large. In a digital calibration type analog-to-digital converter including both a reference analog-to-digital conversion unit and a main analog-to-digital conversion unit, when processing the high-sample rate wireless receive signal, both the reference analog-to-digital conversion unit and the main analog-to-digital conversion unit are operated to configure a general digital calibration type analog-to-digital converter, and when processing a low-sample rate wireless receive signal, analog-to-digital conversion is performed by using the reference analog-to-digital conversion unit and operations of the main analog-to-digital conversion unit or the like are stopped to remarkably reduce power consumption.

摘要翻译： 在接收根据现有技术的多速率数据的无线芯片中，功率消耗和模数转换器的电路面积变大。 在包括参考模数转换单元和主模数转换单元的数字校准类型模数转换器中，当处理高抽样率无线接收信号时，参考模拟到数字转换单元 操作数字转换单元和主模拟 - 数字转换单元来配置通用数字校准类型模数转换器，并且当处理低采样率无线接收信号时，执行模拟 - 数字转换 通过使用参考模数转换单元，并且停止主模数转换单元等的操作以显着地降低功耗。

公开(公告)号：US20110092175A1

公开(公告)日：2011-04-21

申请号：US12975488

申请日：2010-12-22

申请人： Satoshi Tanaka ,  Kazuo Watanabe ,  Masao Hotta ,  Toyohiko Hongo ,  Taizo Yamawaki ,  Masumi Kasahara ,  Kumiko Takikawa

发明人： Satoshi Tanaka ,  Kazuo Watanabe ,  Masao Hotta ,  Toyohiko Hongo ,  Taizo Yamawaki ,  Masumi Kasahara ,  Kumiko Takikawa

IPC分类号： H04B1/10 ,  H04B7/00

CPC分类号： H04B1/30 ,  H03D2200/0047 ,  H03K21/16

摘要： A transceiver suitable for larger scale of integration employs direct conversion reception for reducing the number of filters. Also, the number of VCOs is reduced by utilizing dividers to supply a receiver and a transmitter with locally oscillated signals at an RF band. Dividers each having a fixed division ratio are used for generating locally oscillated signals for the receiver, while a divider having a switchable division ratio are used for generating the locally oscillated signal for the transmitter. In addition, a variable gain amplifier for baseband signal is provided with a DC offset voltage detector and a DC offset canceling circuit for supporting high speed data communications to accomplish fast cancellation of a DC offset by eliminating intervention of a filter within a feedback loop for offset cancellation.

摘要翻译： 适合较大规模集成的收发器采用直接转换接收，以减少滤波器的数量。 此外，通过利用分频器来为RF频带提供具有本地振荡信号的接收机和发射机来减少VCO的数量。 每个具有固定分频比的分频器用于产生用于接收机的局部振荡信号，而具有可切换分频比的分频器用于产生用于发射机的本地振荡信号。 另外，用于基带信号的可变增益放大器设置有DC偏移电压检测器和DC偏移消除电路，用于支持高速数据通信以通过消除用于偏移的反馈回路内的滤波器的干涉来实现DC偏移的快速消除 消除。

公开(公告)号：US20100052795A1

公开(公告)日：2010-03-04

申请号：US12540248

申请日：2009-08-12

申请人： Takahiro Nakamura ,  Tomomitsu Kitamura ,  Taizo Yamawaki ,  Takayasu Norimatsu ,  Toshiya Uozumi

发明人： Takahiro Nakamura ,  Tomomitsu Kitamura ,  Taizo Yamawaki ,  Takayasu Norimatsu ,  Toshiya Uozumi

IPC分类号： H03L7/099

CPC分类号： H03J3/20 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1265 ,  H03B5/1293 ,  H03J2200/10

摘要： The present invention provides a semiconductor integrated circuit capable of reducing a chip occupied area and reducing variations in control gain of a digitally controlled oscillator. The semiconductor integrated circuit is equipped with the digitally controlled oscillator. The digitally controlled oscillator comprises oscillation transistors and a resonant circuit. The resonant circuit comprises inductances, a frequency coarse-tuning variable capacitor array and a frequency fine-tuning variable capacitor array. The frequency coarse-tuning variable capacitor array comprises a plurality of coarse-tuning capacitor unit cells. The frequency fine-tuning variable capacitor array comprises a plurality of fine-tuning capacitor unit cells. The capacitance values of the coarse-tuning capacitor unit cells of the frequency coarse-tuning variable capacitor array are set in accordance with a binary weight 2M−1. The capacitance values of the fine-tuning capacitor unit cells of the frequency fine-tuning variable capacitor array are also set in accordance with a binary weight 2N−1.

摘要翻译： 本发明提供一种能够减少芯片占用面积并减少数字控制振荡器的控制增益的变化的半导体集成电路。 半导体集成电路配有数字控制振荡器。 数字控制振荡器包括振荡晶体管和谐振电路。 谐振电路包括电感，频率粗调可变电容器阵列和频率微调可变电容器阵列。 频率粗调可变电容器阵列包括多个粗调谐电容器单元。 频率微调可变电容器阵列包括多个微调电容器单元。 频率粗调可变电容器阵列的粗​​调电容器单元的电容值根据二进制权重2M-1来设定。 频率微调可变电容器阵列的微调电容器单元的电容值也根据二进制权重2N-1设定。