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公开(公告)号：US09430971B2
公开(公告)日：2016-08-30
申请号：US13606876
申请日：2012-09-07
CPC分类号： G09G3/3413 , G09G3/3614 , G09G2300/0426 , G09G2300/0833 , G09G2300/0838 , G09G2300/0857 , G09G2320/0247
摘要： An electro-optical unit includes pixels provided correspondingly to portions where a plurality of pairs of data lines and a plurality of gate lines intersect with each other. Each of the pixels has an electro-optical device and a pixel circuit. The pixel circuit has a holding circuit connected with one of the plurality of pairs of data lines and one of the plurality of gate lines, and a selection circuit connected with an output of the holding circuit and the electro-optical device. The holding circuit is capable of sampling and holding a first image signal to be applied to one of the pair of the data lines, while sampling and holding a second image signal to be applied to the other of the pair of the data lines. The selection circuit is capable of outputting the first image signal and the second image signal to the electro-optical device selectively.
摘要翻译： 电光单元包括对应于多对数据线和多条栅极线彼此相交的部分提供的像素。 每个像素具有电光器件和像素电路。 像素电路具有与多条数据线中的一条数据线和多条栅极线之一连接的保持电路，以及与保持电路和电光器件的输出端连接的选择电路。 保持电路能够采样并保持要施加到一对数据线之一的第一图像信号，同时采样并保持要施加到该对数据线中的另一条数据线的第二图像信号。 选择电路能够选择性地将第一图像信号和第二图像信号输出到电光器件。
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公开(公告)号：US09024922B2
公开(公告)日：2015-05-05
申请号：US13612045
申请日：2012-09-12
申请人： Naoki Andou , Kouzi Tsukamoto , Takamitsu Urakawa , Kazuhiro Takeda , Keiko Kawaguchi , Taizou Hoshihara , Kouichi Hashikaki
发明人： Naoki Andou , Kouzi Tsukamoto , Takamitsu Urakawa , Kazuhiro Takeda , Keiko Kawaguchi , Taizou Hoshihara , Kouichi Hashikaki
CPC分类号： G09G3/3685 , G09G3/3648 , G09G3/3688 , G09G5/18 , G09G2300/0404 , G09G2310/0248
摘要： A display device includes: data-line pairs arranged side by side along a first direction; gate lines arranged side by side along a second direction; a display section including pixels each disposed at an intersection of a data-line pair and a gate line and connected to one or both of the data-line pair; a data-line drive circuit supplying a positive-phase data signal to one of the data-line pair and a negative-phase data signal to the other, and allowing the data-line pair to stay in a high-impedance state before writing of an image signal to the pixels; and a short circuit putting the data-line pair in a short-circuit state while the data-line pair stays in the high-impedance state, and then releasing the short-circuit state Following the release of the short-circuit state, the positive-phase data signal or/and the negative-phase data signal are written into the pixel as the mage signal.
摘要翻译： 显示装置包括：沿着第一方向并排布置的数据线对; 沿着第二方向并排布置的栅极线; 显示部分，包括各自设置在数据线对和栅极线的交叉点并连接到数据线对中的一个或两个的像素; 数据线驱动电路，将正相数据信号提供给数据线对之一和负相数据信号，另一方面允许数据线对在写入前保持高阻抗状态 对像素的图像信号; 并且在数据线对处于高阻态的时候将数据线对置于短路状态，然后释放短路状态的短路在释放短路状态之后，正的 相位数据信号或/和负相位数据信号作为法师信号写入像素。
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公开(公告)号：US20130076725A1
公开(公告)日：2013-03-28
申请号：US13606876
申请日：2012-09-07
CPC分类号： G09G3/3413 , G09G3/3614 , G09G2300/0426 , G09G2300/0833 , G09G2300/0838 , G09G2300/0857 , G09G2320/0247
摘要： An electro-optical unit includes pixels provided correspondingly to portions where a plurality of pairs of data lines and a plurality of gate lines intersect with each other. Each of the pixels has an electro-optical device and a pixel circuit. The pixel circuit has a holding circuit connected with one of the plurality of pairs of data lines and one of the plurality of gate lines, and a selection circuit connected with an output of the holding circuit and the electro-optical device. The holding circuit is capable of sampling and holding a first image signal to be applied to one of the pair of the data lines, while sampling and holding a second image signal to be applied to the other of the pair of the data lines. The selection circuit is capable of outputting the first image signal and the second image signal to the electro-optical device selectively.
摘要翻译： 电光单元包括对应于多对数据线和多条栅极线彼此相交的部分提供的像素。 每个像素具有电光器件和像素电路。 像素电路具有与多条数据线中的一条数据线和多条栅极线之一连接的保持电路，以及与保持电路和电光器件的输出端连接的选择电路。 保持电路能够采样并保持要施加到一对数据线之一的第一图像信号，同时采样并保持要施加到该对数据线中的另一条数据线的第二图像信号。 选择电路能够选择性地将第一图像信号和第二图像信号输出到电光器件。
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公开(公告)号：US20130076706A1
公开(公告)日：2013-03-28
申请号：US13612045
申请日：2012-09-12
申请人： Naoki Andou , Kouzi Tsukamoto , Takamitsu Urakawa , Kazuhiro Takeda , Keiko Kawaguchi , Taizou Hoshihara , Kouichi Hashikaki
发明人： Naoki Andou , Kouzi Tsukamoto , Takamitsu Urakawa , Kazuhiro Takeda , Keiko Kawaguchi , Taizou Hoshihara , Kouichi Hashikaki
IPC分类号： G09G5/00
CPC分类号： G09G3/3685 , G09G3/3648 , G09G3/3688 , G09G5/18 , G09G2300/0404 , G09G2310/0248
摘要： A display device includes: data-line pairs arranged side by side along a first direction; gate lines arranged side by side along a second direction; a display section including pixels each disposed at an intersection of a data-line pair and a gate line and connected to one or both of the data-line pair; a data-line drive circuit supplying a positive-phase data signal to one of the data-line pair and a negative-phase data signal to the other, and allowing the data-line pair to stay in a high-impedance state before writing of an image signal to the pixels; and a short circuit putting the data-line pair in a short-circuit state while the data-line pair stays in the high-impedance state, and then releasing the short-circuit state Following the release of the short-circuit state, the positive-phase data signal or/and the negative-phase data signal are written into the pixel as the mage signal.
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