公开(公告)号：US6081003A

公开(公告)日：2000-06-27

申请号：US985364

申请日：1997-12-04

申请人： Shinichi Miyakuni ,  Teruyuki Shimura

发明人： Shinichi Miyakuni ,  Teruyuki Shimura

IPC分类号： H01L29/73 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/331 ,  H01L29/08 ,  H01L29/205 ,  H01L29/737 ,  H01L31/072 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/109

CPC分类号： H01L29/66318 ,  H01L29/0817 ,  H01L29/7371

摘要： A heterojunction bipolar transistor is provided with a ballast resistor layer in an emitter layer which prevents the current amplification factor .beta. from decreasing. The n-GaAs carrier supply layer having a specified carrier concentration is formed between the ballast resistor layer and the n-AlGaAs layer.

摘要翻译： 异质结双极晶体管在发射极层中设置有镇流电阻层，防止电流放大因子β降低。 在镇流电阻层和n-AlGaAs层之间形成具有规定载流子浓度的n-GaAs载流子供给层。

公开(公告)号：US5192700A

公开(公告)日：1993-03-09

申请号：US828374

申请日：1992-01-30

申请人： Teruyuki Shimura

发明人： Teruyuki Shimura

IPC分类号： H01L21/265 ,  H01L21/337 ,  H01L21/338 ,  H01L21/76 ,  H01L27/095 ,  H01L29/778 ,  H01L29/80 ,  H01L29/808 ,  H01L29/812

CPC分类号： H01L29/66924 ,  H01L21/7605 ,  H01L29/802 ,  H01L29/808

摘要： A field effect transistor including a semi-insulating semiconductor substrate, a first conductivity type semiconductor layer disposed on the substrate and forming a heterojunction with the substrate, second conductivity type spaced apart source and drain regions extending through the layer into the substrate, a metallic gate disposed on the layer between the source and drain regions, and a second conductivity type channel disposed in the substrate extending between the source and drain regions and forming a pn heterojunction with the layer for reducing leakage current from the channel to the gate. The second conductivity type channel is produced by ion implantation, and the implantation conditions are controlled as a mechanism for controllably establishing a threshold voltage for the field effect transistor.

摘要翻译： 一种场效应晶体管，包括半绝缘半导体衬底，设置在衬底上并与衬底形成异质结的第一导电类型半导体层，延伸穿过衬底的第二导电类型间隔开的源极和漏极区，金属栅极 设置在源极和漏极区域之间的层上，以及第二导电类型沟道，设置在衬底中，在源极和漏极区域之间延伸，并且与该层形成pn异质结，以减少从沟道到栅极的泄漏电流。 通过离子注入产生第二导电类型沟道，并且将注入条件作为用于可控地建立场效应晶体管的阈值电压的机制来控制。

公开(公告)号：US5073812A

公开(公告)日：1991-12-17

申请号：US481619

申请日：1990-02-20

申请人： Teruyuki Shimura

发明人： Teruyuki Shimura

IPC分类号： H01L29/73 ,  H01L21/033 ,  H01L21/331 ,  H01L29/205 ,  H01L29/737

CPC分类号： H01L29/66318 ,  H01L21/033

摘要： A semiconductor device includes an n.sup.+ type InGaAs layer at a surface of the device, a refractory metal emitter electrode making ohmic contact to the n.sup.+ layer without alloying, and an externally accessible base region produced in the neighborhood of the emitter electrode by a diffusion using the emitter electrode and an insulating side wall film as a diffusion mask.

摘要翻译： 半导体器件在器件的表面包括n +型InGaAs层，难熔金属发射极电极，其在没有合金化的情况下与n +层形成欧姆接触，并且通过扩散使用在发射极附近产生的外部可接近的基极区域 发射电极和绝缘侧壁膜作为扩散掩模。

公开(公告)号：US4967254A

公开(公告)日：1990-10-30

申请号：US217292

申请日：1988-07-11

申请人： Teruyuki Shimura

发明人： Teruyuki Shimura

IPC分类号： H01L29/08

CPC分类号： H01L29/0804 ,  Y10S148/111

摘要： A semiconductor device includes a collector layer comprising a first conductivity type semiconductor layer, a base layer comprising a second conductivity type semiconductor layer produced on the collector layer, an emitter layer comprising a first conductivity type semiconductor layer produced on the base layer, a contact layer comprising an undoped semiconductor layer produced on the emitter layer, second conductivity type first implantation regions produced at regions each consisting of the contact layer, the emitter layer, and the base layer, so as to leave a central region therebetween, base electrodes produced on the first implantation regions, a first conductivity type second implantation region produced by implanting impurities from the surface of the contact layer extending into the emitter layer, in a region between the first implantation regions, and an emitter electrode produced on the second implantation region. Or, a semiconductor device includes an emitter layer comprising undoped semiconductor layer and a first conductivity type second implantation region produced by implanting impurities from the surface of the undoped semiconductor layer extending into the base layer, at a region between the first implantation regions.

摘要翻译： 半导体器件包括：集电极层，包括第一导电类型半导体层;基底层，包括在集电极层上制造的第二导电类型半导体层;发射极层，包括在基底层上制造的第一导电型半导体层;接触层 包括在发射极层上产生的未掺杂的半导体层，在由接触层，发射极层和基极层组成的区域处产生的第二导电类型的第一注入区域，以在其间留下中心区域，在 第一注入区域，通过从在第一注入区域之间的区域中延伸到发射极层的接触层的表面注入杂质而产生的第一导电类型的第二注入区域和在第二注入区域上产生的发射极。 或者，半导体器件包括发射极层，其包括未掺杂半导体层和通过在第一注入区域之间的区域处从未掺杂的半导体层的表面注入杂质而产生的第一导电类型的第二注入区域。

公开(公告)号：US07145397B2

公开(公告)日：2006-12-05

申请号：US10889059

申请日：2004-07-13

申请人： Kazuya Yamamoto ,  Teruyuki Shimura ,  Tomoyuki Asada ,  Satoshi Suzuki

发明人： Kazuya Yamamoto ,  Teruyuki Shimura ,  Tomoyuki Asada ,  Satoshi Suzuki

IPC分类号： H03F1/52

CPC分类号： H03F1/52

摘要： Disclosed is an output overvoltage protection circuit for a power amplifier having a plurality of stages, which comprises a monitor circuit for monitoring an output overvoltage of an output transistor in the final stage of the power amplifier and allowing a current to flow therethrough in response to the monitored output overvoltage, and a current mirror circuit for supplying a current proportional to the current from the monitor circuit in such a manner that the base bias of the first-stage transistor of the power amplifier is reduced in response to the current supplied from the current mirror circuit, to reduce the output of the final-stage output transistor.

摘要翻译： 公开了一种用于具有多级的功率放大器的输出过电压保护电路，其包括监视电路，用于监视功率放大器的最后级中的输出晶体管的输出过电压，并且允许电流响应于 监控的输出过电压，以及电流镜电路，用于提供与来自监视器电路的电流成比例的电流，使得功率放大器的第一级晶体管的基极偏置响应于从电流提供的电流而减小 镜像电路，以减少最终级输出晶体管的输出。

公开(公告)号：US5889434A

公开(公告)日：1999-03-30

申请号：US888543

申请日：1997-07-07

申请人： Teruyuki Shimura ,  Takeshi Miura ,  Tadashi Takagi

发明人： Teruyuki Shimura ,  Takeshi Miura ,  Tadashi Takagi

IPC分类号： H03F3/60 ,  H03F1/32 ,  H03F3/195 ,  H03F3/191

CPC分类号： H03F1/3241

摘要： A microwave power amplifier having n stages (n is an integer of at least two), which uses bipolar transistors as amplifying elements. Grounded electrodes, bias applying methods, and bias values of the bipolar transistors of the respective stages are set so that phase rotations of output powers of bipolar transistors of m stages (m is an integer of 1.ltoreq.m.ltoreq.n-1) among the n stages are canceled by phase rotation of at least one of the other bipolar transistors of the (n-m) stages. Therefore, the total phase rotation of the power amplifier can be neutralized, resulting in a microwave power amplifier having excellent distortion characteristics.

摘要翻译： 具有n级（n为至少2的整数）的微波功率放大器，其使用双极晶体管作为放大元件。 设置接地电极，偏置施加方法和各级双极晶体管的偏置值，使得m级双极型晶体管的输出功率的相位旋转（m为1≤n≤n-1的整数 ）通过（nm）级的至少一个其他双极晶体管的相位旋转而被抵消。 因此，可以中和功率放大器的总相位旋转，导致具有优异失真特性的微波功率放大器。

公开(公告)号：US5793067A

公开(公告)日：1998-08-11

申请号：US675968

申请日：1996-07-05

申请人： Takeshi Miura ,  Teruyuki Shimura ,  Manabu Katoh

发明人： Takeshi Miura ,  Teruyuki Shimura ,  Manabu Katoh

IPC分类号： H01L23/495 ,  H01L25/07 ,  H01L31/0328

CPC分类号： H01L23/49562 ,  H01L23/49568 ,  H01L25/072 ,  H01L2924/0002

摘要： An electrode lead of a transistor extends beyond other electrode leads of the transistor, is disposed adjacent to the corresponding electrode, and is disposed outside the other electrode leads for heat radiation. A wider part of the electrode lead may have a via hole or a thick metal plating for heat radiation. Further, the electrode is preferably grounded and is connected to an external input terminal to which heat is transferred.

摘要翻译： 晶体管的电极引线延伸超过晶体管的其他电极引线，与相应的电极相邻设置，并且设置在另一个电极引线外部用于散热。 电极引线的较宽部分可以具有用于热辐射的通孔或厚金属电镀。 此外，电极优选地接地并且连接到热传递到的外部输入端子。

公开(公告)号：US5760457A

公开(公告)日：1998-06-02

申请号：US806396

申请日：1997-02-26

申请人： Shigeru Mitsui ,  Takuji Sonoda ,  Teruyuki Shimura ,  Saburo Takamiya

发明人： Shigeru Mitsui ,  Takuji Sonoda ,  Teruyuki Shimura ,  Saburo Takamiya

IPC分类号： H01L21/331 ,  H01L21/8222 ,  H01L27/06 ,  H01L29/08 ,  H01L29/205 ,  H01L29/73 ,  H01L29/737 ,  H01L29/00 ,  H01L31/0328

CPC分类号： H01L29/0817 ,  H01L27/0658 ,  H01L29/7304 ,  H01L29/7371

摘要： A bipolar transistor circuit element includes a semiconductor substrate; successively disposed on the substrate, a base layer, an emitter layer, and a collector layer; a bipolar transistor formed from parts of the collector, base, and emitter layers and including a base electrode electrically connected to the base layer and a base electrode pad for making an external connection to the base layer; a base ballasting resistor formed from a part of the base layer isolated from the bipolar transistor and electrically connecting the base electrode to the base electrode pad; and a base parallel capacitor connected in parallel with the base ballasting resistor wherein the base parallel capacitor includes part of the base input pad, a dielectric film disposed on part of the base electrode pad, and a second electrode disposed on the dielectric layer opposite the base electrode pad and electrically connected to the emitter electrode of the bipolar transistor. The base ballasting resistor has a high resistance relative to an emitter ballasting reactor so that it can be easily mass produced with good uniformity and yield.

摘要翻译： 双极晶体管电路元件包括半导体衬底; 依次设置在基板上，基底层，发射极层和集电极层; 由集电极，基极和发射极层的部分形成的双极性晶体管，并且包括电连接到基极层的基极和用于与基极层进行外部连接的基极焊盘; 由与所述双极型晶体管隔离的所述基极层的一部分形成的基极保护电阻器，并且将所述基极电极与所述基极电极焊盘电连接; 以及与所述基极镇流电阻并联连接的基极并联电容器，其中所述基极并联电容器包括所述基极输入焊盘的一部分，设置在所述基极电极焊盘的一部分上的电介质膜，以及设置在与所述基极相对的所述电介质层上的第二电极 电极焊盘并电连接到双极晶体管的发射极。 碱性镇流电阻器相对于发射极压载反应器具有高电阻，使得其可以容易地以均匀性和产率良好地批量生产。

公开(公告)号：US5357121A

公开(公告)日：1994-10-18

申请号：US944981

申请日：1992-09-15

申请人： Miyo Miyashita ,  Takayuki Katoh ,  Teruyuki Shimura ,  Kazuhiko Nakahara

发明人： Miyo Miyashita ,  Takayuki Katoh ,  Teruyuki Shimura ,  Kazuhiko Nakahara

IPC分类号： G02B6/13 ,  H01L27/06 ,  H01L27/14 ,  H01L27/144 ,  H01L31/10 ,  H01L29/161 ,  H01L29/205 ,  H01L29/225 ,  H01L33/00

CPC分类号： H01L27/1443 ,  H01L27/0694

摘要： An optoelectronic integrated circuit includes a light responsive element for converting an optical signal into an electrical signal and an electronic circuit for processing the electrical signal. The light responsive element is disposed on a first surface of a substrate and includes p side electrodes and n side electrodes alternatingly arranged parallel to each other. The electronic circuit is disposed on a second surface of the substrate. The light responsive element is electrically connected to the electronic circuit by a via hole penetrating the substrate. In this structure, light incident on the first surface is almost completely absorbed by the substrate and hardly reaches the electronic circuit on the second surface. Therefore, variations in operation of the electronic circuit, such as an increase in drain current, are reduced. In addition, since the degree of freedom in arranging these elements on both surfaces of the substrate is increased, high-density integration is achieved, resulting in a small-sized IC chip.

摘要翻译： 光电集成电路包括用于将光信号转换成电信号的光响应元件和用于处理电信号的电子电路。 光响应元件设置在基板的第一表面上，并且包括彼此平行地交替布置的p侧电极和n侧电极。 电子电路设置在基板的第二表面上。 光响应元件通过穿透基板的通孔电连接到电子电路。 在该结构中，入射到第一表面的光几乎完全被基板吸收，并且几乎不到达第二表面上的电子电路。 因此，减小了电子电路的工作变化，例如漏极电流的增加。 此外，由于在衬底的两个表面上布置这些元件的自由度增加，所以实现了高密度的集成，导致了小尺寸的IC芯片。

公开(公告)号：US5163169A

公开(公告)日：1992-11-10

申请号：US455134

申请日：1989-12-22

申请人： Kousei Maemura ,  Teruyuki Shimura ,  Hiroaki Seki

发明人： Kousei Maemura ,  Teruyuki Shimura ,  Hiroaki Seki

IPC分类号： H03L7/18 ,  H03B1/04 ,  H03B19/14 ,  H03K21/00

CPC分类号： H03B19/14 ,  H03B2200/0022 ,  H03B2200/0028 ,  H03B2200/009 ,  H03B2202/01 ,  H03B2202/042 ,  H03B2202/06

摘要： A frequency divider circuit including a field effect transistor on a semi-insulating substrate including applying a voltage higher than the lowest of the power supply voltages of the frequency divider circuit to the semi-insulating substrate.