公开(公告)号：US08592947B2

公开(公告)日：2013-11-26

申请号：US12962722

申请日：2010-12-08

申请人： Joseph M. Lukaitis ,  Deborah M. Massey ,  Timothy D. Sullivan ,  Ping-Chuan Wang ,  Kimball M. Watson

发明人： Joseph M. Lukaitis ,  Deborah M. Massey ,  Timothy D. Sullivan ,  Ping-Chuan Wang ,  Kimball M. Watson

IPC分类号： H01L23/36

CPC分类号： H01L28/20 ,  H01L23/3677 ,  H01L23/5228 ,  H01L27/0211 ,  H01L28/24 ,  H01L2924/0002 ,  H01L2924/00

摘要： A structure and method of fabricating the structure includes a semiconductor substrate having a top surface defining a horizontal direction and a plurality of interconnect levels stacked from a lowermost level proximate the top surface of the semiconductor substrate to an uppermost level furthest from the top surface. Each of the interconnect levels include vertical metal conductors physically connected to one another in a vertical direction perpendicular to the horizontal direction. The vertical conductors in the lowermost level being physically connected to the top surface of the substrate, and the vertical conductors forming a heat sink connected to the semiconductor substrate. A resistor is included in a layer immediately above the uppermost level. The vertical conductors being aligned under a downward vertical resistor footprint of the resistor, and each interconnect level further include horizontal metal conductors positioned in the horizontal direction and being connected to the vertical conductors.

摘要翻译： 制造该结构的结构和方法包括：半导体衬底，其具有限定水平方向的顶表面和从最接近半导体衬底的顶表面的最底层到距离顶表面最远的最高水平层叠的多个互连层。 每个互连层包括在垂直于水平方向的垂直方向上彼此物理连接的垂直金属导体。 最底层的垂直导体物理地连接到衬底的顶表面，垂直导体形成连接到半导体衬底的散热片。 一个电阻器被包含在最上层的上方的层中。 垂直导体在电阻器的向下垂直电阻器占位面下对准，并且每个互连级别还包括位于水平方向上并且连接到垂直导体的水平金属导体。

公开(公告)号：US08541864B2

公开(公告)日：2013-09-24

申请号：US13588218

申请日：2012-08-17

申请人： Joseph M. Lukaitis ,  Jed H. Rankin ,  Robert R. Robison ,  Dustin K. Slisher ,  Timothy D. Sullivan

发明人： Joseph M. Lukaitis ,  Jed H. Rankin ,  Robert R. Robison ,  Dustin K. Slisher ,  Timothy D. Sullivan

IPC分类号： H01L29/02

CPC分类号： H01L27/1203 ,  H01L28/20

摘要： A method of forming a semiconductor structure includes forming a resistor on an insulator layer over a substrate, and forming at least one dielectric layer over the resistor. The method also includes forming a substrate contact through the at least one dielectric layer, through the resistor, through the insulator layer, and into the substrate. The substrate contact comprises a high thermal conductivity material.

摘要翻译： 形成半导体结构的方法包括在衬底上的绝缘体层上形成电阻器，并且在电阻器上方形成至少一个电介质层。 所述方法还包括通过所述至少一个电介质层，通过所述电阻器，穿过所述绝缘体层，并进入所述衬底形成衬底接触。 衬底接触包括高导热性材料。

公开(公告)号：US20130234315A1

公开(公告)日：2013-09-12

申请号：US13414877

申请日：2012-03-08

申请人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  Timothy D. Sullivan

发明人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  Timothy D. Sullivan

IPC分类号： H01L23/498 ,  H01L21/768

CPC分类号： H01L22/30 ,  H01L22/12 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/94 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05552 ,  H01L2224/05558 ,  H01L2224/05568 ,  H01L2224/05584 ,  H01L2224/05655 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13023 ,  H01L2224/13028 ,  H01L2224/13111 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/3841 ,  H01L2224/11 ,  H01L2924/01074 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/05599 ,  H01L2924/01047 ,  H01L2924/01029

摘要： Structures and methods for detecting solder wetting of pedestal sidewalls. The structure includes a semiconductor wafer having an array of integrated circuit chips, each of the integrated circuit chips having an array of chip pedestals having respective chip solder columns on top of the chip pedestals, the pedestals spaced apart a first distance in a first direction and a spaced apart second distance in second direction perpendicular to the first direction; and at least one monitor structure disposed in different regions of the wafer from the integrated circuit chips, the monitor structure comprising at least a first pedestal and a first solder column on a top surface of the first pedestal and a second pedestal and a second solder column on a top surface of the second pedestal, the first and the second pedestals spaced apart a third distance, the third distance less than the first and the second distances.

摘要翻译： 用于检测基座侧壁焊料润湿的结构和方法。 该结构包括具有集成电路芯片阵列的半导体晶片，每个集成电路芯片具有芯片基座阵列，其具有位于芯片基座顶部的相应的芯片焊料柱，基座沿第一方向隔开第一距离;以及 在垂直于第一方向的第二方向上间隔开的第二距离; 以及设置在所述晶片与所述集成电路芯片的不同区域中的至少一个监视器结构，所述监视器结构至少包括在所述第一基座的顶表面上的第一基座和第一焊料柱，以及第二基座和第二焊接柱 在第二基座的顶表面上，第一和第二基座间隔第三距离，第三距离小于第一和第二距离。

公开(公告)号：US08513814B2

公开(公告)日：2013-08-20

申请号：US13098816

申请日：2011-05-02

申请人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  Timothy D. Sullivan

发明人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  Timothy D. Sullivan

IPC分类号： H01L23/48

CPC分类号： H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/02126 ,  H01L2224/02141 ,  H01L2224/02145 ,  H01L2224/0401 ,  H01L2224/05018 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05664 ,  H01L2224/061 ,  H01L2224/13006 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13027 ,  H01L2224/131 ,  H01L2224/141 ,  H01L2224/14104 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/05552

摘要： Structures are provided with raised buffer pads for solder bumps. Methods are also provided for forming the raised buffer pads for solder bumps. The method includes forming a raised localized buffer pad structure on a tensile side of a last metal layer of a solder bump connection. The raised localized buffer pad structure increases a height of a portion of a pad structure of the solder bump connection with respect to a compressive side of the last metal layer.

摘要翻译： 结构提供有用于焊料凸块的凸起缓冲垫。 还提供了用于形成用于焊料凸块的凸起缓冲垫的方法。 该方法包括在焊料凸块连接的最后金属层的拉伸侧上形成升高的局部缓冲垫结构。 凸起的局部缓冲垫结构相对于最后一个金属层的压缩侧增加焊料凸块连接的焊盘结构的一部分的高度。

公开(公告)号：US20130200521A1

公开(公告)日：2013-08-08

申请号：US13367895

申请日：2012-02-07

申请人： Hanyi Ding ,  Jeffrey P. Gambino ,  Zhong-Xiang He ,  Alvin J. Joseph ,  Anthony K. Stamper ,  Timothy D. Sullivan

发明人： Hanyi Ding ,  Jeffrey P. Gambino ,  Zhong-Xiang He ,  Alvin J. Joseph ,  Anthony K. Stamper ,  Timothy D. Sullivan

IPC分类号： H01L23/485 ,  H01L21/768

CPC分类号： H01L23/5227 ,  H01L23/5283 ,  H01L23/53223 ,  H01L23/645 ,  H01L23/66 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01L2924/00

摘要： Back-end-of-line (BEOL) wiring structures and inductors, methods for fabricating BEOL wiring structures and inductors, and design structures for a BEOL wiring structure or an inductor. A feature, which may be a trench or a wire, is formed that includes a sidewall intersecting a top surface of a dielectric layer. A surface layer is formed on the sidewall of the feature. The surface layer is comprised of a conductor and has a thickness selected to provide a low resistance path for the conduction of a high frequency signal.

摘要翻译： 后端（BEOL）布线结构和电感器，BEOL布线结构和电感器的制造方法以及BEOL布线结构或电感器的设计结构。 形成可以是沟槽或导线的特征，其包括与电介质层的顶表面相交的侧壁。 表面层形成在特征的侧壁上。 表面层由导体构成，其厚度被选择为提供用于传导高频信号的低电阻路径。

公开(公告)号：US20120280399A1

公开(公告)日：2012-11-08

申请号：US13098816

申请日：2011-05-02

申请人： Timothy H. DAUBENSPECK ,  Jeffrey P. GAMBINO ,  Christopher D. MUZZY ,  Wolfgang SAUTER ,  Timothy D. SULLIVAN

发明人： Timothy H. DAUBENSPECK ,  Jeffrey P. GAMBINO ,  Christopher D. MUZZY ,  Wolfgang SAUTER ,  Timothy D. SULLIVAN

IPC分类号： H01L23/48 ,  H01L21/60

CPC分类号： H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/02126 ,  H01L2224/02141 ,  H01L2224/02145 ,  H01L2224/0401 ,  H01L2224/05018 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05664 ,  H01L2224/061 ,  H01L2224/13006 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13027 ,  H01L2224/131 ,  H01L2224/141 ,  H01L2224/14104 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/05552

摘要： Structures are provided with raised buffer pads for solder bumps. Methods are also provided for forming the raised buffer pads for solder bumps. The method includes forming a raised localized buffer pad structure on a tensile side of a last metal layer of a solder bump connection. The raised localized buffer pad structure increases a height of a portion of a pad structure of the solder bump connection with respect to a compressive side of the last metal layer.

摘要翻译： 结构提供有用于焊料凸块的凸起缓冲垫。 还提供了用于形成用于焊料凸块的凸起缓冲垫的方法。 该方法包括在焊料凸块连接的最后金属层的拉伸侧上形成升高的局部缓冲垫结构。 凸起的局部缓冲垫结构相对于最后一个金属层的压缩侧增加焊料凸块连接的焊盘结构的一部分的高度。

公开(公告)号：US20120184080A1

公开(公告)日：2012-07-19

申请号：US13008465

申请日：2011-01-18

申请人： Joseph M. LUKAITIS ,  Jed H. RANKIN ,  Robert R. ROBISON ,  Dustin K. SLISHER ,  Timothy D. SULLIVAN

发明人： Joseph M. LUKAITIS ,  Jed H. RANKIN ,  Robert R. ROBISON ,  Dustin K. SLISHER ,  Timothy D. SULLIVAN

IPC分类号： H01L21/20

CPC分类号： H01L27/1203 ,  H01L28/20

摘要： A method of forming a semiconductor structure includes forming a resistor on an insulator layer over a substrate, and forming at least one dielectric layer over the resistor. The method also includes forming a substrate contact through the at least one dielectric layer, through the resistor, through the insulator layer, and into the substrate. The substrate contact comprises a high thermal conductivity material.

公开(公告)号：US20120181663A1

公开(公告)日：2012-07-19

申请号：US13008459

申请日：2011-01-18

申请人： Joseph M. LUKAITIS ,  Jed H. RANKIN ,  Robert R. ROBISON ,  Dustin K. SLISHER ,  Timothy D. SULLIVAN

发明人： Joseph M. LUKAITIS ,  Jed H. RANKIN ,  Robert R. ROBISON ,  Dustin K. SLISHER ,  Timothy D. SULLIVAN

IPC分类号： H01L29/8605 ,  H01L21/02

CPC分类号： H01L28/20 ,  H01L27/0207 ,  H01L27/1203

摘要： A method of forming a semiconductor structure includes forming a resistor on an insulator layer over a substrate and forming a trench in the resistor and into the substrate. The method also includes forming a liner on sidewalls of the trench and forming a core comprising a high thermal conductivity material in the trench and on the liner.

摘要翻译： 形成半导体结构的方法包括在衬底上的绝缘体层上形成电阻器，并在电阻器中形成沟槽并进入衬底。 该方法还包括在沟槽的侧壁上形成衬垫，并在沟槽和衬垫上形成包括高导热性材料的芯。

公开(公告)号：US08198133B2

公开(公告)日：2012-06-12

申请号：US12458441

申请日：2009-07-13

申请人： Timothy H. Daubenspeck ,  Paul Fortier ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  David L. Questad ,  Wolfgang Sauter ,  Timothy D. Sullivan

发明人： Timothy H. Daubenspeck ,  Paul Fortier ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  David L. Questad ,  Wolfgang Sauter ,  Timothy D. Sullivan

IPC分类号： H01L21/00

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/13 ,  H01L2224/02125 ,  H01L2224/03005 ,  H01L2224/0401 ,  H01L2224/05011 ,  H01L2224/05016 ,  H01L2224/05019 ,  H01L2224/05027 ,  H01L2224/05552 ,  H01L2224/05563 ,  H01L2224/05572 ,  H01L2224/10126 ,  H01L2224/1147 ,  H01L2224/131 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： Controlled collapse chip connection (C4) structures and methods of manufacture, and more specifically to structures and methods to improve lead-free C4 interconnect reliability. A structure includes a ball limited metallization (BLM) layer and a controlled collapse chip connection (C4) solder ball formed on the BLM layer. Additionally, the structure includes a final metal pad layer beneath the BLM layer and a cap layer beneath the final metal pad layer. Furthermore, the structure includes an air gap formed beneath the C4 solder ball between the final metal pad layer and one of the BLM layer and the cap layer.

摘要翻译： 控制崩溃芯片连接（C4）结构和制造方法，更具体地说是提高无铅C4互连可靠性的结构和方法。 一种结构包括球限制金属化（BLM）层和形成在BLM层上的受控崩溃芯片连接（C4）焊球。 此外，该结构包括在BLM层下面的最终金属垫层和在最终金属垫层下面的盖层。 此外，该结构包括在最终金属焊盘层和BLM层和盖层之一内的C4焊球之下形成的气隙。

公开(公告)号：US08138602B2

公开(公告)日：2012-03-20

申请号：US12885709

申请日：2010-09-20

申请人： Timothy Harrison Daubenspeck ,  Timothy D. Sullivan

发明人： Timothy Harrison Daubenspeck ,  Timothy D. Sullivan

IPC分类号： H01L23/498

CPC分类号： H01L23/488 ,  H01L24/05 ,  H01L24/13 ,  H01L24/45 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05022 ,  H01L2224/05541 ,  H01L2224/05557 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/13007 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45147 ,  H01L2224/48824 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/207 ,  H01L2924/00 ,  H01L2224/05552

摘要： Structure and methods of making the structures. The structures include a structure, comprising: an organic dielectric passivation layer extending over a substrate; an electrically conductive current spreading pad on a top surface of the organic dielectric passivation layer; an electrically conductive solder bump pad comprising one or more layers on a top surface of the current spreading pad; and an electrically conductive solder bump containing tin, the solder bump on a top surface of the solder bump pad, the current spreading pad comprising one or more layers, at least one of the one or more layers consisting of a material that will not form an intermetallic with tin or at least one of the one or more layers is a material that is a diffusion barrier to tin and adjacent to the solder bump pad.

摘要翻译： 制作结构的结构和方法。 所述结构包括结构，包括：在衬底上延伸的有机介电钝化层; 在所述有机介电钝化层的顶表面上的导电电流扩散焊盘; 导电焊料凸块焊盘，其在电流扩散焊盘的顶表面上包括一层或多层; 以及包含锡的导电焊料凸块，所述焊料凸块在所述焊料凸块焊盘的顶表面上，所述电流扩散焊盘包括一个或多个层，所述一个或多个层中的至少一个由不会形成 金属间化合物与锡或一层或多层中的至少一层是对锡的扩散阻挡层并且与焊料凸块相邻的材料。