公开(公告)号：US08441751B1

公开(公告)日：2013-05-14

申请号：US11840682

申请日：2007-08-17

申请人： Hongwei Song ,  Zining Wu ,  Jingfeng Liu ,  Toai Doan

发明人： Hongwei Song ,  Zining Wu ,  Jingfeng Liu ,  Toai Doan

IPC分类号： G11B5/09

CPC分类号： G11B20/10009 ,  G11B20/10037 ,  G11B20/10222 ,  G11B2220/2516

摘要： A receiving device may be configured to derive an oversampled dibit pulse response estimate using symbols sampled at substantially the read channel symbol rate of the receiving device. The receiving device may include a data acquisition circuit configured to digitize data derived from a memory medium, a symbol timing loop and read circuit, as well as a dibit pulse estimation circuit configured to estimate the oversampled dibit pulse response using symbols sampled at the read channel rate of the receiving device without disturbing the symbol timing loop and read circuit.

摘要翻译： 接收设备可以被配置为使用在接收设备的基本读取的信道符号率处采样的符号来导出过采样的双位脉冲响应估计。 接收设备可以包括数据获取电路，其被配置为数字化从存储介质导出的数据，符号定时循环和读取电路，以及配置为使用在读取通道上采样的符号来估计过采样双位脉冲响应的双位脉冲估计电路 接收设备的速率，而不会干扰符号定时循环和读取电路。

公开(公告)号：US07149955B1

公开(公告)日：2006-12-12

申请号：US10074747

申请日：2002-02-11

申请人： Pantas Sutardja ,  Toai Doan

发明人： Pantas Sutardja ,  Toai Doan

IPC分类号： H03M13/00 ,  H03M5/00 ,  H04L1/00

CPC分类号： H03M13/19 ,  H03M13/31 ,  H04L1/0041 ,  H04L1/0054

摘要： A Hamming weight encoder includes an input that receives user data including P symbols and a Hamming weight module that determines a Hamming weight of N of said P symbols. N and P are integers greater than one and N is less than or equal to P. The Hamming weight encoder also includes a comparing module that compares the Hamming weight to a Hamming weight threshold and an inverting module that selectively bitwise inverts bits in said N symbols based on said comparison.

摘要翻译： 汉明权重编码器包括接收包括P符号的用户数据的输入和确定所述P个符号的N的汉明权重的汉明权重模块。 N和P是大于1的整数，N小于或等于P. Hamming权重编码器还包括比较模块，其将汉明权重与汉明权重阈值进行比较，反相模块选择性地将所述N个符号中的比特 基于所述比较。

公开(公告)号：US08359498B1

公开(公告)日：2013-01-22

申请号：US11606510

申请日：2006-11-30

申请人： Pantas Sutardja ,  Toai Doan

发明人： Pantas Sutardja ,  Toai Doan

IPC分类号： G06F11/00 ,  H03M13/00 ,  H04L1/00

CPC分类号： H03M13/19 ,  H03M13/31 ,  H04L1/0041 ,  H04L1/0054

摘要： A method of communicating a bitstream having a characteristic Hamming weight to a destination via a channel comprises determining the characteristic Hamming weight of the bitstream, inverting each bit in the bitstream if the characteristic Hamming weight of the bitstream is below a threshold value and developing an indication of whether the bits in the bitstream are inverted, delivering the bitstream and the indication of whether the bits in the bitstream are inverted to the destination via the channel, and inverting each bit in the bitstream at the destination if the indication indicates that the bits are inverted.

摘要翻译： 经由信道将具有特征汉明权重的比特流传送到目的地的方法包括：如果比特流的特征汉明权重低于阈值，则确定比特流的特征汉明权重，反转比特流中的每个比特，并且开发指示 比特流中的比特是否被反转，传送比特流以及比特流中的比特是否经由信道被反向到目的地的指示，以及如果指示表明比特是比特，则反转比特流中的每个比特 倒。

公开(公告)号：US07535955B1

公开(公告)日：2009-05-19

申请号：US10623031

申请日：2003-07-17

申请人： Pantas Sutardja ,  Toai Doan

发明人： Pantas Sutardja ,  Toai Doan

IPC分类号： H03K5/159

CPC分类号： H04L25/03057 ,  H04L2025/03681

摘要： Methods, algorithms, software, architectures, systems and circuits for targeting certain dominant error types in an adaptive FIR filter and/or signal equalizer. The method and algorithm generally include processing a data sequence in accordance with the adaptive algorithm to produce a processed data sequence, filtering the data sequence to generate a filtered data term for the adaptive algorithm, generating a filtered error term for the adaptive algorithm from at least the processed data sequence, and updating the adaptive algorithm in response to the filtered data and error terms. The architectures generally include an equalizer configured to equalize and/or filter a data sequence and provide an equalized data output, a first filter configured to receive the data sequence and generate a filtered data term for the adaptive algorithm, and an error term circuit configured to receive the equalized data output and provide a filtered error term for the adaptive algorithm.

摘要翻译： 用于针对自适应FIR滤波器和/或信号均衡器中的某些主要误差类型的方法，算法，软件，架构，系统和电路。 所述方法和算法通常包括根据自适应算法处理数据序列以产生经处理的数据序列，对数据序列进行过滤以产生用于自适应算法的滤波数据项，从至少为自适应算法生成滤波误差项 处理的数据序列，以及响应于经滤波的数据和误差项更新自适应算法。 该体系结构通常包括均衡器，其被配置为均衡和/或过滤数据序列并提供均衡的数据输出;第一过滤器，被配置为接收数据序列并为自适应算法生成经滤波的数据项;以及错误项电路，被配置为 接收均衡的数据输出并为自适应算法提供一个滤波的误差项。

公开(公告)号：US08441752B1

公开(公告)日：2013-05-14

申请号：US11844090

申请日：2007-08-23

申请人： Hongwei Song ,  Zining Wu ,  Toai Doan

发明人： Hongwei Song ,  Zining Wu ,  Toai Doan

IPC分类号： G11B5/09

CPC分类号： G11B20/10277 ,  G11B20/10462 ,  G11B2220/2516

摘要： A receiving device may be configured to derive an oversampled dibit pulse response estimate using symbols sampled at substantially the read channel symbol rate of the receiving device. The receiving device may include a data acquisition circuit configured to digitize data derived from a memory medium, as well as a dibit pulse estimation circuit configured to estimate the oversampled dibit pulse response using symbols sampled at the read channel rate of the receiving device.

摘要翻译： 接收设备可以被配置为使用在接收设备的基本读取的信道符号率处采样的符号来导出过采样的双位脉冲响应估计。 接收装置可以包括数据获取电路，其被配置为数字化从存储介质导出的数据，以及双向脉冲估计电路，其被配置为使用在接收装置的读取信道速率采样的符号来估计过采样的双脉冲响应。

公开(公告)号：US07817366B1

公开(公告)日：2010-10-19

申请号：US11799722

申请日：2007-05-02

申请人： Vasudev V. Pai ,  Toai Doan ,  Hongying Sheng

发明人： Vasudev V. Pai ,  Toai Doan ,  Hongying Sheng

IPC分类号： G11B5/35

CPC分类号： G11B20/10009 ,  G11B20/10027 ,  G11B20/10037 ,  G11B20/10055 ,  G11B20/10222 ,  G11B20/10314 ,  G11B20/14 ,  G11B2220/2516 ,  G11B2220/2562

摘要： A read-channel module includes a variable-gain amplifier (VGA) module, an analog-to-digital converter (ADC) module, an amplitude measuring module, a gain adjusting module, and a zero phase start (ZPS) module. The VGA module has a variable gain, amplifies input signals, and generates amplified signals. The ADC module converts the amplified signals from analog to digital format and generates samples. The amplitude measuring module receives N of the samples and measures amplitudes of the N samples, where N is an integer greater than 1. The gain adjusting module communicates with the amplitude measuring module and selectively adjusts the variable gain of the VGA module based on the amplitudes. The zero phase start (ZPS) module communicates with the amplitude measuring module, receives the samples, and selectively generates phase information from the samples based on the amplitudes.

摘要翻译： 读通道模块包括可变增益放大器（VGA）模块，模数转换器（ADC）模块，幅度测量模块，增益调整模块和零相位启动（ZPS）模块。 VGA模块具有可变增益，放大输入信号，并产生放大信号。 ADC模块将放大的信号从模拟转换为数字格式并生成采样。 幅度测量模块接收采样的N个并测量N个采样的振幅，其中N是大于1的整数。增益调节模块与振幅测量模块通信，并根据振幅选择性地调节VGA模块的可变增益 。 零相位启动（ZPS）模块与幅度测量模块通信，接收采样，并根据振幅从采样中选择性地生成相位信息。

公开(公告)号：US07802151B1

公开(公告)日：2010-09-21

申请号：US11606677

申请日：2006-11-30

申请人： Pantas Sutardja ,  Toai Doan

发明人： Pantas Sutardja ,  Toai Doan

IPC分类号： G06F11/00 ,  H03M13/00 ,  H04L1/00

CPC分类号： H03M13/19 ,  H03M13/31 ,  H04L1/0041 ,  H04L1/0054

摘要： A communication decoding method comprises receiving processed binary data including a binary code word and an indication of whether bits of the binary code word are inverted and inverting each bit of the binary code word if the indication indicates that the bits are inverted.

摘要翻译： 一种通信解码方法，包括接收处理后的二进制数据，包括二进制码字和二进制码字的位是否反相，如果该指示表明该位被反转则反转二进制码字的每一位。

公开(公告)号：US07783937B1

公开(公告)日：2010-08-24

申请号：US11606678

申请日：2006-11-30

申请人： Pantas Sutardja ,  Toai Doan

发明人： Pantas Sutardja ,  Toai Doan

IPC分类号： G06F11/00 ,  H03M13/00 ,  H04L1/00

CPC分类号： H03M13/19 ,  H03M13/31 ,  H04L1/0041 ,  H04L1/0054

摘要： A method comprises obtaining a first sequence of binary digits that collectively have a characteristic Hamming weight, inverting each of the binary digits in the first sequence of binary digits if the Hamming weight of the first sequence of binary digits is below a predetermined threshold Hamming weight value, and providing an indication of whether the binary digits in the first sequence of binary digits have been inverted.

摘要翻译： 一种方法包括：如果二进制数字的第一序列的汉明权重低于预定阈值汉明权重值，则获得共同具有特征汉明权重的二进制数字的第一序列，反转第二二进制数位序列中的每个二进制数字 并且提供二进制数字的第一序列中的二进制数字是否已被反转的指示。

公开(公告)号：US07359139B1

公开(公告)日：2008-04-15

申请号：US11656734

申请日：2007-01-22

申请人： Zining Wu ,  Toai Doan

发明人： Zining Wu ,  Toai Doan

IPC分类号： G11B21/02 ,  G11B27/36

CPC分类号： G11B5/6029 ,  G11B5/556 ,  G11B5/6005

摘要： A fly height control system comprises a measurement circuit that measures a first amplitude of a pulse, which is based on a predetermined pattern recorded on a storage medium, at a first predetermined time and second amplitudes of the pulse at respective second predetermined times. A calculation circuit estimates a distance between a head and the storage medium based on a function of the first amplitude and the second amplitudes. A head controller that controls the distance between the head and the storage medium based on the estimate.

摘要翻译： 飞行高度控制系统包括测量电路，其以第一预定时间和相应的第二预定时间的脉冲的第二幅度来测量基于记录在存储介质上的预定模式的脉冲的第一幅度。 计算电路基于第一幅度和第二幅度的函数来估计头与存储介质之间的距离。 基于估计来控制头部和存储介质之间的距离的头部控制器。

公开(公告)号：US08077419B1

公开(公告)日：2011-12-13

申请号：US12906886

申请日：2010-10-18

申请人： Vasudev V. Pai ,  Toai Doan ,  Hongying Sheng

发明人： Vasudev V. Pai ,  Toai Doan ,  Hongying Sheng

IPC分类号： G11B5/35

CPC分类号： G11B20/10009 ,  G11B20/10027 ,  G11B20/10037 ,  G11B20/10055 ,  G11B20/10222 ,  G11B20/10314 ,  G11B20/14 ,  G11B2220/2516 ,  G11B2220/2562

摘要： A read-channel module including a VGA module to amplify a signal based on a variable gain, an ADC module to generate a sample based on the amplified signal, and an AGC module to control the variable gain of the VGA module. A gain adjusting module generates (i) a first gain and (ii) a second gain when an amplitude of the sample is (i) less than or equal to a first predetermined threshold and (ii) greater than or equal to a second predetermined threshold, respectively. The AGC module (i) increases and (ii) decreases the variable gain of the VGA module based on (i) the first gain and (ii) the second gain, respectively. The gain adjusting module generates the first gain and the second gain by (i) multiplying a present gain of the AGC module by a predetermined multiplier or (ii) adding a predetermined offset to the present gain.

摘要翻译： 一个读通道模块，包括一个基于可变增益放大信号的VGA模块，一个基于放大信号产生采样的ADC模块，以及一个控制VGA模块可变增益的AGC模块。 当样本的幅度为（i）小于或等于第一预定阈值时，增益调整模块产生（i）第一增益和（ii）第二增益，以及（ii）大于或等于第二预定阈值 ， 分别。 AGC模块（i）增加并且（ii）分别基于（i）第一增益和（ii）第二增益来降低VGA模块的可变增益。 增益调整模块通过（i）将AGC模块的当前增益乘以预定乘数或（ii）将预定偏移量加到当前增益上来产生第一增益和第二增益。