公开(公告)号：US06740596B2

公开(公告)日：2004-05-25

申请号：US09903244

申请日：2001-07-11

申请人： Takasuke Hayase ,  Hiroaki Tanaka ,  Shusaku Kido ,  Toshihiko Harano

发明人： Takasuke Hayase ,  Hiroaki Tanaka ,  Shusaku Kido ,  Toshihiko Harano

IPC分类号： H01L21302

CPC分类号： H01L29/66765 ,  G02F1/136204 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/41733 ,  H01L29/458 ,  H01L29/78633

摘要： The photolithography processes for connecting the first conductive film pattern, which is a lower layer such as a gate electrode of a TFT, to a second conductive film pattern, which is an upper layer such as a source/drain electrode of a TFT are reduced by utilizing laminated films and a resist pattern formed thereon having different film thicknesses. Laminated films constituting the source/drain electrode are formed by depositing films on an insulating substrate on which the first conductive film pattern is formed, and the resist pattern is formed on the top layer of the laminated films, and then utilizing the film thickness difference of the resist pattern and the film composition of the laminated films, the short circuited wiring between the gate electrode and the source/drain electrode for an Electro-Static-Discharge protection circuit of the active matrix substrate can be formed by less photolithography processes than that in the manufacturing of the conventional active matrix substrate.

摘要翻译： 将作为诸如TFT的栅电极的下层的第一导电膜图案与作为诸如TFT的源/漏电极的上层的第二导电膜图案连接的光刻工艺被减少 利用层叠膜和形成在其上的具有不同膜厚度的抗蚀剂图案。 构成源极/漏极的叠层膜通过在其上形成有第一导电膜图案的绝缘基板上沉积膜形成，并且在层压膜的顶层上形成抗蚀剂图案，然后利用膜厚度差 层叠膜的抗蚀剂图案和膜组成，有源矩阵基板的静电放电保护电路的栅极电极和源极/漏极之间的短路布线可以通过较少的光刻工艺形成， 常规有源矩阵基板的制造。

公开(公告)号：US06890783B2

公开(公告)日：2005-05-10

申请号：US10242011

申请日：2002-09-12

申请人： Shigeru Kimura ,  Takahiko Watanabe ,  Tae Yoshikawa ,  Hiroyuki Uchida ,  Shusaku Kido ,  Shinichi Nakata ,  Tsutomu Hamada ,  Hisanobu Shimodouzono ,  Satoshi Doi ,  Toshihiko Harano ,  Akitoshi Maeda ,  Satoshi Ihida ,  Hiroaki Tanaka ,  Takasuke Hayase ,  Shouichi Kuroha ,  Hirofumi Ihara ,  Kazushige Takechi

发明人： Shigeru Kimura ,  Takahiko Watanabe ,  Tae Yoshikawa ,  Hiroyuki Uchida ,  Shusaku Kido ,  Shinichi Nakata ,  Tsutomu Hamada ,  Hisanobu Shimodouzono ,  Satoshi Doi ,  Toshihiko Harano ,  Akitoshi Maeda ,  Satoshi Ihida ,  Hiroaki Tanaka ,  Takasuke Hayase ,  Shouichi Kuroha ,  Hirofumi Ihara ,  Kazushige Takechi

IPC分类号： G02F1/1343 ,  G02F1/136 ,  G02F1/1368 ,  G09F9/30 ,  H01L21/00 ,  H01L21/3205 ,  H01L21/336 ,  H01L21/84 ,  H01L23/52 ,  H01L29/423 ,  H01L29/43 ,  H01L29/49 ,  H01L29/786 ,  H01L31/036

CPC分类号： G02F1/134363

摘要： An active matrix substrate plate having superior properties is manufactured at high yield using four photolithographic fabrication steps. In step 1, the scanning line and the gate electrode extending from the scanning line are formed in the glass plate. In step 2, the gate insulation layer and the semiconductor layer comprised by amorphous silicon layer and n+ amorphous silicon layer is laminated to provide the semiconductor layer for the TFT section. In step 3, the transparent conductive layer and the metallic layer are laminated, and the signal line, the drain electrode extending from the signal line, the pixel electrode and the source electrode extending from the pixel electrode are formed, and the n+ amorphous silicon layer of the channel gap is removed by etching. In step 4, the protective insulation layer is formed, and the protective insulation layer and the metal layer above the pixel electrode are removed by etching.

摘要翻译： 使用四个光刻制造步骤以高产率制造具有优异性能的有源矩阵基板。 在步骤1中，扫描线和从扫描线延伸的栅电极形成在玻璃板中。 在步骤2中，层叠由非晶硅层和n + +非晶硅层构成的栅绝缘层和半导体层，以提供TFT部分的半导体层。 在步骤3中，层叠透明导电层和金属层，形成信号线，从信号线延伸的漏极，从像素电极延伸的像素电极和源电极， 通过蚀刻除去沟道间隙的+非晶硅层。 在步骤4中，形成保护绝缘层，通过蚀刻除去保护绝缘层和像素电极上方的金属层。

公开(公告)号：US06632696B2

公开(公告)日：2003-10-14

申请号：US09745657

申请日：2000-12-20

申请人： Shigeru Kimura ,  Takahiko Watanabe ,  Tae Yoshikawa ,  Hiroyuki Uchida ,  Shusaku Kido ,  Shinichi Nakata ,  Tsutomu Hamada ,  Hisanobu Shimodouzono ,  Satoshi Doi ,  Toshihiko Harano ,  Akitoshi Maeda ,  Satoshi Ihida ,  Hiroaki Tanaka ,  Takasuke Hayase ,  Shouichi Kuroha ,  Hirofumi Ihara ,  Kazushige Takechi

发明人： Shigeru Kimura ,  Takahiko Watanabe ,  Tae Yoshikawa ,  Hiroyuki Uchida ,  Shusaku Kido ,  Shinichi Nakata ,  Tsutomu Hamada ,  Hisanobu Shimodouzono ,  Satoshi Doi ,  Toshihiko Harano ,  Akitoshi Maeda ,  Satoshi Ihida ,  Hiroaki Tanaka ,  Takasuke Hayase ,  Shouichi Kuroha ,  Hirofumi Ihara ,  Kazushige Takechi

IPC分类号： H01L2100

CPC分类号： G02F1/134363

摘要： An active matrix substrate plate having superior properties is manufactured at high yield using four photolithographic fabrication steps. In step 1, the scanning line and the gate electrode extending from the scanning line are formed in the glass plate. In step 2, the gate insulation layer and the semiconductor layer comprised by amorphous silicon layer and n+ amorphous silicon layer is laminated to provide the semiconductor layer for the TFT section. In step 3, the transparent conductive layer and the metallic layer are laminated, and the signal line, the drain electrode extending from the signal line, the pixel electrode and the source electrode extending from the pixel electrode are formed, and the n+ amorphous silicon layer of the channel gap is removed by etching. In step 4, the protective insulation layer is formed, and the protective insulation layer and the metal layer above the pixel electrode are removed by etching.

摘要翻译： 使用四个光刻制造步骤以高产率制造具有优异性能的有源矩阵基板。 在步骤 1 中，扫描线和从扫描线延伸的栅电极形成在玻璃板中。 在步骤 2 中，将由非晶硅层和n 非晶硅层组成的栅极绝缘层和半导体层层压到 提供TFT部分的半导体层。 在步骤 3 中，层叠透明导电层和金属层，信号线，从信号线延伸的漏电极，像素电极和源电极延伸 形成像素电极，并且通过蚀刻去除通道间隙的n 非晶硅层。 在步骤 4 中，形成保护绝缘层，通过蚀刻去除保护绝缘层和像素电极上方的金属层。