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169 条记录 (耗时 0.023 秒)

    Vertical channel transistor structure and manufacturing method thereof
    1.
    发明授权
    Vertical channel transistor structure and manufacturing method thereof 有权
    垂直沟道晶体管结构及其制造方法

    公开(公告)号：US09246015B2

    公开(公告)日：2016-01-26

    申请号：US12892044

    申请日：2010-09-28

    申请人： Tzu-Hsuan Hsu ,  Yen-Hao Shih ,  Chia-Wei Wu

    发明人： Tzu-Hsuan Hsu ,  Yen-Hao Shih ,  Chia-Wei Wu

    IPC分类号： H01L29/66 ,  H01L29/792 ,  H01L27/115 ,  H01L29/423 ,  H01L27/12

    CPC分类号： H01L29/792 ,  H01L27/115 ,  H01L27/11568 ,  H01L27/1203 ,  H01L29/42352

    摘要： A vertical channel transistor structure is provided. The structure includes a substrate, a channel, a cap layer, a charge trapping layer, a source and a drain. The channel is formed in a fin-shaped structure protruding from the substrate. The cap layer is deposited on the fin-shaped structure. The cap layer and the fin-shaped structure have substantially the same width. The charge trapping layer is deposited on the cap layer and on two vertical surfaces of the fin-shaped structure. The gate is deposited on the charge trapping layer and on two vertical surfaces of the fin-shaped structure. The source and the drain are respectively positioned on two sides of the fin-shaped structure and opposite the gate.

    摘要翻译： 提供了垂直沟道晶体管结构。 该结构包括基板，通道，盖层，电荷捕获层，源极和漏极。 通道形成为从基板突出的鳍状结构。 盖层沉积在鳍状结构上。 盖层和鳍状结构具有基本上相同的宽度。 电荷俘获层沉积在盖层上和鳍状结构的两个垂直表面上。 栅极沉积在电荷捕获层上并在鳍状结构的两个垂直表面上沉积。 源极和漏极分别位于鳍状结构的两侧并与栅极相对。

    Method for making multi-step photodiode junction structure for backside illuminated sensor
    3.
    发明授权
    Method for making multi-step photodiode junction structure for backside illuminated sensor 有权
    背面照明传感器制作多步光电二极管结构的方法

    公开(公告)号：US08785984B2

    公开(公告)日：2014-07-22

    申请号：US13271780

    申请日：2011-10-12

    申请人： Tzu-Hsuan Hsu ,  Dun-Nian Yaung

    发明人： Tzu-Hsuan Hsu ,  Dun-Nian Yaung

    IPC分类号： H01L27/148

    CPC分类号： H01L27/14645 ,  H01L27/1464

    摘要： A method of making a backside illuminated sensor is provided. A substrate is provided and a high energy ion implantation is performed over the substrate to implant a first doped region. A layer is formed over the substrate and a self-align high energy ion implantation is performed over the substrate to implant a second doped region over the first doped region. The combined thickness of the first and second doped region is greater than 50 percent of thickness of the substrate and the distance between back surface of the substrate and the first and second doped regions is less than 50 percent of thickness of the substrate. In this way, an enlarged light sensing region is formed through which electrons generated from back surface of the surface may easily reach the pixel.

    摘要翻译： 提供制造背面照明传感器的方法。 提供衬底并且在衬底上执行高能离子注入以注入第一掺杂区域。 在衬底上形成层，并在衬底上执行自对准高能离子注入，以在第一掺杂区域上注入第二掺杂区域。 第一和第二掺杂区域的组合厚度大于衬底的厚度的50％，并且衬底的背表面与第一和第二掺杂区域之间的距离小于衬底厚度的50％。 以这种方式，形成放大的光感测区域，通过该放大的光感测区域从表面的后表面产生的电子可以容易地到达像素。

    Vertical channel memory and manufacturing method thereof and operating method using the same
    4.
    发明授权
    Vertical channel memory and manufacturing method thereof and operating method using the same 有权
    垂直通道存储器及其制造方法及其使用方法

    公开(公告)号：US08772858B2

    公开(公告)日：2014-07-08

    申请号：US11785322

    申请日：2007-04-17

    申请人： Tzu-Hsuan Hsu ,  Hang-Ting Lue

    发明人： Tzu-Hsuan Hsu ,  Hang-Ting Lue

    IPC分类号： H01L29/66

    CPC分类号： H01L29/66833 ,  G11C16/0466 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/785 ,  H01L29/792

    摘要： A vertical channel memory including a substrate, a channel, a multi-layer structure, a gate, a first terminal and a second terminal is provided. The channel protrudes from the substrate and has a top surface and two vertical surfaces. The multi-layer structure is disposed on the two vertical surfaces of the channel. The gate straddling multi-layer structure is positioned above the two vertical surfaces of the channel. The first terminal and the second terminal are respectively positioned at two sides of the channel opposing to the gate.

    摘要翻译： 提供了包括基板，通道，多层结构，栅极，第一端子和第二端子的垂直沟道存储器。 该通道从基板突出并且具有顶表面和两个垂直表面。 多层结构设置在通道的两个垂直表面上。 跨越多层结构的栅极位于通道的两个垂直表面上方。 第一端子和第二端子分别位于与栅极相对的通道的两侧。

    Vertically integrated image sensor chips and methods for forming the same
    5.
    发明授权
    Vertically integrated image sensor chips and methods for forming the same 有权
    垂直集成的图像传感器芯片及其形成方法

    公开(公告)号：US08766387B2

    公开(公告)日：2014-07-01

    申请号：US13475301

    申请日：2012-05-18

    申请人： Jeng-Shyan Lin ,  Feng-Chi Hung ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Szu-Ying Chen ,  Wen-De Wang ,  Tzu-Hsuan Hsu

    发明人： Jeng-Shyan Lin ,  Feng-Chi Hung ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Szu-Ying Chen ,  Wen-De Wang ,  Tzu-Hsuan Hsu

    IPC分类号： H01L31/02

    CPC分类号： H01L27/14687 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14685 ,  H01L27/1469 ,  H01L2224/48463

    摘要： A device includes a Backside Illumination (BSI) image sensor chip, which includes an image sensor disposed on a front side of a first semiconductor substrate, and a first interconnect structure including a plurality of metal layers on the front side of the first semiconductor substrate. A device chip is bonded to the image sensor chip. The device chip includes an active device on a front side of a second semiconductor substrate, and a second interconnect structure including a plurality of metal layers on the front side of the second semiconductor substrate. A first via penetrates through the BSI image sensor chip to connect to a first metal pad in the second interconnect structure. A second via penetrates through a dielectric layer in the first interconnect structure to connect to a second metal pad in the first interconnect structure, wherein the first via and the second via are electrically connected.

    摘要翻译： 一种装置包括背面照明（BSI）图像传感器芯片，其包括设置在第一半导体衬底的前侧上的图像传感器，以及包括在第一半导体衬底的前侧上的多个金属层的第一互连结构。 器件芯片被结合到图像传感器芯片。 器件芯片包括在第二半导体衬底的正面上的有源器件和在第二半导体衬底的正面上包括多个金属层的第二互连结构。 第一通孔穿过BSI图像传感器芯片以连接到第二互连结构中的第一金属焊盘。 第二通孔穿过第一互连结构中的电介质层，以连接到第一互连结构中的第二金属焊盘，其中第一通孔和第二通孔电连接。

    Novel [N] Profile in Si-Ox Interface for CMOS Image Sensor Performance Improvement
    8.
    发明申请
    Novel [N] Profile in Si-Ox Interface for CMOS Image Sensor Performance Improvement 审中-公开
    用于CMOS图像传感器性能改进的Si-Ox接口中的新型[N]配置文件

    公开(公告)号：US20130341692A1

    公开(公告)日：2013-12-26

    申请号：US13601033

    申请日：2012-08-31

    申请人： Hsiao-Hui Tseng ,  Jen-Cheng Liu ,  Dun-Nian Yaung ,  Tzu-Hsuan Hsu

    发明人： Hsiao-Hui Tseng ,  Jen-Cheng Liu ,  Dun-Nian Yaung ,  Tzu-Hsuan Hsu

    IPC分类号： H01L27/146 ,  H01L21/8238

    CPC分类号： H01L27/14603 ,  H01L27/1463 ,  H01L27/14643 ,  H01L29/513 ,  H01L29/518

    摘要： A semiconductor device including first and second isolation regions supported by a substrate, a first array well supported by the first isolation region, the first array well having a first field implant layer embedded therein, the first field implant layer surrounding a first shallow trench isolation region, a second array well supported by the second isolation region, the second array well supporting a doped region and a drain and having a second field implant layer embedded therein, the second field implant layer surrounding a second shallow trench isolation region, a stack of photodiodes disposed in the substrate between the first and second isolation regions, and a gate oxide formed over an uppermost photodiode of the stack of the photodiodes, the gate oxide and a silicon of the uppermost photodiode forming an interface, a nitrogen concentration at the interface offset from a peak nitrogen concentration.

    摘要翻译： 一种半导体器件，包括由衬底支撑的第一和第二隔离区域，由第一隔离区域良好地支撑的第一阵列，第一阵列阱具有嵌入其中的第一场注入层，第一场注入层围绕第一浅沟槽隔离区域 ，由第二隔离区域良好支撑的第二阵列，第二阵列阱支撑掺杂区域和漏极，并且具有嵌入其中的第二场注入层，第二场注入层围绕第二浅沟槽隔离区域，一叠光电二极管 设置在第一和第二隔离区域之间的衬底中，以及形成在光电二极管的堆叠的最上面的光电二极管上的栅极氧化物，栅极氧化物和最上面的光电二极管的硅形成界面，界面处的氮浓度偏离 氮浓度峰值。

    Image sensor element for backside-illuminated sensor
    10.
    发明授权
    Image sensor element for backside-illuminated sensor 有权
    用于背面照明传感器的图像传感器元件

    公开(公告)号：US08324002B2

    公开(公告)日：2012-12-04

    申请号：US13206228

    申请日：2011-08-09

    申请人： Tzu-Hsuan Hsu ,  Dun-Nian Yaung ,  Ching-Chun Wang

    发明人： Tzu-Hsuan Hsu ,  Dun-Nian Yaung ,  Ching-Chun Wang

    IPC分类号： H01L31/0232

    CPC分类号： H01L27/14625 ,  H01L27/14603 ,  H01L27/1464

    摘要： Provided is a method of forming and/or using a backside-illuminated sensor including a semiconductor substrate having a front surface and a back surface. A transfer transistor and a photodetector are formed on the front surface. The gate of the transfer transistor includes an optically reflective layer. The gate of the transfer transistor, including the optically reflective layer, overlies the photodetector. Radiation incident the back surface and tratversing the photodetector may be reflected by the optically reflective layer. The reflected radiation may be sensed by the photodetector.

    摘要翻译： 提供一种形成和/或使用背面照射传感器的方法，该传感器包括具有前表面和后表面的半导体衬底。 传输晶体管和光电检测器形成在前表面上。 转移晶体管的栅极包括光反射层。 包括光反射层的传输晶体管的栅极覆盖在光电检测器上。 入射到背面的光线和扫描光电检测器的辐射可以被光反射层反射。 可以由光电检测器感测反射的辐射。