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    COMMUNICATION DEVICE AND METHOD FOR PERFORMING RADIO COMMUNICATION
    2.
    发明申请
    COMMUNICATION DEVICE AND METHOD FOR PERFORMING RADIO COMMUNICATION 审中-公开
    用于无线电通信的通信设备和方法

    公开(公告)号：US20140349584A1

    公开(公告)日：2014-11-27

    申请号：US14062982

    申请日：2013-10-25

    Applicant: Thorsten Clevorn ,  Pablo Herrero ,  Uri Perlmutter ,  Ronen Kronfeld

    Inventor： Thorsten Clevorn ,  Pablo Herrero ,  Uri Perlmutter ,  Ronen Kronfeld

    IPC: H04B7/04

    CPC classification number: H04B7/0486 ,  H04B7/04 ,  H04B7/0689 ,  H04B7/0693 ,  H04B7/0871 ,  H04B7/0877 ,  H04L5/0023 ,  H04W72/046 ,  H04W72/085 ,  H04W88/06

    Abstract: A communication device is described comprising a first antenna, a second antenna and a third antenna; a first transceiver configured to communicate using at least the first antenna; a second transceiver configured to communicate using at least the second antenna; and a controller configured to determine whether the third antenna is to be used by the first transceiver or the second transceiver based on a selection criterion and configured to control the first transceiver to communicate using the first antenna and the third antenna if the controller has determined that the third antenna is to be used by the first transceiver and to control the second transceiver to communicate using the second antenna and the third antenna if the controller has determined that the third antenna is to be used by the second transceiver.

    Abstract translation: 描述了包括第一天线，第二天线和第三天线的通信设备; 配置为使用至少所述第一天线进行通信的第一收发器; 配置为使用至少所述第二天线进行通信的第二收发器; 以及控制器，被配置为基于选择标准来确定所述第三天线是否被所述第一收发器或所述第二收发器使用，并且被配置为如果所述控制器已经确定所述第一天线和所述第三天线 第三天线将被第一收发器使用，并且如果控制器已经确定第三天线将被第二收发器使用，则控制第二收发器使用第二天线和第三天线进行通信。

    Selective activation of programming schemes in analog memory cell arrays
    3.
    发明授权
    Selective activation of programming schemes in analog memory cell arrays 有权
    在模拟存储单元阵列中选择性地激活编程方案

    公开(公告)号：US08879294B2

    公开(公告)日：2014-11-04

    申请号：US13532700

    申请日：2012-06-25

    Applicant: Dotan Sokolov ,  Naftali Sommer ,  Uri Perlmutter ,  Ofir Shalvi

    Inventor： Dotan Sokolov ,  Naftali Sommer ,  Uri Perlmutter ,  Ofir Shalvi

    IPC: G11C27/00 ,  G11C11/56 ,  G11C7/02 ,  G11C16/34

    CPC classification number: G11C27/005 ,  G11C7/02 ,  G11C11/5628 ,  G11C16/3418

    Abstract: A method for data storage includes defining a first programming scheme that programs a group of analog memory cells while reducing interference caused by at least one memory cell that neighbors the group, and a second programming scheme that programs the group of the analog memory cells and does not reduce all of the interference reduced by the first programming scheme. One of the first and second programming schemes is selected based on a criterion defined with respect to the analog memory cells. Data is stored in the group of the analog memory cells using the selected programming scheme.

    Abstract translation: 一种用于数据存储的方法包括：定义第一编程方案，其编程一组模拟存储器单元，同时减少由与该组相邻的至少一个存储器单元引起的干扰;以及第二编程方案，其对该组模拟存储器单元进行编程 不能减少第一编程方案减少的所有干扰。 基于针对模拟存储器单元定义的标准来选择第一和第二编程方案之一。 使用所选择的编程方案将数据存储在模拟存储器单元的组中。

    Efficient re-read operations in analog memory cell arrays
    4.
    发明授权
    Efficient re-read operations in analog memory cell arrays 有权
    模拟存储单元阵列中的高效重读操作

    公开(公告)号：US08782497B2

    公开(公告)日：2014-07-15

    申请号：US13523421

    申请日：2012-06-14

    Applicant: Uri Perlmutter ,  Naftali Sommer ,  Ofir Shalvi

    Inventor： Uri Perlmutter ,  Naftali Sommer ,  Ofir Shalvi

    IPC: H03M13/00 ,  G08C25/02 ,  H04L1/18

    CPC classification number: G06F11/10 ,  G06F11/1008 ,  G06F11/1068 ,  G11C2029/0411 ,  H03M13/00 ,  H03M13/3761

    Abstract: A method for data storage includes storing data, which is encoded with an Error Correction Code (ECC), in a group of analog memory cells by writing respective first storage values to the memory cells in the group. After storing the data, respective second storage values are read from the memory cells in the group, and the read second storage values are processed so as to decode the ECC. Responsively to a failure in decoding the ECC, one or more of the second storage values that potentially caused the failure are identified as suspect storage values. Respective third storage values are re-read from a subset of the memory cells that includes the memory cells holding the suspect storage values. The ECC is re-decoded using the third storage values so as to reconstruct the stored data.

    Abstract translation: 一种用于数据存储的方法包括通过将相应的第一存储值写入组中的存储器单元来将经错误校正码（ECC）编码的数据存储在一组模拟存储器单元中。 在存储数据之后，从组中的存储器单元读取相应的第二存储值，并且处理读取的第二存储值以便对ECC进行解码。 响应于对ECC的解码失败，可​​能导致故障的一个或多个第二存储值被识别为可疑存储值。 从包含存储可疑存储值的存储单元的存储器单元的子集重新读取相应的第三存储值。 使用第三存储值对ECC进行重新解码，以重建存储的数据。

    Data scrambling in memory devices
    6.
    发明授权
    Data scrambling in memory devices 有权
    存储设备中的数据加扰

    公开(公告)号：US08713330B1

    公开(公告)日：2014-04-29

    申请号：US12607078

    申请日：2009-10-28

    Applicant: Naftali Sommer ,  Micha Anholt ,  Oren Golov ,  Uri Perlmutter ,  Shai Winter

    Inventor： Naftali Sommer ,  Micha Anholt ,  Oren Golov ,  Uri Perlmutter ,  Shai Winter

    IPC: H04L9/00 ,  G06F15/16

    CPC classification number: G06F11/1048

    Abstract: A method for data storage includes scrambling data for storage in a memory device using a given scrambling seed. A statistical distribution of the scrambled data is assessed, and a measure of randomness of the statistical distribution is computed. A scrambling configuration of the data is modified responsively to the measure of randomness, and the data having the modified scrambling configuration is stored in the memory device.

    Abstract translation: 一种用于数据存储的方法包括使用给定的加扰种子对存储在存储设备中的数据进行加扰。 评估加扰数据的统计分布，并计算统计分布的随机性度量。 响应于随机性的度量修改数据的加扰配置，并且具有修改的加扰配置的数据被存储在存储器件中。

    Programming orders for reducing distortion based on neighboring rows
    7.
    发明授权
    Programming orders for reducing distortion based on neighboring rows 有权
    用于减少基于相邻行的失真的编程命令

    公开(公告)号：US08437185B2

    公开(公告)日：2013-05-07

    申请号：US13412731

    申请日：2012-03-06

    Applicant: Ofir Shalvi ,  Eyal Gurgi ,  Uri Perlmutter ,  Oren Golov

    Inventor： Ofir Shalvi ,  Eyal Gurgi ,  Uri Perlmutter ,  Oren Golov

    IPC: G11C11/34

    CPC classification number: G11C16/3418 ,  G11C11/56 ,  G11C16/04 ,  G11C27/005 ,  G11C2211/5641

    Abstract: A method for data storage includes predefining an order of programming a plurality of analog memory cells that are arranged in rows. The order specifies that for a given row having neighboring rows on first and second sides, the memory cells in the given row are programmed only while the memory cells in the neighboring rows on at least one of the sides are in an erased state, and that the memory cells in the given row are programmed to assume a highest programming level, which corresponds to a largest analog value among the programming levels of the cells, only after programming all the memory cells in the given row to assume the programming levels other than the highest level. Data is stored in the memory cells by programming the memory cells in accordance with the predefined order.

    Abstract translation: 一种用于数据存储的方法包括预先定义以行排列的多个模拟存储器单元的编程顺序。 该顺序指定对于在第一和第二侧具有相邻行的给定行，只有当至少一个侧面上的相邻行中的存储器单元处于擦除状态时，给定行中的存储器单元被编程，并且该 给定行中的存储器单元被编程为假设最高编程电平，其对应于单元的编程电平中的最大模拟值，只有在编程给定行中的所有存储器单元之后才采用除 最高水平。 根据预定义的顺序对存储器单元进行编程，将数据存储在存储器单元中。

    Memory device with internal signap processing unit
    8.
    发明授权
    Memory device with internal signap processing unit 有权
    具有内部封装处理单元的存储器件

    公开(公告)号：US08429493B2

    公开(公告)日：2013-04-23

    申请号：US12597494

    申请日：2008-04-16

    Applicant: Dotan Sokolov ,  Naftali Sommer ,  Ofir Shalvi ,  Uri Perlmutter

    Inventor： Dotan Sokolov ,  Naftali Sommer ,  Ofir Shalvi ,  Uri Perlmutter

    IPC: G11C29/00

    CPC classification number: G06F11/1072 ,  G06F11/1044 ,  G06F11/1048 ,  G06F11/1076 ,  G06F12/00 ,  G11C11/56 ,  G11C29/50004 ,  G11C29/52 ,  G11C2029/5004

    Abstract: A method for operating a memory (36) includes storing data in a plurality of analog memory cells (40) that are fabricated on a first semiconductor die by writing input storage values to a group of the analog memory cells. After storing the data, multiple output storage values are read from each of the analog memory cells in the group using respective, different threshold sets of read thresholds, thus providing multiple output sets of the output storage values corresponding respectively to the threshold sets. The multiple output sets of the output storage values are preprocessed by circuitry (48) that is fabricated on the first semiconductor die, to produce preprocessed data. The preprocessed data is provided to a memory controller (28), which is fabricated on a second semiconductor die that is different from the first semiconductor die, so as to enable the memory controller to reconstruct the data responsively to the preprocessed data.

    Abstract translation: 一种用于操作存储器（36）的方法包括：通过将输入存储值写入到一组模拟存储器单元中，将数据存储在制造在第一半导体管芯上的多个模拟存储单元（40）中。 在存储数据之后，使用相应的不同的阈值集合读取组中每个模拟存储器单元的多个输出存储值，从而提供分别对应于阈值集合的输出存储值的多个输出组。 输出存储值的多个输出组由在第一半导体管芯上制造的电路（48）预处理，以产生预处理的数据。 预处理数据被提供给存储器控制器（28），该存储器控制器（28）被制造在与第一半导体管芯不同的第二半导体管芯上，以使得存储器控制器可以响应于预处理的数据来重建数据。

    Efficient readout schemes for analog memory cell devices
    9.
    发明授权
    Efficient readout schemes for analog memory cell devices 有权
    模拟存储单元设备的高效读出方案

    公开(公告)号：US08397131B1

    公开(公告)日：2013-03-12

    申请号：US12649358

    申请日：2009-12-30

    Applicant: Naftali Sommer ,  Uri Perlmutter ,  Dotan Sokolov ,  Eyal Gurgi

    Inventor： Naftali Sommer ,  Uri Perlmutter ,  Dotan Sokolov ,  Eyal Gurgi

    IPC: G06F11/00

    CPC classification number: G11C11/5642

    Abstract: A method for data readout includes sending to a memory device, which includes a plurality of analog memory cells, a request to read a requested memory page that is stored in a first group of the memory cells. A programming status of a second group of the memory cells is reported to the memory device, so as to cause the memory device to select a reading configuration responsively to the reported programming status and to read the requested memory page from the first group of the memory cells using the selected reading configuration. The requested memory page is received from the memory device.

    Abstract translation: 一种用于数据读出的方法，包括向包括多个模拟存储器单元的存储器件发送读取存储在第一组存储单元中的请求存储器页的请求。 将存储器单元的第二组的编程状态报告给存储器件，以使存储器件响应于所报告的编程状态选择读取配置，并从第一组存储器中读取所请求的存储器页面 使用选择的阅读配置的单元格。 从存储设备接收所请求的存储器页面。

    Selective Activation of Programming Schemes in Analog Memory Cell Arrays
    10.
    发明申请
    Selective Activation of Programming Schemes in Analog Memory Cell Arrays 有权
    模拟存储器单元阵列中编程方案的选择性激活

    公开(公告)号：US20120262971A1

    公开(公告)日：2012-10-18

    申请号：US13532714

    申请日：2012-06-25

    Applicant: Dotan Sokolov ,  Naftali Sommer ,  Uri Perlmutter ,  Ofir Shalvi

    Inventor： Dotan Sokolov ,  Naftali Sommer ,  Uri Perlmutter ,  Ofir Shalvi

    IPC: G11C27/00

    CPC classification number: G11C27/005 ,  G11C7/02 ,  G11C11/5628 ,  G11C16/3418

    Abstract: A method for data storage includes defining a first programming scheme that programs a group of analog memory cells while reducing interference caused by at least one memory cell that neighbors the group, and a second programming scheme that programs the group of the analog memory cells and does not reduce all of the interference reduced by the first programming scheme. One of the first and second programming schemes is selected based on a criterion defined with respect to the analog memory cells. Data is stored in the group of the analog memory cells using the selected programming scheme.

    Abstract translation: 一种用于数据存储的方法包括：定义第一编程方案，其编程一组模拟存储器单元，同时减少由与该组相邻的至少一个存储器单元引起的干扰;以及第二编程方案，其对该组模拟存储器单元进行编程 不能减少第一编程方案减少的所有干扰。 基于针对模拟存储器单元定义的标准来选择第一和第二编程方案之一。 使用所选择的编程方案将数据存储在模拟存储器单元的组中。

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