公开(公告)号：US09032777B2

公开(公告)日：2015-05-19

申请号：US13235334

申请日：2011-09-16

申请人： Ganesh Balachandran ,  Vladimir Petkov

发明人： Ganesh Balachandran ,  Vladimir Petkov

IPC分类号： G01P21/00 ,  G01L25/00 ,  G01L27/00 ,  G01D18/00

CPC分类号： G01P21/00 ,  G01D18/006 ,  G01L25/00 ,  G01L27/002

摘要： A system and method are disclosed for automatically calibrating capacitive transducers to neutralize feed-through capacitance using linear actuation. The method includes starting with an initial neutralization capacitance, applying no electrostatic force and two known electrostatic forces to a proof mass of the transducer, recording the transducer output changes due to the applied forces; and determining how to revise neutralization capacitance based on the changes. The method can use a binary search to find a final neutralization capacitance providing the best linearity. The method can include comparing the final linearity to a threshold linearity. The electrostatic forces can be applied using a charge control method where the electrostatic force is a linear function of the actuation duration. The linear actuation can be used for continuous self-test of capacitive sensors.

摘要翻译： 公开了一种系统和方法，用于自动校准电容式换能器，以使用线性驱动中和馈通电容。 该方法包括从初始中和电容开始，不将静电力和两个已知的静电力施加到换能器的检测质量块，记录由于施加的力引起的换能器输出变化; 并根据变化确定如何修正中和电容。 该方法可以使用二进制搜索来找到提供最佳线性度的最终中和电容。 该方法可以包括将最终线性度与阈值线性度进行比较。 可以使用电荷控制方法施加静电力，其中静电力是致动持续时间的线性函数。 线性驱动可用于电容式传感器的连续自检。

公开(公告)号：US20130049774A1

公开(公告)日：2013-02-28

申请号：US13220457

申请日：2011-08-29

申请人： Vladimir Petkov ,  Ganesh Balachandran

发明人： Vladimir Petkov ,  Ganesh Balachandran

IPC分类号： G01R27/26

CPC分类号： G01D5/24 ,  G01P15/125

摘要： A differential capacitive transducer system is disclosed that includes first and second capacitive cores and a chopping system. The first core a first input coupled to a first capacitor, a second input coupled to a second capacitor, and a first output. The second core includes a third input coupled to a third capacitor, a fourth input coupled to a fourth capacitor, and a second output. The chopping system has first and fourth inputs coupled to positive signals, and second and third inputs coupled to negative signals. As the chopping system switches between high and low states, it couples the core inputs to different polarity signals reducing charge buildup. The different polarity signals can have substantially same magnitudes. Chopper clock and main clock frequencies can be selected to provide substantially zero average voltages at the core inputs. The system can include an integrator circuit and differential summing circuits.

公开(公告)号：US07786738B2

公开(公告)日：2010-08-31

申请号：US11857796

申请日：2007-09-19

申请人： Christoph Lang ,  Vladimir Petkov ,  Udo Gomez

发明人： Christoph Lang ,  Vladimir Petkov ,  Udo Gomez

IPC分类号： G01R27/26

CPC分类号： G01D5/24 ,  G01D3/036 ,  G01P15/125 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/49175 ,  H01L2924/13091 ,  H01L2924/00014 ,  H01L2924/00

摘要： Systems and methods are described below for cancelling low frequency errors in electronic systems including MEMS systems. The systems include a first circuit coupled to one or more switches. One or more bond wires are coupled to the switches and a second circuit. Control signals are coupled to the switches, and the control signals are configured to control coupling of the first circuit to the second circuit via the switch to cancel variable offsets introduced by the bond wire in an output of the first circuit.

摘要翻译： 下面描述了用于消除包括MEMS系统的电子系统中的低频误差的系统和方法。 该系统包括耦合到一个或多个开关的第一电路。 一个或多个键合线耦合到开关和第二电路。 控制信号耦合到开关，并且控制信号被配置为通过开关来控制第一电路到第二电路的耦合，以消除由第一电路的输出中的接合线引入的可变偏移。

公开(公告)号：US08866498B2

公开(公告)日：2014-10-21

申请号：US13220457

申请日：2011-08-29

申请人： Vladimir Petkov ,  Ganesh Balachandran

发明人： Vladimir Petkov ,  Ganesh Balachandran

IPC分类号： G01R27/26 ,  G01P15/125 ,  G01D5/24

CPC分类号： G01D5/24 ,  G01P15/125

摘要： A differential capacitive transducer system is disclosed that includes first and second capacitive cores and a chopping system. The first core a first input coupled to a first capacitor, a second input coupled to a second capacitor, and a first output. The second core includes a third input coupled to a third capacitor, a fourth input coupled to a fourth capacitor, and a second output. The chopping system has first and fourth inputs coupled to positive signals, and second and third inputs coupled to negative signals. As the chopping system switches between high and low states, it couples the core inputs to different polarity signals reducing charge buildup. The different polarity signals can have substantially same magnitudes. Chopper clock and main clock frequencies can be selected to provide substantially zero average voltages at the core inputs. The system can include an integrator circuit and differential summing circuits.

公开(公告)号：US08854062B2

公开(公告)日：2014-10-07

申请号：US13220306

申请日：2011-08-29

申请人： Vladimir Petkov ,  Ganesh Balachandran

发明人： Vladimir Petkov ,  Ganesh Balachandran

IPC分类号： G01R27/26 ,  G01P15/125 ,  G01D5/24 ,  G01L1/14

CPC分类号： G01P15/125 ,  G01D5/24 ,  G01L1/144 ,  Y10T29/4913

摘要： A capacitive transducer and a readout circuit for processing a signal from a capacitive transducer. The readout circuit includes a high gain circuit element, two summing amplifiers and two feedback path. The high gain circuit element generates an amplified transducer signal, and the summing amplifiers sum the amplified transducer signal with a positive reference voltage and the negative reference voltage, respectively, to generate a first summation signal and a second summation signal. The feedback paths feed back the summation signals to the transducer. Output circuitry generates an output signal based on the summation signals. The high gain circuit element can be a a switched capacitor integrator. The output circuitry can generates the output signal based on the first and second summation signals.

摘要翻译： 一种用于处理来自电容式换能器的信号的电容式换能器和读出电路。 读出电路包括高增益电路元件，两个求和放大器和两个反馈路径。 高增益电路元件产生放大的换能器信号，并且求和放大器将放大的换能器信号分别与正参考电压和负参考电压相加，以产生第一求和信号和第二求和信号。 反馈路径将求和信号反馈到换能器。 输出电路根据求和信号产生输出信号。 高增益电路元件可以是开关电容器积分器。 输出电路可以基于第一和第二求和信号产生输出信号。

公开(公告)号：US08823398B2

公开(公告)日：2014-09-02

申请号：US13551652

申请日：2012-07-18

申请人： Ganesh Balachandran ,  Vladimir Petkov

发明人： Ganesh Balachandran ,  Vladimir Petkov

IPC分类号： G01R27/26 ,  G01P15/125 ,  G01P15/08

CPC分类号： G01P15/125 ,  G01P15/0802 ,  Y10T29/49117

摘要： Capacitive transducer systems are disclosed that reduce nonlinearities due to feedthrough capacitances or residual electrostatic forces. The systems can include a core with a first input coupled to a first variable capacitor, a second input coupled to a second variable capacitor, and a core output coupled to a common node; an amplifier with input switchably coupled to common node and an output; a feedback path switchably coupling amplifier output to common node; and a main clock with first and second phases, that controls switches coupling system components. When clock is in first phase, first core input is coupled to reference voltage, second core input is coupled to negative reference voltage, and common node is coupled to amplifier output. When clock is in second phase, core inputs are grounded, and common node is coupled to amplifier input. The system can have single amplifier. Neutralization capacitor can cancel feedthrough and parasitic capacitances.

摘要翻译： 公开了电容式传感器系统，其减少由馈通电容或残余静电力引起的非线性。 该系统可以包括具有耦合到第一可变电容器的第一输入的第一输入和耦合到第二可变电容器的第二输入以及耦合到公共节点的核心输出的核心; 具有可转换地耦合到公共节点和输出的输入的放大器; 反馈路径将放大器输出切换耦合到公共节点; 以及具有第一和第二相的主时钟，用于控制开关耦合系统组件。 当时钟处于第一阶段时，第一个核心输入耦合到参考电压，第二个核心输入耦合到负参考电压，而公共节点耦合到放大器输出。 当时钟处于第二阶段时，核心输入端接地，公共节点耦合到放大器输入端。 该系统可以有单个放大器。 中和电容可以消除馈通和寄生电容。

公开(公告)号：US20130055564A1

公开(公告)日：2013-03-07

申请号：US13551652

申请日：2012-07-18

申请人： Ganesh Balachandran ,  Vladimir Petkov

发明人： Ganesh Balachandran ,  Vladimir Petkov

IPC分类号： G01R27/26 ,  H05K13/00

CPC分类号： G01P15/125 ,  G01P15/0802 ,  Y10T29/49117

摘要： Capacitive transducer systems are disclosed that reduce nonlinearities due to feedthrough capacitances or residual electrostatic forces. The systems can include a core with a first input coupled to a first variable capacitor, a second input coupled to a second variable capacitor, and a core output coupled to a common node; an amplifier with input switchably coupled to common node and an output; a feedback path switchably coupling amplifier output to common node; and a main clock with first and second phases, that controls switches coupling system components. When clock is in first phase, first core input is coupled to reference voltage, second core input is coupled to negative reference voltage, and common node is coupled to amplifier output. When clock is in second phase, core inputs are grounded, and common node is coupled to amplifier input. The system can have single amplifier. Neutralization capacitor can cancel feedthrough and parasitic capacitances.

摘要翻译： 公开了电容式传感器系统，其减少由馈通电容或残余静电力引起的非线性。 该系统可以包括具有耦合到第一可变电容器的第一输入的第一输入和耦合到第二可变电容器的第二输入以及耦合到公共节点的核心输出的核心; 具有可转换地耦合到公共节点和输出的输入的放大器; 反馈路径将放大器输出切换耦合到公共节点; 以及具有第一和第二相的主时钟，用于控制开关耦合系统组件。 当时钟处于第一阶段时，第一个核心输入耦合到参考电压，第二个核心输入耦合到负参考电压，而公共节点耦合到放大器输出。 当时钟处于第二阶段时，核心输入端接地，公共节点耦合到放大器输入端。 该系统可以有单个放大器。 中和电容可以消除馈通和寄生电容。

公开(公告)号：US20130049776A1

公开(公告)日：2013-02-28

申请号：US13551753

申请日：2012-07-18

申请人： Vladimir Petkov ,  Ganesh Balachandran

发明人： Vladimir Petkov ,  Ganesh Balachandran

IPC分类号： G01R27/26 ,  H05K3/30

CPC分类号： G01P15/125 ,  G01D5/24 ,  G01L1/144 ,  Y10T29/4913

摘要： A capacitive transducer and a readout circuit for processing a signal from a capacitive transducer. The readout circuit includes a high gain circuit element, two summing amplifiers and two feedback path. The high gain circuit element generates an amplified transducer signal, and the summing amplifiers sum the amplified transducer signal with a positive reference voltage and the negative reference voltage, respectively, to generate a first summation signal and a second summation signal. The feedback paths feed back the summation signals to the transducer. Output circuitry generates an output signal based on the summation signals. The high gain circuit element can be a switched capacitor integrator. The output circuitry can generates the output signal based on the first and second summation signals.

摘要翻译： 一种用于处理来自电容式换能器的信号的电容式换能器和读出电路。 读出电路包括高增益电路元件，两个求和放大器和两个反馈路径。 高增益电路元件产生放大的换能器信号，并且求和放大器将放大的换能器信号分别与正参考电压和负参考电压相加，以产生第一求和信号和第二求和信号。 反馈路径将求和信号反馈到换能器。 输出电路根据求和信号产生输出信号。 高增益电路元件可以是开关电容积分器。 输出电路可以基于第一和第二求和信号产生输出信号。

公开(公告)号：US20130049775A1

公开(公告)日：2013-02-28

申请号：US13551710

申请日：2012-07-18

申请人： Vladimir Petkov ,  Ganesh Balachandran

发明人： Vladimir Petkov ,  Ganesh Balachandran

IPC分类号： G01R27/26

CPC分类号： G01D5/24 ,  G01P15/125

摘要： A differential capacitive transducer system is disclosed that includes first and second capacitive cores and a chopping system. The first core a first input coupled to a first capacitor, a second input coupled to a second capacitor, and a first output. The second core includes a third input coupled to a third capacitor, a fourth input coupled to a fourth capacitor, and a second output. The chopping system has first and fourth inputs coupled to positive signals, and second and third inputs coupled to negative signals. As the chopping system switches between high and low states, it couples the core inputs to different polarity signals reducing charge buildup. The different polarity signals can have substantially same magnitudes. Chopper clock and main clock frequencies can be selected to provide substantially zero average voltages at the core inputs. The system can include an integrator circuit and differential summing circuits.

摘要翻译： 公开了一种差分电容换能器系统，其包括第一和第二电容性磁芯和斩波系统。 第一核心是耦合到第一电容器的第一输入端，耦合到第二电容器的第二输入端和第一输出端。 第二核心包括耦合到第三电容器的第三输入端，耦合到第四电容器的第四输入端和第二输出端。 斩波系统具有耦合到正信号的第一和第四输入，以及耦合到负信号的第二和第三输入。 由于斩波系统在高电平状态和低电平状态之间切换，它将核心输入耦合到不同的极性信号，从而减少电荷积聚。 不同的极性信号可以具有基本相同的幅度。 可以选择斩波时钟和主时钟频率，以在核心输入端提供基本为零的平均电压。 该系统可以包括积分器电路和差分求和电路。

公开(公告)号：US08860440B2

公开(公告)日：2014-10-14

申请号：US13557261

申请日：2012-07-25

申请人： Ganesh Balachandran ,  Vladimir Petkov

发明人： Ganesh Balachandran ,  Vladimir Petkov

IPC分类号： G01R27/26 ,  G01P15/08 ,  G01D5/241 ,  G01P15/125

CPC分类号： G01P15/0802 ,  G01D5/2417 ,  G01P15/125 ,  G01R27/2605 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2924/00014

摘要： A capacitive sensor system and method resistant to electromagnetic interference is disclosed. The system includes a capacitive core, differential amplifier with inverting and non-inverting inputs, capacitive paths, and chopping system. Core can include inputs and outputs coupled to variable capacitors, and common nodes coupling variable capacitors. Capacitive paths couple core outputs to amplifier inputs. When chopping system is high, one polarity voltage is applied to core inputs, a first core output is coupled to the inverting input and a second core output is coupled to the non-inverting input. When the chopping system is low, opposite polarity voltage is applied to core inputs, and core output to amplifier input couplings are flipped. Capacitive paths can include bond wires. Chopping system can be varied between high and low at frequencies that smear noise away from a frequency band of interest, or that smear noise substantially evenly across a wide frequency range.