Methods of manufacturing semiconductor devices and optical proximity correction
    1.
    发明授权
    Methods of manufacturing semiconductor devices and optical proximity correction 有权
    制造半导体器件的方法和光学邻近校正

    公开(公告)号:US08877650B2

    公开(公告)日:2014-11-04

    申请号:US13480317

    申请日:2012-05-24

    申请人: O Seo Park Wai-Kin Li

    发明人: O Seo Park Wai-Kin Li

    摘要: Methods of manufacturing semiconductor devices and methods of optical proximity correction methods are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes determining an amount of reactive ion etch (RIE) lag of a RIE process for a material layer of the semiconductor device, and adjusting a size of at least one pattern for a feature of the material layer by an adjustment amount to partially compensate for the amount of RIE lag determined.

    摘要翻译: 公开了制造半导体器件的方法和光学邻近校正方法的方法。 在一个实施例中,制造半导体器件的方法包括确定用于半导体器件的材料层的RIE工艺的反应离子蚀刻(RIE)滞后量,以及调整用于所述半导体器件的特征的至少一个图案的尺寸 材料层通过调整量来部分补偿确定的RIE滞后量。

    Photoresist composition containing a protected hydroxyl group for negative development and pattern forming method using thereof
    2.
    发明授权
    Photoresist composition containing a protected hydroxyl group for negative development and pattern forming method using thereof 有权
    含有被保护的羟基用于负显影的光致抗蚀剂组合物和使用它的图案形成方法

    公开(公告)号:US08846295B2

    公开(公告)日:2014-09-30

    申请号:US13457735

    申请日:2012-04-27

    IPC分类号: G03F7/038 G03F7/021

    摘要: The present invention relates to a photoresist composition capable of negative development and a pattern forming method using the photoresist composition. The photoresist composition includes an imaging polymer, a crosslinking agent and a radiation sensitive acid generator. The imaging polymer includes a monomeric unit having an acid-labile moiety-substituted hydroxyl group. The patterning forming method utilizes an organic solvent developer to selectively remove an unexposed region of a photoresist layer of the photoresist composition to form a patterned structure in the photoresist layer. The photoresist composition and the pattern forming method are especially useful for forming material patterns on a semiconductor substrate using 193 nm (ArF) lithography.

    摘要翻译: 本发明涉及能够显影的光致抗蚀剂组合物和使用光致抗蚀剂组合物的图案形成方法。 光致抗蚀剂组合物包括成像聚合物,交联剂和辐射敏感的酸发生剂。 成像聚合物包括具有酸不稳定部分取代的羟基的单体单元。 图案形成方法利用有机溶剂显影剂选择性地除去光致抗蚀剂组合物的光致抗蚀剂层的未曝光区域,以在光致抗蚀剂层中形成图案化结构。 光致抗蚀剂组合物和图案形成方法对于使用193nm(ArF)光刻在半导体衬底上形成材料图案特别有用。

    Methods and systems involving electrically reprogrammable fuses
    3.
    发明授权
    Methods and systems involving electrically reprogrammable fuses 有权
    涉及电可重新编程保险丝的方法和系统

    公开(公告)号:US08535991B2

    公开(公告)日:2013-09-17

    申请号:US12688254

    申请日:2010-01-15

    IPC分类号: H01L21/82

    摘要: An electrically reprogrammable fuse comprising an interconnect disposed in a dielectric material, a sensing wire disposed at a first end of the interconnect, a first programming wire disposed at a second end of the interconnect, and a second programming wire disposed at a second end of the interconnect, wherein the fuse is operative to form a surface void at the interface between the interconnect and the sensing wire when a first directional electron current is applied from the first programming wire through the interconnect to the second programming wire, and wherein, the fuse is further operative to heal the surface void between the interconnect and the sensing wire when a second directional electron current is applied from the second programming wire through the interconnect to the first programming wire.

    摘要翻译: 一种电可重新编程的保险丝,其包括设置在电介质材料中的互连,布置在所述互连的第一端的感测线,布置在所述互连的第二端的第一编程线,以及设置在所述互连的第二端的第二编程线 其中当从所述第一编程线通过所述互连件施加第一定向电子线到所述第二编程线时,所述保险丝可操作以在所述互连和感测线之间的界面处形成表面空隙,并且其中,所述保险丝是 当从所述第二编程线通过所述互连件施加第二编程线到所述第一编程线时,还可操作以治愈所述互连和所述感测线之间的表面空隙。

    Gate conductor with a diffusion barrier
    5.
    发明授权
    Gate conductor with a diffusion barrier 有权
    具有扩散阻挡层的栅极导体

    公开(公告)号:US08476674B2

    公开(公告)日:2013-07-02

    申请号:US13010009

    申请日:2011-01-20

    IPC分类号: H01L29/66 H01L27/118

    摘要: A gate conductor structure is provided having a barrier region between a N-type device and a P-type device, wherein the barrier region minimizes or eliminates cross-diffusion of dopant species across the barrier region. The barrier region comprises at least one sublithographic gap in the gate conductor structure. The sublithographic gap is formed by using self-assembling copolymers to form a sublithographic patterned mask over the gate conductor structure. According to one embodiment, at least one sublithographic gap is a slit or line that traverses the width of the gate conductor structure. The sublithographic gap is sufficiently deep to minimize or prevent cross-diffusion of the implanted dopant from the upper portion of the gate conductor. According to another embodiment, the sublithographic gaps are of sufficient density that cross-diffusion of dopants is reduced or eliminated during an activation anneal such that changes in Vt are minimized.

    摘要翻译: 提供了具有在N型器件和P型器件之间的势垒区域的栅极导体结构,其中所述势垒区域最小化或消除了所述阻挡区域上的掺杂剂物质的交叉扩散。 阻挡区域包括栅极导体结构中的至少一个亚光刻间隙。 通过使用自组装共聚物在栅极导体结构上形成亚光刻图案掩模来形成亚光刻间隙。 根据一个实施例,至少一个亚光刻间隙是穿过栅极导体结构的宽度的狭缝或线。 亚光刻间隙足够深以使注入的掺杂剂从栅极导体的上部最小化或防止交叉扩散。 根据另一个实施例,亚光刻间隙具有足够的密度,使得在激活退火期间掺杂剂的交叉扩散减少或消除,使得Vt的变化最小化。

    Structure of power grid for semiconductor devices and method of making the same
    6.
    发明授权
    Structure of power grid for semiconductor devices and method of making the same 失效
    半导体器件电网结构及其制作方法

    公开(公告)号:US08349723B2

    公开(公告)日:2013-01-08

    申请号:US13342221

    申请日:2012-01-03

    IPC分类号: H01L21/4763

    摘要: An embodiment of the invention provides a semiconductor structure, which may include a stud of a first conductive material formed inside a dielectric layer; a via of a second conductive material having a bottom and sidewalls with the bottom and the sidewalls being covered by a conductive liner, and the bottom being formed directly on top of the stud and being in contact with the via through the conductive liner; and one or more conductive paths of a third conductive material connecting to the via through the conductive liner at the sidewalls of said the. A method of making the semiconductor structure is also provided.

    摘要翻译: 本发明的一个实施例提供一种半导体结构,其可以包括形成在电介质层内部的第一导电材料的支柱; 具有底部的第二导电材料的通孔和具有底部的侧壁,并且侧壁被导电衬垫覆盖,并且底部直接形成在螺柱的顶部上并且通过导电衬套与通孔接触; 以及一个或多个第三导电材料的导电路径,所述第三导电材料在所述导电衬套的侧壁处通过所述导电衬套连接到所述通孔。 还提供了制造半导体结构的方法。

    Structure of metal e-fuse
    7.
    发明授权
    Structure of metal e-fuse 失效
    金属电熔丝的结构

    公开(公告)号:US08299567B2

    公开(公告)日:2012-10-30

    申请号:US12952317

    申请日:2010-11-23

    IPC分类号: H01L29/00

    摘要: Structures of electronic fuses (e-fuse) are provided. An un-programmed e-fuse includes a via of a first conductive material having a bottom and sidewalls with a portion of the sidewalls being covered by a conductive liner and the bottom of the via being formed on top of a dielectric layer, and a first and a second conductive path of a second conductive material formed on top of the dielectric layer with the first and second conductive paths being conductively connected through, and only through, the via at the sidewalls. A programmed e-fuse includes a via; a first conductive path at a first side of the via and being separated from sidewalls of the via by a void; and a second conductive path at a second different side of the via and being in conductive contact with the via through sidewalls of the via.

    摘要翻译: 提供电子保险丝(e-fuse)的结构。 未编程的电子熔断器包括具有底部和侧壁的第一导电材料的通孔,侧壁的一部分被导电衬垫覆盖,并且通孔的底部形成在电介质层的顶部上,并且第一 以及形成在电介质层顶部上的第二导电材料的第二导电路径,其中第一和第二导电路径通过侧壁导通地连接,并且仅通过通孔。 编程的电子熔丝包括通孔; 在通孔的第一侧处的第一导电路径,并且通过空隙与通路的侧壁分离; 以及在所述通孔的第二不同侧的第二导电路径,并且与通孔通过所述通孔的侧壁导电接触。

    Near-infrared absorbing film compositions
    8.
    发明授权
    Near-infrared absorbing film compositions 有权
    近红外吸收膜组合物

    公开(公告)号:US08293451B2

    公开(公告)日:2012-10-23

    申请号:US12543003

    申请日:2009-08-18

    IPC分类号: G03F7/00 G03F7/004 G03F7/028

    CPC分类号: G03F7/091 G03F9/7026

    摘要: A curable liquid formulation containing at least (i) one or more near-infrared absorbing triphenylamine-based dyes, and (ii) one or more casting solvents. The invention is also directed to solid near-infrared absorbing films composed of crosslinked forms of the curable liquid formulation. The invention is also directed to a microelectronic substrate containing a coating of the solid near-infrared absorbing film as well as a method for patterning a photoresist layer coated on a microelectronic substrate in the case where the near-infrared absorbing film is between the microelectronic substrate and a photoresist film.

    摘要翻译: 包含至少(i)一种或多种近红外吸收性三苯胺类染料的可固化液体制剂,和(ii)一种或多种浇铸溶剂。 本发明还涉及由可固化液体制剂的交联形式组成的固体近红外吸收膜。 本发明还涉及一种含有固体近红外线吸收膜的涂层的微电子衬底,以及在近红外吸收膜位于微电子衬底之间的情况下,用于图案化涂覆在微电子衬底上的光刻胶层的方法 和光刻胶膜。

    MULTI-EXPOSURE LITHOGRAPHY EMPLOYING DIFFERENTIALLY SENSITIVE PHOTORESIST LAYERS
    9.
    发明申请
    MULTI-EXPOSURE LITHOGRAPHY EMPLOYING DIFFERENTIALLY SENSITIVE PHOTORESIST LAYERS 审中-公开
    使用差分感光层的多次曝光光刻

    公开(公告)号:US20120156450A1

    公开(公告)日:2012-06-21

    申请号:US13406965

    申请日:2012-02-28

    IPC分类号: B32B3/00

    摘要: A stack of a second photoresist having a second photosensitivity and a first photoresist having a first photosensitivity, which is greater than second photosensitivity, is formed on a substrate. A first pattern is formed in the first photoresist by a first exposure and a first development, while the second photoresist underneath remains intact. A second pattern comprising an array of lines is formed in the second photoresist. An exposed portion of the second photoresist underneath a remaining portion of the first photoresist forms a narrow portion of a line pattern, while an exposed portion of the second photoresist outside the area of the remaining portions of the photoresist forms a wide portion of the line pattern. Each wide portion of the line pattern forms a bulge in the second pattern, which increases overlay tolerance between the second pattern and the pattern of conductive vias.

    摘要翻译: 在基板上形成具有第二感光性的第二光致抗蚀剂的叠层和具有大于第二光敏性的第一光敏性的第一光致抗蚀剂。 通过第一曝光和第一显影在第一光致抗蚀剂中形成第一图案,而下面的第二光致抗蚀剂保持完整。 在第二光致抗蚀剂中形成包括线阵列的第二图案。 在第一光致抗蚀剂的剩余部分下面的第二光致抗蚀剂的暴露部分形成线图案的窄部分,而在光致抗蚀剂的剩余部分的区域外的第二光致抗蚀剂的暴露部分形成线图案的宽部分 。 线图案的每个宽部分在第二图案中形成凸起,这增加了第二图案和导电通孔图案之间的覆盖公差。

    Structure of power grid for semiconductor devices and method of making the same
    10.
    发明授权
    Structure of power grid for semiconductor devices and method of making the same 有权
    半导体器件电网结构及其制作方法

    公开(公告)号:US08164190B2

    公开(公告)日:2012-04-24

    申请号:US12491372

    申请日:2009-06-25

    IPC分类号: H01L23/48 H01L23/52 H01L29/40

    摘要: An embodiment of the invention provides a semiconductor structure, which may include a stud of a first conductive material formed inside a dielectric layer; a via of a second conductive material having a bottom and sidewalls with the bottom and the sidewalls being covered by a conductive liner, and the bottom being formed directly on top of the stud and being in contact with the via through the conductive liner; and one or more conductive paths of a third conductive material connecting to the via through the conductive liner at the sidewalls of said the. A method of making the semiconductor structure is also provided.

    摘要翻译: 本发明的一个实施例提供一种半导体结构,其可以包括形成在电介质层内部的第一导电材料的支柱; 具有底部的第二导电材料的通孔和具有底部的侧壁,并且侧壁被导电衬垫覆盖,并且底部直接形成在螺柱的顶部上并且通过导电衬套与通孔接触; 以及一个或多个第三导电材料的导电路径,所述第三导电材料在所述导电衬套的侧壁处通过导电衬套连接到通孔。 还提供了制造半导体结构的方法。