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    Information processing apparatus
    1.
    发明申请
    Information processing apparatus 审中-公开
    信息处理装置

    公开(公告)号：US20080162903A1

    公开(公告)日：2008-07-03

    申请号：US11907617

    申请日：2007-10-15

    申请人： Yasuhiro Yamazaki

    发明人： Yasuhiro Yamazaki

    IPC分类号： G06F9/38

    CPC分类号： G06F9/322 ,  G06F9/324 ,  G06F9/3804 ,  G06F9/382 ,  G06F9/3844 ,  G06F9/3846

    摘要： There is provided an information processing apparatus characterized by including: an instruction cache memory storing an instruction; a first adder adding a program counter relative branch target address in an inputted branch instruction and a program counter value, and outputting an absolute branch target address; and a write circuit converting the program counter relative branch target address in the inputted branch instruction into the absolute branch target address and writing a converted branch instruction thereof in the instruction cache memory.

    摘要翻译： 提供了一种信息处理设备，其特征在于包括：存储指令的指令高速缓存存储器; 在输入的分支指令中加上程序计数器相对分支目标地址的第一加法器和程序计数器值，输出绝对分支目标地址; 以及写入电路，将输入的分支指令中的程序计数器相对分支目标地址转换为绝对分支目标地址，并将其转换的分支指令写入指令高速缓冲存储器。

    Microprocessor executing a program to guarantee an access order
    2.
    发明授权
    Microprocessor executing a program to guarantee an access order 有权
    微处理器执行程序来保证访问顺序

    公开(公告)号：US06823406B2

    公开(公告)日：2004-11-23

    申请号：US10095568

    申请日：2002-03-13

    申请人： Hitoshi Yoda ,  Hiroyuki Utsumi ,  Yasuhiro Yamazaki

    发明人： Hitoshi Yoda ,  Hiroyuki Utsumi ,  Yasuhiro Yamazaki

    IPC分类号： G06F1314

    CPC分类号： G06F9/3824 ,  G06F9/3834

    摘要： A microprocessor includes a register and a comparator. The register stores an address area, the address area requiring a guarantee of an access order. The comparator compares an address of the address area held in said register with an address of an address area indicated in an access request from CPU, and outputs a signal to execute an access request succeeding the access request from the CPU after executing an access request preceding the access request from the CPU when the address area indicated in the access request from the CPU matches the address area held in said register.

    摘要翻译： 微处理器包括寄存器和比较器。 寄存器存储地址区域，需要保证访问订单的地址区域。 比较器将保持在所述寄存器中的地址区域的地址与来自CPU的访问请求中指示的地址区域的地址进行比较，并在执行访问请求之后输出执行来自CPU的访问请求后的访问请求的信号 在来自CPU的访问请求中指示的地址区域与保持在所述寄存器中的地址区域匹配时，来自CPU的访问请求之前。

    Optical data storage and retrieval system and method
    4.
    发明授权
    Optical data storage and retrieval system and method 失效
    光学数据存储和检索系统及方法

    公开(公告)号：US5682367A

    公开(公告)日：1997-10-28

    申请号：US472158

    申请日：1995-06-07

    申请人： Noboru Kimura ,  Ronald G. Vitullo ,  Yasuhiro Yamazaki

    发明人： Noboru Kimura ,  Ronald G. Vitullo ,  Yasuhiro Yamazaki

    IPC分类号： G11B7/00 ,  G11B7/0045 ,  G11B7/005 ,  G11B7/007 ,  G11B7/013 ,  G11B7/125 ,  G11B11/10 ,  G11B11/105 ,  G11B19/00 ,  G11B19/02 ,  G11B19/12 ,  G11B20/10 ,  G11B20/12 ,  G11B20/14 ,  G11B20/18 ,  G11B27/30

    CPC分类号： G11B27/3027 ,  G11B11/10506 ,  G11B11/10513 ,  G11B11/10515 ,  G11B11/1053 ,  G11B11/10597 ,  G11B19/00 ,  G11B19/02 ,  G11B19/12 ,  G11B20/10 ,  G11B20/10009 ,  G11B20/1258 ,  G11B20/1426 ,  G11B20/1833 ,  G11B7/0045 ,  G11B7/00456 ,  G11B7/005 ,  G11B7/007 ,  G11B7/00745 ,  G11B7/0079 ,  G11B7/013 ,  G11B7/126 ,  G11B20/1262 ,  G11B2007/0006 ,  G11B2020/1434 ,  G11B2220/2525

    摘要： A first write encoder encodes digital data in a first, high-density format. A second write encoder encodes digital data in a second, low-density (i.e., ANSI) format. A first read decoder decodes digital data from the first format. A second read decoder decodes digital data from the second format. A disk drive receives a replaceable 90 millimeter optical disk. A read/write head reads encoded data from and writes encoded data to a 90 millimeter optical disk received by the drive. In a first mode, the first write encoder is connected between a source of digital data and the read/write head, and the first read decoder is connected between the read/write head and the utilizing apparatus. In a second mode, the second write encoder is connected between the source and the read/write head, and the second read decoder is connected between the read/write head and the utilizing apparatus. Control electronics switch between the first and second modes, depending upon the format in which data is recorded on the disk received by the disk drive. An 8/9 GCR encoder and a laser pulse generator are used in the first write encoder to record data on the optical media to increase the storage capacity. Improvement in timing is accomplished with write compensation and signal equalization.

    摘要翻译： 第一写入编码器以第一高密度格式对数字数据进行编码。 第二个写入编码器以第二个低密度（即ANSI）格式编码数字数据。 第一读取解码器从第一格式解码数字数据。 第二读取解码器从第二格式解码数字数据。 磁盘驱动器接收可更换的90毫米光盘。 读/写头读取编码数据并将编码数据写入由驱动器接收的90毫米光盘。 在第一模式中，第一写入编码器连接在数字数据源和读/写头之间，第一读取解码器连接在读/写头与利用装置之间。 在第二模式中，第二写入编码器连接在源和读/写头之间，第二读取解码器连接在读/写头与利用装置之间。 控制电子设备在第一和第二模式之间切换，这取决于磁盘驱动器接收的磁盘上数据记录的格式。 在第一写入编码器中使用8/9 GCR编码器和激光脉冲发生器来在光学介质上记录数据以增加存储容量。 通过写入补偿和信号均衡来实现时序的改进。

    Graded facsimile image signal coding system
    5.
    发明授权
    Graded facsimile image signal coding system 失效
    分级传真图像信号编码系统

    公开(公告)号：US4652935A

    公开(公告)日：1987-03-24

    申请号：US833370

    申请日：1986-02-25

    申请人： Toshiaki Endoh ,  Yasuhiro Yamazaki

    发明人： Toshiaki Endoh ,  Yasuhiro Yamazaki

    IPC分类号： H04N1/41 ,  H04N1/417 ,  H04N1/40

    CPC分类号： H04N1/4172

    摘要： A graded facsimile image signal coding system is disclosed which is provided with means for distributing a multi-graded facsimile picture signal, represented by 2.sup.n gradation levels, into n bit planes corresponding to n digits; initial encoding means for detecting, from picture elements forming each bit plane, picture elements at intervals of .DELTA.X picture elements on every .DELTA.Y-th line and encoding the detected picture elements; and additional coding means for further coding each one of said encoded picture elements with reference to encoded four picture elements positioned around said one picture element to be coded.

    摘要翻译： 公开了一种分级传真图像信号编码系统，其具有用于将由2n个灰度等级表示的多分辨率传真图像信号分配到对应于n个数字的n个比特平面中的装置; 初始编码装置，用于从每个DELTA Y线上的DELTA X像素的间隔检测形成每个比特平面的图像元素，并对所检测的图像元素进行编码; 以及附加编码装置，用于参考围绕所述待编码的一个像素周围的编码的四个图像元素进一步编码所述编码图像元素中的每一个。

    Method for interline-coding facsimile signal
    6.
    发明授权
    Method for interline-coding facsimile signal 失效
    传真信号间线编码方法

    公开(公告)号：US4134133A

    公开(公告)日：1979-01-09

    申请号：US817421

    申请日：1977-07-20

    申请人： Hiroichi Teramura ,  Yasuhiro Yamazaki ,  Yasushi Wakahara

    发明人： Hiroichi Teramura ,  Yasuhiro Yamazaki ,  Yasushi Wakahara

    IPC分类号： G06T9/00 ,  H04N1/417 ,  H04N1/40 ,  H04N7/12

    CPC分类号： H04N1/417 ,  G06T9/004

    摘要： A method for interline-coding a facsimile signal, in which information of scanning lines of the input facsimile signal is alternately divided into information of at least one first unit line and information of at least one second unit line. A first one of the first unit lines is first coded in accordance with a predetermined coding principle. The information of the next one of the first unit lines is secondly coded in accordance with a predetermined coding principle prior to coding of information of the first one of said second unit lines. The information of the first one of the second unit lines is thirdly coded by two-dimensional predictive coding using, as reference information, the information of the first one and the next one of the first unit lines. The operations of the second coding and the operation of the third coding are repeatedly achieved thereafter.

    摘要翻译： 一种用于对传真信号进行行间编码的方法，其中将输入传真信号的扫描线的信息交替划分为至少一个第一单元行的信息和至少一个第二单位行的信息。 首先根据预定的编码原理对第一单元线进行编码。 在对第一单元线中的第一单元线的信息进行编码之前，根据预定的编码原理对下一个第一单元行的信息进行二次编码。 第二单元行中的第一单元行的信息通过使用第一单元行中的第一单元行和下一个单元行的信息作为参考信息的二维预测编码进行第三编码。 此后重复实现第二编码的操作和第三编码的操作。

    Data processor and memory read active control method
    7.
    发明授权
    Data processor and memory read active control method 有权
    数据处理器和存储器读取主动控制方法

    公开(公告)号：US08667259B2

    公开(公告)日：2014-03-04

    申请号：US12040269

    申请日：2008-02-29

    申请人： Mitsuaki Hino ,  Yasuhiro Yamazaki

    发明人： Mitsuaki Hino ,  Yasuhiro Yamazaki

    IPC分类号： G06F9/32

    CPC分类号： G06F9/3806 ,  G06F9/3814 ,  G06F9/3848 ,  G06F12/0862 ,  G06F12/0864 ,  G06F2212/6032 ,  Y02D10/13

    摘要： Instruction cache memory having a plurality of memory (for example, cache WAY), means 3 for storing prediction data of a conditional branch of a branch instruction being taken or not taken and for storing prediction data of memory storing the branch instruction data of the plurality of memory when the prediction is the branch being taken, and means for, when an instruction to be executed is a branch instruction, outputting a read active control signal to the plurality of memories 1 by using two pieces of prediction data obtained from the means by an index corresponding to the branch instruction, are comprised.

    摘要翻译： 具有多个存储器（例如，高速缓存WAY）的指令高速缓存存储器，用于存储正被采取或未采用的分支指令的条件分支的预测数据的装置3，以及用于存储存储多个分支指令的分支指令数据的存储器的预测数据 当所述预测是所述分支被采取时，以及用于当要执行的指令是分支指令时，通过使用从所述装置获得的两条预测数据将所读出的有效控制信号输出到所述多个存储器1的装置， 包括对应于分支指令的索引。

    CONNECTION STRUCTURE BETWEEN LIFTING DEVICE AND LIFTED BODY
    8.
    发明申请
    CONNECTION STRUCTURE BETWEEN LIFTING DEVICE AND LIFTED BODY 有权
    提升装置与提升体之间的连接结构

    公开(公告)号：US20090120723A1

    公开(公告)日：2009-05-14

    申请号：US12267023

    申请日：2008-11-07

    申请人： Yasuhiro Yamazaki

    发明人： Yasuhiro Yamazaki

    IPC分类号： B66F9/12

    CPC分类号： B25J5/00

    摘要： A connection structure between a lifting device and a lifted body is provided wherein lifted body side portions are connected to a pair of lifting bodies moving up and down on the lifted body outer sides. Gripping means provided in each side of a lifted body grip a lifting arm of each lifting body and include a first gripping piece swingably connected to a base rack and a second gripping piece swingably connected to the first gripping piece. When the lifting arm is separated from the lifted body, the first gripping piece is located outwardly of the lifting arm and a gripper is located within a vertical projective space of the lifting arm, and the first gripping piece is lifted via the second gripping piece, by which a gripper abuts against the lifting arm from below.

    摘要翻译： 提供了提升装置和提升体之间的连接结构，其中提升的身体侧部分连接到在提起的身体外侧上上下移动的一对提升体。 设置在提升体的每一侧的夹持装置夹住每个提升体的提升臂，并且包括可摆动地连接到基架的第一夹紧片和可摆动地连接到第一夹持片的第二夹紧片。 当提升臂与提升体分离时，第一夹持件位于提升臂的外侧，并且夹具位于提升臂的垂直投影空间内，并且第一夹持件通过第二夹持件提升， 夹具从下方抵靠提升臂。