公开(公告)号：US6114744A

公开(公告)日：2000-09-05

申请号：US38885

申请日：1998-03-12

申请人： Masayuki Kawaguchi ,  Yasunari Tagami ,  Hirotsugu Hata ,  Akira Hatsugai

发明人： Masayuki Kawaguchi ,  Yasunari Tagami ,  Hirotsugu Hata ,  Akira Hatsugai

IPC分类号： H01L21/331 ,  H01L29/423 ,  H01L29/732

CPC分类号： H01L29/66272 ,  H01L29/42304

摘要： A lead electrode is formed to expose an active base region. A lead electrode for an emitter electrode is formed on the lead electrode in an emitter region, through an insulating film. The insulating film on the lead electrode is then etched to form a contact hole. After that, the emitter contact hole is formed to expose the lead electrode. Also, a silicon nitride film SN is interposed between the lead electrode and insulating film and between the lead electrode and LOCOS oxide film each to decrease resistance of the lead electrodes.

摘要翻译： 形成引线电极以暴露活性碱性区域。 用于发射极的引线电极通过绝缘膜在发射极区域的引线电极上形成。 然后对引线电极上的绝缘膜进行蚀刻以形成接触孔。 之后，形成发射极接触孔以露出引线电极。 此外，在引线电极和绝缘膜之间以及引线电极和LOCOS氧化物膜之间插入氮化硅膜SN，以降低引线电极的电阻。

公开(公告)号：US6110772A

公开(公告)日：2000-08-29

申请号：US16512

申请日：1998-01-30

申请人： Tadayoshi Takada ,  Tsuyoshi Takahashi ,  Yasunari Tagami ,  Hirotsugu Hata ,  Satoru Kaneko

发明人： Tadayoshi Takada ,  Tsuyoshi Takahashi ,  Yasunari Tagami ,  Hirotsugu Hata ,  Satoru Kaneko

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/265 ,  H01L21/822 ,  H01L27/06 ,  H01L21/70

CPC分类号： H01L27/0635 ,  H01L28/20 ,  H01L28/40

摘要： A semiconductor IC including a resistance element on a circuit substrate. The resistance element includes a resistance layer formed on an insulating layer. The resistance layer is formed using a Si layer obtained by forming an a-Si layer, doping the a-Si layer with impurities, and heating the doped a-Si layer to diffuse the impurities while substantially preserving the fineness of the a-Si layer surface. Preferably, a SiN layer is provided lying beneath the resistance layer. A capacitor may be integrated on the same circuit substrate where the resistance element is formed. In this case, a lower electrode, a SiN dielectric layer, and an upper electrode are formed in this order to constitute a capacitor. The SiN dielectric layer of the capacitor is formed extending from a capacitor formation region to another region, so that the resistance layer of the resistance element is formed on the extending SiN dielectric layer. The lower and upper electrodes of the capacitor may be formed using an a-Si layer, similar to the resistance layer.

摘要翻译： 一种在电路基板上包括电阻元件的半导体IC。 电阻元件包括形成在绝缘层上的电阻层。 电阻层使用通过形成a-Si层获得的Si层，用杂质掺杂a-Si层并加热掺杂的a-Si层以扩散杂质而形成，同时基本上保持a-Si层的细度 表面。 优选地，设置在电阻层下方的SiN层。 电容器可以集成在形成电阻元件的同一电路基板上。 在这种情况下，依次形成下电极，SiN电介质层和上电极，构成电容器。 电容器的SiN介质层形成为从电容器形成区域延伸到另一区域，使得电阻元件的电阻层形成在延伸的SiN电介质层上。 可以使用类似于电阻层的a-Si层来形成电容器的下电极和上电极。

公开(公告)号：US5719066A

公开(公告)日：1998-02-17

申请号：US625284

申请日：1996-04-01

申请人： Yoshiaki Sano ,  Toshimasa Sadakata ,  Yasunari Tagami ,  Yasuo Oishibashi

发明人： Yoshiaki Sano ,  Toshimasa Sadakata ,  Yasunari Tagami ,  Yasuo Oishibashi

IPC分类号： H01L27/04 ,  H01L21/334 ,  H01L27/06 ,  H01L21/265

CPC分类号： H01L29/66181 ,  H01L27/0664

摘要： A lower layer diffusion layer of a metal-insulator-semiconductor-type (MIS-type) condenser is formed by implanting and diffusing phosphorus into an upper portion of an epitaxial layer formed on a semiconductor substrate. Thereafter, a silicon nitride film functioning as a dielectric film of the MIS type condenser is formed on the lower layer diffusion layer, and a poly-silicon film functioning as a protective film for the silicon nitride film is formed on the silicon nitride film in succession to the formation of the silicon nitride film without performing any etching operation. The formation of the silicon nitride film and the poly-silicon film is performed according to a vacuum chemical vapor deposition in the same chamber to prevent the silicon nitride film from being exposed to oxygen. Thereafter, the silicon nitride film and the poly-silicon film are baked to form an oxidized film surrounding the silicon nitride film and the poly-silicon film. Thereafter, a metal is deposited on the poly-silicon film to form an upper electrode of the MIS type condenser. Therefore, the deterioration of dielectric characteristics of the MIS type condenser can be prevented.

摘要翻译： 通过将磷注入并扩散到形成在半导体衬底上的外延层的上部来形成金属 - 绝缘体半导体型（MIS型）电容器的下层扩散层。 此后，在下层扩散层上形成用作MIS型电容器的电介质膜的氮化硅膜，并且在氮化硅膜上连续形成用作氮化硅膜的保护膜的多晶硅膜 以形成氮化硅膜而不执行任何蚀刻操作。 根据在相同的室中的真空化学气相沉积来进行氮化硅膜和多晶硅膜的形成，以防止氮化硅膜暴露于氧气。 然后，对氮化硅膜和多晶硅膜进行焙烧，形成围绕氮化硅膜和多晶硅膜的氧化膜。 此后，在多晶硅膜上沉积金属以形成MIS型冷凝器的上电极。 因此，可以防止MIS型冷凝器的介电特性的劣化。