公开(公告)号：US20080133989A1

公开(公告)日：2008-06-05

申请号：US11566819

申请日：2006-12-05

申请人： Atsushi Hayashi ,  Chiaki Takano ,  Noriyuki Oshima ,  Takeshi Inoue ,  Hiroki Kihara ,  Yoichi Nishino

发明人： Atsushi Hayashi ,  Chiaki Takano ,  Noriyuki Oshima ,  Takeshi Inoue ,  Hiroki Kihara ,  Yoichi Nishino

IPC分类号： G01R31/3185

CPC分类号： G01R31/318536 ,  G01R31/318541 ,  G01R31/318555

摘要： Methods and apparatus for dynamically (AC) testing a target circuit within a main circuit include: providing respective sets of input latches from among a plurality of latches of the main circuit; reconfiguring connections of at least some of the input latches from normal connections within the main circuit such that each set of input latches is connected in series and directs an input bit stream from an associated source node into an associated input node of the target circuit; scanning a plurality of sets of input bits into the respective sets of input latches such that each latch of each set of input latches contains a respective bit of an associated one of the sets of input bits; and scanning each of the sets of input bits serially into the respective input nodes of the target circuit at a sufficiently high frequency to dynamically test the target circuit.

摘要翻译： 用于动态（AC）测试主电路内的目标电路的方法和装置包括：从主电路的多个锁存器中提供各组输入锁存器; 重新配置至少一些输入锁存器与主电路内的正常连接的连接，使得每组输入锁存器串联连接，并将输入比特流从相关源节点引导到目标电路的相关输入节点; 将多组输入位扫描到相应的输入锁存器组中，使得每组输入锁存器的每个锁存器包含输入位组中相关联的一个组的相应位; 并且以足够高的频率将每组输入位串行地扫描到目标电路的相应输入节点中以动态测试目标电路。

公开(公告)号：US09276189B2

公开(公告)日：2016-03-01

申请号：US13820786

申请日：2011-09-07

申请人： Yoichi Nishino ,  Suguru Tanaka

发明人： Yoichi Nishino ,  Suguru Tanaka

IPC分类号： H01L35/20 ,  H01L35/32 ,  C22C38/06 ,  C22C38/12

CPC分类号： H01L35/32 ,  C22C38/06 ,  C22C38/12 ,  H01L35/20

摘要： A thermoelectric material has a Heusler alloy type crystal structure and is based on an Fe2VAl basic structure having a total number of valence electrons of 24 per chemical formula. The thermoelectric material has a structure expressed by General Formula Fe2V1−ZAl1+Z, where 0.03≦z≦0.12, or General Formula Fe2V1−ZAl1+Z, where −0.12≦z≦−0.03, by controlling its chemical compositional ratio. The former acts as a p-type material and has a Seebeck coefficient whose absolute value reaches a peak at a temperature of 400 K or higher; and the latter acts as an n-type material and has a Seebeck coefficient whose absolute value reaches a peak at a temperature of 310 K or higher.

摘要翻译： 热电材料具有Heusler合金型晶体结构，并且基于每个化学式具有总数为24的价电子的Fe2VA1基本结构。 热电材料具有通式Fe2V1-ZAl1 + Z表示的结构，其中0.03＆nlE; z＆nlE; 0.12或通式Fe2V1-ZAl1 + Z，其中-0.12＆nlE; z＆nlE; -0.03，通过控制其化学组成比。 前者用作p型材料，并且具有在400K或更高的温度下其绝对值达到峰值的塞贝克系数; 后者作为n型材料，并具有在310K以上的温度下绝对值达到峰值的塞贝克系数。

公开(公告)号：US07768287B2

公开(公告)日：2010-08-03

申请号：US11620873

申请日：2007-01-08

申请人： Atsushi Hayashi ,  Akiyuki Hatakeyama ,  Taichi Niki ,  Yoichi Nishino

发明人： Atsushi Hayashi ,  Akiyuki Hatakeyama ,  Taichi Niki ,  Yoichi Nishino

IPC分类号： G01R31/02 ,  G06F1/26

CPC分类号： G06F9/3885 ,  G06F11/2043

摘要： Methods and apparatus provide for: selectively supplying a first source of power to a plurality of circuit blocks of a system using a plurality of gate circuits responsive to respective control signals provided by at least one control circuit; and providing a second source of power to operate the control circuit before the first source of power is available to the gate circuits such that the control signals are valid before such availability.

摘要翻译： 方法和装置提供：响应于由至少一个控制电路提供的各个控制信号，使用多个门电路选择性地向系统的多个电路块提供第一电源; 以及在所述第一电源可用于所述门电路之前提供第二电源来操作所述控制电路，使得所述控制信号在所述可用性之前是有效的。

公开(公告)号：US07602935B2

公开(公告)日：2009-10-13

申请号：US10678747

申请日：2003-10-06

申请人： Yoichi Nishino

发明人： Yoichi Nishino

IPC分类号： G06K9/00

CPC分类号： G06T7/0002 ,  G06K9/00577 ,  G06K2009/00583

摘要： A data processing apparatus and data processing method enabling a camera generating image data to be identified easily with a high reliability, which identify if a predetermined image generating apparatus having distinctive variations in light receiving intensity of individual light receiving elements and generating image data based on light receiving results of the plurality of light receiving elements generated the first image data to be identified, wherein a correlation detector detects correlation between first image data and second image data for reference generated using a predetermined image generating apparatus and a CPU identifies if the first image data was generated using an image generating apparatus based on that correlation.

摘要翻译： 一种数据处理装置和数据处理方法，其使得能够以高可靠性容易地识别生成图像数据的相机，其识别是否具有基于光的各个光接收元件的光接收强度的不同变化的预定图像生成装置和生成图像数据 多个光接收元件的接收结果产生要识别的第一图像数据，其中相关检测器检测第一图像数据和第二图像数据之间的相关性，以便使用预定图像生成装置产生参考，并且CPU识别第一图像数据 使用基于该相关性的图像生成装置生成。

公开(公告)号：US07447602B1

公开(公告)日：2008-11-04

申请号：US11758034

申请日：2007-06-05

申请人： Douglas H. Bradley ,  Jonathan J. DeMent ,  Sang H. Dhong ,  Brian Flachs ,  Gilles Gervais ,  Yoichi Nishino

发明人： Douglas H. Bradley ,  Jonathan J. DeMent ,  Sang H. Dhong ,  Brian Flachs ,  Gilles Gervais ,  Yoichi Nishino

IPC分类号： G01R21/00 ,  G01R21/06

CPC分类号： G01R31/31721 ,  G01R31/31718

摘要： A system and method for sorting processor chips based on a thermal design point are provided. With the system and method, for each processor chip, a high power workload is run on the processor chip to determine a voltage regulator module (VRM) load line. Thereafter, a thermal design point (TDP) workload is applied to the processor chip and the voltage is varied until a performance of the processor chip falls on the VRM load line. At this point, the power input to the processor chip is measured and used to sort, or bin, the processor chip. The various workloads applied have a constant frequency. From this sorting of processor chips, high speed processors that require less voltage to achieve a desired frequency and low current processors that drain less current while running at a desired frequency may be identified.

摘要翻译： 提供了一种基于热设计点分类处理器芯片的系统和方法。 利用系统和方法，对于每个处理器芯片，在处理器芯片上运行高功率工作负载以确定电压调节器模块（VRM）负载线。 此后，将热设计点（TDP）工作量应用于处理器芯片，并且改变电压直到处理器芯片的性能落在VRM负载线上。 此时，对处理器芯片的电源输入进行测量并用于对处理器芯片进行排序或分页。 应用的各种工作负载具有恒定的频率。 从处理器芯片的这种排序中，可以识别需要较少电压以实现期望频率的低速处理器和在期望频率下运行时消耗较少电流的低电流处理器。

公开(公告)号：US20070176625A1

公开(公告)日：2007-08-02

申请号：US11620873

申请日：2007-01-08

申请人： Atsushi Hayashi ,  Akiyuki Hatakeyama ,  Taichi Niki ,  Yoichi Nishino

发明人： Atsushi Hayashi ,  Akiyuki Hatakeyama ,  Taichi Niki ,  Yoichi Nishino

IPC分类号： G01R31/36

CPC分类号： G06F9/3885 ,  G06F11/2043

摘要： Methods and apparatus provide for: selectively supplying a first source of power to a plurality of circuit blocks of a system using a plurality of gate circuits responsive to respective control signals provided by at least one control circuit; and providing a second source of power to operate the control circuit before the first source of power is available to the gate circuits such that the control signals are valid before such availability.

摘要翻译： 方法和装置提供：响应于由至少一个控制电路提供的各个控制信号，使用多个门电路选择性地向系统的多个电路块提供第一电源; 以及在所述第一电源可用于所述门电路之前提供第二电源来操作所述控制电路，使得所述控制信号在所述可用性之前是有效的。

公开(公告)号：US07222040B1

公开(公告)日：2007-05-22

申请号：US11318222

申请日：2005-12-22

申请人： Yoichi Nishino ,  Hiroshi Yoshihara

发明人： Yoichi Nishino ,  Hiroshi Yoshihara

IPC分类号： G06F12/00 ,  G01R31/00

CPC分类号： G06F11/006 ,  G11C11/41 ,  G11C29/12 ,  G11C29/44 ,  G11C2029/4402

摘要： Methods and apparatus provide for: testing a static random access memory (SRAM) to obtain performance data on the SRAM; and using the performance data as at least a basis of a identification number.

摘要翻译： 方法和装置提供：测试静态随机存取存储器（SRAM）以获得SRAM上的性能数据; 并且使用演奏数据作为至少基于识别号码的基础。

公开(公告)号：US06996250B2

公开(公告)日：2006-02-07

申请号：US10123560

申请日：2002-04-15

申请人： Osamu Nakamura ,  Yoichi Nishino ,  Takashi Kohashi ,  Yuuki Matsumura ,  Shunichi Soma

发明人： Osamu Nakamura ,  Yoichi Nishino ,  Takashi Kohashi ,  Yuuki Matsumura ,  Shunichi Soma

IPC分类号： G06K9/00

CPC分类号： G06T1/0078 ,  G06T1/0071

摘要： A digital watermark embedding processor and digital watermark embedding-processing method set the lowest-common-multiple picture size of the sizes of an unconverted picture and a converted picture when embedding digital watermarks on certain data having a possibility of format conversion and set, for the lowest-common-multiple picture size, the values of the digital watermarks in the converted picture. Based on the set values, digital watermarks for the unconverted picture are set and are embedded in the picture. In this construction, even when a watermark-embedded picture is processed for conversion, it is ensured that accurate detection from the converted picture of watermarks can be performed.

摘要翻译： 数字水印嵌入处理器和数字水印嵌入处理方法在将数字水印嵌入到具有格式转换和设置的可能性的某些数据上时，设置未转换图像和转换图像的大小的最小公共多图像大小，对于 最小公共多图像大小，转换图像中的数字水印的值。 基于设定值，未转换图像的数字水印被设置并嵌入在图像中。 在这种结构中，即使处理水印嵌入图像进行转换，也可以确保可以进行从转换的水印图像的精确检测。

公开(公告)号：US5025419A

公开(公告)日：1991-06-18

申请号：US331275

申请日：1989-03-30

申请人： Yoichi Nishino

发明人： Yoichi Nishino

IPC分类号： G11C7/10

CPC分类号： G11C7/10 ,  G11C7/103

摘要： An input/output circuit wherein a plurality of data lines are provided with a serial/parallel conversion means common to all, so that the circuit is enabled to consume less power and draw a reduced instantaneous current in its operation and be fabricated in an integrated circuit form.

公开(公告)号：US20130167893A1

公开(公告)日：2013-07-04

申请号：US13820786

申请日：2011-09-07

申请人： Yoichi Nishino ,  Suguru Tanaka

发明人： Yoichi Nishino ,  Suguru Tanaka

IPC分类号： H01L35/32 ,  H01L35/20

CPC分类号： H01L35/32 ,  C22C38/06 ,  C22C38/12 ,  H01L35/20

摘要： A thermoelectric material has a Heusler alloy type crystal structure and is based on an Fe2VAl basic structure having a total number of valence electrons of 24 per chemical formula. The thermoelectric material has a structure expressed by General Formula Fe2V1−ZAl1+Z, where 0.03≦z≦0.12, or General Formula Fe2V1−ZAl1+Z, where −0.12≦z≦−0.03, by controlling its chemical compositional ratio. The former acts as a p-type material and has a Seebeck coefficient whose absolute value reaches a peak at a temperature of 400 K or higher; and the latter acts as an n-type material and has a Seebeck coefficient whose absolute value reaches a peak at a temperature of 310 K or higher.

摘要翻译： 热电材料具有Heusler合金型晶体结构，并且基于每个化学式具有总数为24的价电子的Fe2VA1基本结构。 通过控制其化学组成比，热电材料具有由通式Fe2V1-ZAl1 + Z表示的结构，其中0.03 @ z @ 0.12或通式Fe2V1-ZAl1 + Z，其中-0.12 @ z @ -0.03。 前者用作p型材料，并且具有在400K或更高的温度下其绝对值达到峰值的塞贝克系数; 后者作为n型材料，并具有在310K以上的温度下绝对值达到峰值的塞贝克系数。