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公开(公告)号：US20090052250A1
公开(公告)日：2009-02-26
申请号：US12178234
申请日：2008-07-23
IPC分类号： G11C16/04 , H01L21/3205
CPC分类号： H01L21/76837 , H01L27/11521 , H01L27/11568 , H01L29/40114 , H01L29/40117
摘要： A semiconductor memory device has a plurality of word line provided on a semiconductor region, extending in a row direction, a plurality of bit lines provided in the semiconductor region, extending in a column direction, and a plurality of memory elements provided at intersections between the plurality of word lines and the plurality of bit lines. Each word line provides a first gate electrode in the corresponding memory element. A lower portion of a side surface of each word line in a direction parallel to an extending direction of the word line is perpendicular to a main surface of the semiconductor region. An upper portion of the side surface is inclined so that a width thereof becomes smaller toward a top thereof.
摘要翻译： 半导体存储器件具有设置在沿行方向延伸的半导体区域上的多个字线，设置在半导体区域中的列列方向上延伸的多个位线，以及设置在列方向上的交叉点处的多个存储元件 多个字线和多个位线。 每个字线在对应的存储元件中提供第一栅电极。 每个字线的与字线的延伸方向平行的方向的侧面的下部垂直于半导体区域的主表面。 侧面的上部倾斜，使得其宽度朝向其顶部变小。
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公开(公告)号：US20110084277A1
公开(公告)日：2011-04-14
申请号：US12973292
申请日：2010-12-20
IPC分类号： H01L27/108
CPC分类号： H01L21/76837 , H01L27/11521 , H01L27/11568 , H01L29/40114 , H01L29/40117
摘要： A semiconductor memory device has a plurality of word line provided on a semiconductor region, extending in a row direction, a plurality of bit lines provided in the semiconductor region, extending in a column direction, and a plurality of memory elements provided at intersections between the plurality of word lines and the plurality of bit lines. Each word line provides a first gate electrode in the corresponding memory element. A lower portion of a side surface of each word line in a direction parallel to an extending direction of the word line is perpendicular to a main surface of the semiconductor region. An upper portion of the side surface is inclined so that a width thereof becomes smaller toward a top thereof.
摘要翻译： 半导体存储器件具有设置在沿行方向延伸的半导体区域上的多个字线，设置在半导体区域中的列列方向上延伸的多个位线，以及设置在列方向上的交叉点处的多个存储元件 多个字线和多个位线。 每个字线在对应的存储元件中提供第一栅电极。 每个字线的与字线的延伸方向平行的方向的侧面的下部垂直于半导体区域的主表面。 侧面的上部倾斜，使得其宽度朝向其顶部变小。
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公开(公告)号：US20090078988A1
公开(公告)日：2009-03-26
申请号：US12194915
申请日：2008-08-20
申请人： Yuichiro Higuchi , Keita Takahashi
发明人： Yuichiro Higuchi , Keita Takahashi
IPC分类号： H01L27/115 , H01L21/8247
CPC分类号： H01L23/5256 , H01L27/0251 , H01L27/1052 , H01L27/11517 , H01L27/11568 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a protection target element formed on a semiconductor substrate and includes a protection target element electrode, a substrate connecting part including a substrate connecting electrode electrically connected to the semiconductor substrate and a fuse structure provided between the protection target element electrode and the substrate connecting electrode and includes a fuse film configured to be torn by applying a predetermined current thereto. The protection target element electrode, the substrate connecting electrode and the fuse film are formed of an integral conductive film as long as the fuse film is not torn.
摘要翻译： 半导体器件包括形成在半导体衬底上的保护目标元件，并且包括保护对象元件电极，包括与半导体衬底电连接的衬底连接电极的衬底连接部分和设置在保护对象元件电极和衬底之间的熔丝结构 并且包括通过向其施加预定电流而被破坏的熔丝膜。 保护目标元件电极，基板连接电极和熔丝膜只要熔丝膜未被撕裂就由整体导电膜形成。
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公开(公告)号：US07821100B2
公开(公告)日：2010-10-26
申请号：US12194915
申请日：2008-08-20
申请人： Yuichiro Higuchi , Keita Takahashi
发明人： Yuichiro Higuchi , Keita Takahashi
CPC分类号： H01L23/5256 , H01L27/0251 , H01L27/1052 , H01L27/11517 , H01L27/11568 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a protection target element formed on a semiconductor substrate and includes a protection target element electrode, a substrate connecting part including a substrate connecting electrode electrically connected to the semiconductor substrate and a fuse structure provided between the protection target element electrode and the substrate connecting electrode and includes a fuse film configured to be torn by applying a predetermined current thereto. The protection target element electrode, the substrate connecting electrode and the fuse film are formed of an integral conductive film as long as the fuse film is not torn.
摘要翻译： 半导体器件包括形成在半导体衬底上的保护目标元件，并且包括保护对象元件电极，包括与半导体衬底电连接的衬底连接电极的衬底连接部分和设置在保护对象元件电极和衬底之间的熔丝结构 并且包括通过向其施加预定电流而被破坏的熔丝膜。 保护目标元件电极，基板连接电极和熔丝膜只要熔丝膜未被撕裂就由整体导电膜形成。
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