公开(公告)号：US20130113045A1

公开(公告)日：2013-05-09

申请号：US13290399

申请日：2011-11-07

申请人： Yung-Ju Wen ,  Chang-Tzu Wang ,  Tien-Hao Tang ,  Kuan-Cheng Su

发明人： Yung-Ju Wen ,  Chang-Tzu Wang ,  Tien-Hao Tang ,  Kuan-Cheng Su

IPC分类号： H01L29/78

CPC分类号： H01L29/78 ,  H01L27/0266 ,  H01L29/41758 ,  H01L29/4966

摘要： An electrostatic discharge (ESD) device is described, including a gate line, a source region at a first side of the gate line, a comb-shaped drain region disposed at a second side of the gate line and having comb-teeth parts, a salicide layer on the source region and the drain region, and contact plugs on the salicide layer on the source region and the drain region. Each comb-teeth part has thereon, at a tip portion thereof, at least one of the contact plugs.

摘要翻译： 描述了静电放电（ESD）器件，包括栅极线，栅极线第一侧的源极区域，设置在栅极线的第二侧并具有梳齿部分的梳状漏极区域， 源极区域和漏极区域上的自对准硅化物层，以及源极区域和漏极区域上的自对准硅化物层上的接触塞。 每个梳齿部分在其顶端部分上具有至少一个接触塞。

公开(公告)号：US20130168772A1

公开(公告)日：2013-07-04

申请号：US13338324

申请日：2011-12-28

申请人： Yung-Ju WEN

发明人： Yung-Ju WEN

IPC分类号： H01L27/092

CPC分类号： H01L27/0277

摘要： A semiconductor device for an electrostatic discharge (ESD) protecting circuit connected to a pad is provided. The semiconductor device includes a semiconductor substrate of a first conductivity type; a plurality of metal oxide semiconductor transistors (MOSFETs) formed in the semiconductor substrate, and an isolation structure of a second conductivity type formed in the semiconductor substrate. The MOFETS are arranged in parallel. Drain electrodes of the MOSFETs are electrically connected to the pad, gate electrodes and source electrodes of the MOSFETs are connected to a constant voltage, and the gate electrodes extend in a first direction. The isolation structure includes a bottom and at least two side walls, wherein the bottom is located under the MOSFETs and the two side walls are located at two sides of the MOSFETs, and the side walls extend in the first direction.

摘要翻译： 提供了一种用于连接到焊盘的静电放电（ESD）保护电路的半导体器件。 半导体器件包括第一导电类型的半导体衬底; 形成在半导体衬底中的多个金属氧化物半导体晶体管（MOSFET）和形成在半导体衬底中的第二导电类型的隔离结构。 MOFETS并行布置。 MOSFET的漏极电连接到焊盘，MOSFET的栅电极和源电极连接到恒定电压，并且栅电极沿第一方向延伸。 隔离结构包括底部和至少两个侧壁，其中底部位于MOSFET下方，并且两个侧壁位于MOSFET的两侧，并且侧壁沿第一方向延伸。

公开(公告)号：US08648421B2

公开(公告)日：2014-02-11

申请号：US13290399

申请日：2011-11-07

申请人： Yung-Ju Wen ,  Chang-Tzu Wang ,  Tien-Hao Tang ,  Kuan-Cheng Su

发明人： Yung-Ju Wen ,  Chang-Tzu Wang ,  Tien-Hao Tang ,  Kuan-Cheng Su

IPC分类号： H01L23/60

CPC分类号： H01L29/78 ,  H01L27/0266 ,  H01L29/41758 ,  H01L29/4966

摘要： An electrostatic discharge (ESD) device is described, including a gate line, a source region at a first side of the gate line, a comb-shaped drain region disposed at a second side of the gate line and having comb-teeth parts, a salicide layer on the source region and the drain region, and contact plugs on the salicide layer on the source region and the drain region. Each comb-teeth part has thereon, at a tip portion thereof, at least one of the contact plugs.

摘要翻译： 描述了静电放电（ESD）器件，包括栅极线，栅极线第一侧的源极区域，设置在栅极线的第二侧并具有梳齿部分的梳状漏极区域， 源极区域和漏极区域上的自对准硅化物层，以及源极区域和漏极区域上的自对准硅化物层上的接触塞。 每个梳齿部分在其顶端部分上具有至少一个接触塞。