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    INFORMATION PROCESSING SYSTEM, IMAGE FORMING APPARATUS, AND COMPUTER PROGRAM PRODUCT
    2.
    发明申请
    INFORMATION PROCESSING SYSTEM, IMAGE FORMING APPARATUS, AND COMPUTER PROGRAM PRODUCT 有权
    信息处理系统，图像形成装置和计算机程序产品

    公开(公告)号：US20160050324A1

    公开(公告)日：2016-02-18

    申请号：US14827541

    申请日：2015-08-17

    申请人： Takaaki OHSHITA ,  Yutaka NAKAMURA

    发明人： Takaaki OHSHITA ,  Yutaka NAKAMURA

    IPC分类号： H04N1/00 ,  G06F17/24 ,  H04N1/04

    CPC分类号： H04N1/00108 ,  G06F17/243 ,  G06F17/30879 ,  H04N1/04

    摘要： The system includes a terminal apparatus and an image forming apparatus that comprises: a communication unit that performs near field wireless communication; a communication controller that controls the communication unit so as to receive document identification information for identifying a document and personal information to be input to the document transmitted from the terminal apparatus through near field wireless communication; a storage unit that stores document identification information for identifying a document, document image information, and entry position information of entries in association with each other for each document; and an information combining unit that searches the storage unit for the document image information and the entry position information stored in association with the same document identification information as the received document identification information and generates a combined image in which the received personal information is combined at a position on a document image indicated by the entry position information.

    摘要翻译： 该系统包括终端装置和图像形成装置，其包括：执行近场无线通信的通信单元; 通信控制器，其控制通信单元，以便接收用于识别要通过近场无线通信从终端设备发送的文档的文档和个人信息的文档识别信息; 存储单元，其针对每个文档彼此相关联地存储用于识别文档的文档标识信息，文档图像信息和条目的输入位置信息; 以及信息组合单元，用于在存储单元中搜索与所接收的文档识别信息相同的文档标识信息存储的文档图像信息和入口位置信息，并生成其中接收到的个人信息被组合在一起的组合图像 由输入位置信息指示的文档图像上的位置。

    Card device and socket
    3.
    发明授权
    Card device and socket 有权
    卡设备和插座

    公开(公告)号：US09004950B2

    公开(公告)日：2015-04-14

    申请号：US13697636

    申请日：2011-05-26

    申请人： Yutaka Nakamura

    发明人： Yutaka Nakamura

    IPC分类号： H01R31/06 ,  H01R9/00 ,  G06K19/077

    CPC分类号： G06K19/07743 ,  G06K19/07732

    摘要： A card device for insertion into and ejection from a host device. The card device includes a first electrode array including first electrodes linearly aligned in a second direction along the leading edge, and a second electrode array including second electrodes aligned in the second direction between the first electrode array and the trailing edge. A first concave region includes electrodes from the first and second electrode array. A second concave region, adjacent to the first concave region, includes a first region, which is adjacent to the first electrodes in the first concave region, and a second region, which is adjacent to the second electrodes in the first concave region. At least one of the first electrodes is situated in the first region of the second concave region, and no electrodes are situated in the second region of the second concave region.

    摘要翻译： 用于插入主机装置并从主机装置弹出的卡装置。 卡装置包括第一电极阵列，其包括沿着前缘沿着第二方向线性排列的第一电极，以及包括在第一电极阵列和后缘之间沿第二方向对准的第二电极的第二电极阵列。 第一凹区包括来自第一和第二电极阵列的电极。 与第一凹区相邻的第二凹区包括与第一凹区中的第一电极相邻的第一区域和与第一凹区域中的第二电极相邻的第二区域。 第一电极中的至少一个位于第二凹区的第一区域中，并且没有电极位于第二凹区的第二区域中。

    CARD COMMUNICATION DEVICE
    4.
    发明申请
    CARD COMMUNICATION DEVICE 审中-公开
    卡通信设备

    公开(公告)号：US20140051353A1

    公开(公告)日：2014-02-20

    申请号：US13759135

    申请日：2013-02-05

    申请人： Yutaka NAKAMURA

    发明人： Yutaka NAKAMURA

    IPC分类号： H04B5/00

    CPC分类号： H04B5/0031

    摘要： A card communication device comprises an antenna, a card socket to which a memory card is attached, a detector for detecting whether the memory card is attached to the card socket or not, a switching section for switching electrical connection of a terminal of the antenna to a predetermined connecting terminal of the memory card attached to the card socket between an on state and an off state, and a controller for controlling an operation of the switching section. When the detector detects the attachment of the memory card to the card socket, the controller determines a type of the attached memory card, and only when the determined memory card is a specific type of the memory card, the controller controls the switching section so that the electric connection is switched from the off state into the on state.

    摘要翻译： 一种卡通信装置，包括天线，与其相连的存储卡的卡插座，用于检测存储卡是否连接到卡插槽的检测器，用于切换天线的端子的电连接的切换部分 在接通状态和断开状态之间连接到卡插槽的存储卡的预定连接端子和用于控制切换部分的操作的控制器。 当检测器检测到存储卡与卡插槽的连接时，控制器确定所附存储卡的类型，并且只有当确定的存储卡是存储卡的特定类型时，控制器控制切换部分，使得 电连接从断开状态切换到接通状态。

    Spin-torque transfer magneto-resistive memory architecture
    5.
    发明授权
    Spin-torque transfer magneto-resistive memory architecture 有权
    自旋扭矩传递磁阻存储器架构

    公开(公告)号：US08446757B2

    公开(公告)日：2013-05-21

    申请号：US12858879

    申请日：2010-08-18

    申请人： John K. DeBrosse ,  Yutaka Nakamura

    发明人： John K. DeBrosse ,  Yutaka Nakamura

    IPC分类号： G11C11/00

    CPC分类号： G11C11/16 ,  G11C11/1655 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1693 ,  Y10S977/935

    摘要： A memory array device comprising a first memory cell comprising a first magnetic tunnel junction device having a first terminal connected to a first bit line (BLTE) and a second terminal, and a first field effect transistor (FET) having a source terminal connected to a second bit line (BLC), a gate terminal connected to a word line (WL), and a drain terminal connected to the second terminal of the first magnetic tunnel junction device, and a second memory cell comprising, a second magnetic tunnel junction device having a first terminal connected to a third bit line (BLT0) and a second terminal, and a second field effect transistor (FET) having a source terminal connected to the second bit line (BLC), a gate terminal connected to the word line (WL), and a drain terminal connected to the second terminal of the second magnetic tunnel junction device.

    摘要翻译： 一种存储器阵列器件，包括第一存储器单元，该第一存储器单元包括具有连接到第一位线（BLTE）的第一端子和第二端子的第一磁性隧道结器件，以及具有与源极端子连接的第一场效应晶体管 第二位线（BLC），连接到字线（WL）的栅极端子和连接到第一磁性隧道结装置的第二端子的漏极端子，以及第二存储单元，其包括：第二磁性隧道结装置， 连接到第三位线（BLT0）和第二端子的第一端子和具有连接到第二位线（BLC）的源极端子的第二场效应晶体管（FET），连接到字线（WL）的栅极端子 ）和连接到第二磁性隧道结装置的第二端子的漏极端子。

    CARD DEVICE AND SOCKET
    6.
    发明申请
    CARD DEVICE AND SOCKET 有权
    卡设备和插座

    公开(公告)号：US20130059452A1

    公开(公告)日：2013-03-07

    申请号：US13697636

    申请日：2011-05-26

    申请人： Yutaka Nakamura

    发明人： Yutaka Nakamura

    IPC分类号： H01R12/72

    CPC分类号： G06K19/07743 ,  G06K19/07732

    摘要： The present application discloses a card device configured to be inserted into and ejected from a host device in a first direction. The card device includes a first housing including a leading edge which is inserted into the host device on ahead, and a trailing edge opposite to the leading edge; a first electrode array including first electrodes aligned in a second direction along the leading edge; and a second electrode array including second electrodes aligned in the second direction between the first electrode array and the trailing edge. The second electrodes include an electrode shifted from the first electrodes in the second direction.

    摘要翻译： 本申请公开了一种被配置为沿第一方向插入主机装置并从主装置弹出的卡装置。 卡装置包括：第一壳体，其包括在前方插入主机装置中的前缘和与前缘相对的后缘; 第一电极阵列，包括沿着前缘在第二方向上排列的第一电极; 以及第二电极阵列，包括在第一电极阵列和后缘之间沿第二方向排列的第二电极。 第二电极包括沿第二方向从第一电极移位的电极。

    Spin-Torque Transfer Magneto-Resistive Memory Architecture
    7.
    发明申请
    Spin-Torque Transfer Magneto-Resistive Memory Architecture 失效
    自旋转移磁阻存储器架构

    公开(公告)号：US20120294071A1

    公开(公告)日：2012-11-22

    申请号：US13559672

    申请日：2012-07-27

    申请人： John K. DeBrosse ,  Yutaka Nakamura

    发明人： John K. DeBrosse ,  Yutaka Nakamura

    IPC分类号： G11C11/16

    CPC分类号： G11C11/16 ,  G11C11/1655 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1693 ,  Y10S977/935

    摘要： A system includes a processor and a memory array connected to the processor comprising a first memory cell comprising a first magnetic tunnel junction device having a first terminal connected to a first bit line and a second terminal, and a first field effect transistor having a source terminal connected to a second bit line, a gate terminal connected to a word line, and a drain terminal connected to the second terminal of the first magnetic tunnel junction device, and a second memory cell comprising a second magnetic tunnel junction device having a first terminal connected to a third bit line and a second terminal, and a second field effect transistor having a source terminal connected to the second bit line, a gate terminal connected to the word line, and a drain terminal connected to the second terminal of the second magnetic tunnel junction device.

    摘要翻译： 一种系统包括处理器和连接到处理器的存储器阵列，该存储器阵列包括第一存储器单元，该第一存储器单元包括具有连接到第一位线的第一端子和第二端子的第一磁性隧道结器件，以及具有源极端子的第一场效应晶体管 连接到第二位线，连接到字线的栅极端子和连接到第一磁性隧道结装置的第二端子的漏极端子，以及包括第二磁性隧道结装置的第二存储单元，第二磁性隧道结装置具有第一端子连接 至第三位线和第二端子，以及第二场效应晶体管，其源极端子连接到第二位线，连接到字线的栅极端子和连接到第二磁通道的第二端子的漏极端子 连接装置。

    Spin-Torque Transfer Magneto-Resistive Memory Architecture
    9.
    发明申请
    Spin-Torque Transfer Magneto-Resistive Memory Architecture 有权
    自旋转移磁阻存储器架构

    公开(公告)号：US20120044754A1

    公开(公告)日：2012-02-23

    申请号：US12858879

    申请日：2010-08-18

    申请人： John K. DeBrosse ,  Yutaka Nakamura

    发明人： John K. DeBrosse ,  Yutaka Nakamura

    IPC分类号： G11C11/14

    CPC分类号： G11C11/16 ,  G11C11/1655 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1693 ,  Y10S977/935

    摘要： A memory array device comprising a first memory cell comprising a first magnetic tunnel junction device having a first terminal connected to a first bit line (BLTE) and a second terminal, and a first field effect transistor (FET) having a source terminal connected to a second bit line (BLC), a gate terminal connected to a word line (WL), and a drain terminal connected to the second terminal of the first magnetic tunnel junction device, and a second memory cell comprising, a second magnetic tunnel junction device having a first terminal connected to a third bit line (BLT0) and a second terminal, and a second field effect transistor (FET) having a source terminal connected to the second bit line (BLC), a gate terminal connected to the word line (WL), and a drain terminal connected to the second terminal of the second magnetic tunnel junction device.

    摘要翻译： 一种存储器阵列器件，包括第一存储器单元，该第一存储器单元包括具有连接到第一位线（BLTE）的第一端子和第二端子的第一磁性隧道结器件，以及具有与源极端子连接的第一场效应晶体管 第二位线（BLC），连接到字线（WL）的栅极端子和连接到第一磁性隧道结装置的第二端子的漏极端子，以及第二存储单元，其包括：第二磁性隧道结装置， 连接到第三位线（BLT0）和第二端子的第一端子和具有连接到第二位线（BLC）的源极端子的第二场效应晶体管（FET），连接到字线（WL）的栅极端子 ）和连接到第二磁性隧道结装置的第二端子的漏极端子。