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公开(公告)号:US20080012045A1
公开(公告)日:2008-01-17
申请号:US11776393
申请日:2007-07-11
申请人: Akira Muto , Ichio Shimizu , Tetsuo Iljima , Toshiyuki Hata , Katsuo Ishizaka
发明人: Akira Muto , Ichio Shimizu , Tetsuo Iljima , Toshiyuki Hata , Katsuo Ishizaka
IPC分类号: H01L31/111 , H01L21/00
CPC分类号: H01L23/49562 , H01L21/565 , H01L23/49524 , H01L23/49575 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2224/05553 , H01L2224/37147 , H01L2224/40095 , H01L2224/40137 , H01L2224/40139 , H01L2224/40247 , H01L2224/45124 , H01L2224/45144 , H01L2224/48247 , H01L2224/49171 , H01L2224/73221 , H01L2224/83801 , H01L2224/84801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12036 , H01L2924/1305 , H01L2924/13055 , H01L2924/181 , H01L2924/30107 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要: A semiconductor device is provided, which is capable of improving mounting flexibility relatively and increasing general versatility, as well as realizing heat radiation characteristics and low on-resistance. Moreover, the semiconductor device is provided, which is capable of improving reliability, performing processing in manufacturing processes easily and reducing manufacturing costs. Also, the semiconductor device capable of decreasing the mounting area is provided. A semiconductor chip in which an IGBT is formed and a semiconductor chip in which a diode is formed are mounted over a die pad. Then, the semiconductor chip and the semiconductor chip are connected by using a clip. The clip is arranged so as not to overlap with bonding pads formed at the semiconductor chip in a flat state. The bonding pads formed at the semiconductor chip are connected to electrodes by using wires.
摘要翻译: 提供了一种半导体器件,其能够相对地提高安装灵活性并增加通用性,并且实现热辐射特性和低导通电阻。 此外,提供了能够提高可靠性,容易地进行制造工艺的处理并降低制造成本的半导体器件。 此外,还提供了能够减小安装面积的半导体器件。 其中形成IGBT的半导体芯片和其中形成有二极管的半导体芯片安装在管芯焊盘上。 然后,使用夹子连接半导体芯片和半导体芯片。 夹子被布置成不与形成在半导体芯片处的平坦状态的接合焊盘重叠。 通过使用导线将形成在半导体芯片上的接合焊盘连接到电极。
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公开(公告)号:US08138600B2
公开(公告)日:2012-03-20
申请号:US11776393
申请日:2007-07-11
申请人: Akira Muto , Ichio Shimizu , Tetsuo Iljima , Toshiyuki Hata , Katsuo Ishizaka
发明人: Akira Muto , Ichio Shimizu , Tetsuo Iljima , Toshiyuki Hata , Katsuo Ishizaka
IPC分类号: H01L23/34
CPC分类号: H01L23/49562 , H01L21/565 , H01L23/49524 , H01L23/49575 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2224/05553 , H01L2224/37147 , H01L2224/40095 , H01L2224/40137 , H01L2224/40139 , H01L2224/40247 , H01L2224/45124 , H01L2224/45144 , H01L2224/48247 , H01L2224/49171 , H01L2224/73221 , H01L2224/83801 , H01L2224/84801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12036 , H01L2924/1305 , H01L2924/13055 , H01L2924/181 , H01L2924/30107 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要: A semiconductor device is provided, which is capable of improving mounting flexibility relatively and increasing general versatility, as well as realizing heat radiation characteristics and low on-resistance. Moreover, the semiconductor device is provided, which is capable of improving reliability, performing processing in manufacturing processes easily and reducing manufacturing costs. Also, the semiconductor device capable of decreasing the mounting area is provided. A semiconductor chip in which an IGBT is formed and a semiconductor chip in which a diode is formed are mounted over a die pad. Then, the semiconductor chip and the semiconductor chip are connected by using a clip. The clip is arranged so as not to overlap with bonding pads formed at the semiconductor chip in a flat state. The bonding pads formed at the semiconductor chip are connected to electrodes by using wires.
摘要翻译: 提供了一种半导体器件,其能够相对地提高安装灵活性并增加通用性,并且实现热辐射特性和低导通电阻。 此外,提供了能够提高可靠性,容易地进行制造工艺的处理并降低制造成本的半导体器件。 此外,还提供了能够减小安装面积的半导体器件。 其中形成IGBT的半导体芯片和其中形成有二极管的半导体芯片安装在管芯焊盘上。 然后,使用夹子连接半导体芯片和半导体芯片。 夹子被布置成不与形成在半导体芯片处的平坦状态的接合焊盘重叠。 通过使用导线将形成在半导体芯片上的接合焊盘连接到电极。
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公开(公告)号:US20060043618A1
公开(公告)日:2006-03-02
申请号:US11173740
申请日:2005-06-30
申请人: Kisho Ashida , Akira Muto , Ichio Shimizu , Toshiyuki Hata , Kenya Kawano , Naotaka Tanaka , Nae Hisano
发明人: Kisho Ashida , Akira Muto , Ichio Shimizu , Toshiyuki Hata , Kenya Kawano , Naotaka Tanaka , Nae Hisano
IPC分类号: H01L31/109
CPC分类号: H01L24/40 , H01L21/566 , H01L23/49562 , H01L24/37 , H01L2224/32014 , H01L2224/32245 , H01L2224/371 , H01L2224/37147 , H01L2224/3754 , H01L2224/83801 , H01L2224/84801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/1306 , H01L2924/14 , H01L2924/181 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要: A semiconductor device has a semiconductor chip including first and second surfaces opposed to each other in a thickness direction of the semiconductor chip, wherein the first and second surfaces include first and second electrode surfaces respectively, and first and second electrically conductive members covering the first and second electrode surfaces respectively as seen in the thickness direction to be electrically connected to the first and second electrode surfaces respectively.
摘要翻译: 半导体器件具有包括在半导体芯片的厚度方向上彼此相对的第一和第二表面的半导体芯片,其中第一和第二表面分别包括第一和第二电极表面,第一和第二导电构件覆盖第一和第二电极表面, 第二电极表面分别在厚度方向上看到以分别电连接到第一和第二电极表面。
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公开(公告)号:US07432594B2
公开(公告)日:2008-10-07
申请号:US11173740
申请日:2005-06-30
申请人: Kisho Ashida , Akira Muto , Ichio Shimizu , Toshiyuki Hata , Kenya Kawano , Naotaka Tanaka , Nae Hisano
发明人: Kisho Ashida , Akira Muto , Ichio Shimizu , Toshiyuki Hata , Kenya Kawano , Naotaka Tanaka , Nae Hisano
CPC分类号: H01L24/40 , H01L21/566 , H01L23/49562 , H01L24/37 , H01L2224/32014 , H01L2224/32245 , H01L2224/371 , H01L2224/37147 , H01L2224/3754 , H01L2224/83801 , H01L2224/84801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/1306 , H01L2924/14 , H01L2924/181 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要: A semiconductor device has a semiconductor chip including first and second surfaces opposed to each other in a thickness direction of the semiconductor chip, wherein the first and second surfaces include first and second electrode surfaces respectively, and first and second electrically conductive members covering the first and second electrode surfaces respectively as seen in the thickness direction to be electrically connected to the first and second electrode surfaces respectively.
摘要翻译: 半导体器件具有包括在半导体芯片的厚度方向上彼此相对的第一和第二表面的半导体芯片,其中第一和第二表面分别包括第一和第二电极表面,第一和第二导电构件覆盖第一和第二表面 第二电极表面分别在厚度方向上看到以分别电连接到第一和第二电极表面。
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公开(公告)号:US07220617B2
公开(公告)日:2007-05-22
申请号:US11349219
申请日:2006-02-08
申请人: Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
发明人: Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
CPC分类号: H01L23/24 , H01L21/52 , H01L23/488 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L2224/05155 , H01L2224/05166 , H01L2224/05568 , H01L2224/05573 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/40225 , H01L2224/73153 , H01L2224/73253 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00014
摘要: A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals being exposed. Mounting surfaces of the metal plate terminals and a third part of the metal cap are bonded to electrodes on a mounting board.
摘要翻译: 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内,而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅电极和源电极,并且栅极电极和源极电极与金属板端子接合。 此外,半导体芯片被树脂密封体密封,金属板端子的安装表面露出。 金属板端子和金属盖的第三部分的安装表面与安装板上的电极接合。
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公开(公告)号:US20060175700A1
公开(公告)日:2006-08-10
申请号:US11349219
申请日:2006-02-08
申请人: Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
发明人: Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
IPC分类号: H01L23/34
CPC分类号: H01L23/24 , H01L21/52 , H01L23/488 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L2224/05155 , H01L2224/05166 , H01L2224/05568 , H01L2224/05573 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/40225 , H01L2224/73153 , H01L2224/73253 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00014
摘要: A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals being exposed. Mounting surfaces of the metal plate terminals and a third part of the metal cap are bonded to electrodes on a mounting board.
摘要翻译: 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内,而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅极电极和源极电极,并且栅极电极和源极电极与金属板端子接合。此外,半导体芯片由树脂密封体 金属板端子的安装表面露出。 金属板端子和金属盖的第三部分的安装表面与安装板上的电极接合。
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公开(公告)号:US20070210430A1
公开(公告)日:2007-09-13
申请号:US11783919
申请日:2007-04-13
申请人: Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
发明人: Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
IPC分类号: H01L23/02
CPC分类号: H01L23/24 , H01L21/52 , H01L23/488 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L2224/05155 , H01L2224/05166 , H01L2224/05568 , H01L2224/05573 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/40225 , H01L2224/73153 , H01L2224/73253 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00014
摘要: A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals 6G, 6S via connection materials 5b, 5c. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals 6G, 6S being exposed. Mounting surfaces of the metal plate terminals 6G, 6S and a third part of the metal cap are bonded to electrodes on a mounting board 10 via connection materials 5e, 5f and 5g.
摘要翻译: 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内,而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅电极和源电极,并且栅电极和源电极通过连接材料5b,5c连接金属板端子6G,6S 。 此外,半导体芯片由金属板端子6G,6S的露出的安装面的树脂密封体密封。 金属板端子6G,6S和金属盖的第三部分的安装表面通过连接材料5e,5f和5g与安装板10上的电极接合。
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公开(公告)号:US20080268577A1
公开(公告)日:2008-10-30
申请号:US12164625
申请日:2008-06-30
申请人: Hidemasa KAGII , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
发明人: Hidemasa KAGII , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
IPC分类号: H01L21/00
CPC分类号: H01L23/24 , H01L21/52 , H01L23/488 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L2224/05155 , H01L2224/05166 , H01L2224/05568 , H01L2224/05573 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/40225 , H01L2224/73153 , H01L2224/73253 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00014
摘要: A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals 6G, 6S via connection materials 5b, 5c. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals 6G, 6S being exposed. Mounting surfaces of the metal plate terminals 6G, 6S and a third part of the metal cap are bonded to electrodes on a mounting board 10 via connection materials 5e, 5f and 5g.
摘要翻译: 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内,而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅电极和源电极,并且栅电极和源电极通过连接材料5b,5c连接金属板端子6G,6S 。 此外,半导体芯片由金属板端子6G,6S的露出的安装面的树脂密封体密封。 金属板端子6G,6S和金属盖的第三部分的安装表面通过连接材料5e,5f和5g与安装板10上的电极接合。
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公开(公告)号:US20080224282A1
公开(公告)日:2008-09-18
申请号:US12011397
申请日:2008-01-25
申请人: Kisho Ashida , Kenya Kawano , Akira Muto , Ichio Shimizu
发明人: Kisho Ashida , Kenya Kawano , Akira Muto , Ichio Shimizu
IPC分类号: H01L23/495 , H01L21/56
CPC分类号: H01L23/4334 , H01L21/565 , H01L23/49524 , H01L23/49562 , H01L23/49575 , H01L24/36 , H01L24/40 , H01L24/41 , H01L24/45 , H01L24/48 , H01L2224/05554 , H01L2224/40137 , H01L2224/40245 , H01L2224/45144 , H01L2224/48091 , H01L2224/73221 , H01L2224/83801 , H01L2224/84801 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/1305 , H01L2924/13055 , H01L2924/181 , H01L2924/00 , H01L2224/05599 , H01L2924/00012 , H01L2224/37099
摘要: A technique for preventing cracks and residual resin on a semiconductor chip in a molding process in the assembly of semiconductor devices is provided. A distance from a bottom surface of a cavity of a lower mold die to a ceiling surface of a cavity of an upper mold die of a resin molding die is made same as or smaller than a distance from a lower surface of a die pad to an upper surface of a plate terminal, and an U-shape elastic body is arranged on semiconductor elements between the plate terminal and the die pad, thereby mitigating a load due to a clamp pressure of mold dies in the molding process by an elastic deformation of the elastic body. Consequently, a load applied on the semiconductor devices is reduced, thereby preventing formation of cracks on the semiconductor elements.
摘要翻译: 提供了一种用于在半导体器件的组装中的模制工艺中防止半导体芯片上的裂纹和残留树脂的技术。 与树脂成型模具的上模具的模腔的下表面的下表面的距离与从模垫的下表面到 板端子的上表面和U形弹性体布置在板端子和管芯焊盘之间的半导体元件上,从而通过模制过程中的模具的弹性变形来减轻由于模具的夹紧压力引起的负载 弹性体。 因此,施加在半导体器件上的负载减小,从而防止在半导体元件上形成裂纹。
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公开(公告)号:US07405469B2
公开(公告)日:2008-07-29
申请号:US11783919
申请日:2007-04-13
申请人: Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
发明人: Hidemasa Kagii , Akira Muto , Ichio Shimizu , Katsuo Arai , Hiroshi Sato , Hiroyuki Nakamura , Masahiko Osaka , Takuya Nakajo , Keiichi Okawa , Hiroi Oka
IPC分类号: H01L23/495
CPC分类号: H01L23/24 , H01L21/52 , H01L23/488 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L2224/05155 , H01L2224/05166 , H01L2224/05568 , H01L2224/05573 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/40225 , H01L2224/73153 , H01L2224/73253 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00014
摘要: A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals 6G, 6S via connection materials 5b, 5c. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals 6G, 6S being exposed. Mounting surfaces of the metal plate terminals 6G, 6S and a third part of the metal cap are bonded to electrodes on a mounting board 10 via connection materials 5e, 5f and 5g.
摘要翻译: 半导体芯片由树脂密封而不覆盖具有功率晶体管的半导体器件的外部端子。 具有功率晶体管的半导体芯片容纳在金属盖的凹部内,而半导体芯片的第一表面上的漏电极经由连接材料接合到凹部的底部。 在与半导体芯片的第一表面相对的第二表面上形成栅电极和源电极,并且栅电极和源电极通过连接材料5b,5c连接金属板端子6G,6S 。 此外,半导体芯片由金属板端子6G,6S的露出的安装面的树脂密封体密封。 金属板端子6G,6S和金属盖的第三部分的安装表面通过连接材料5e,5f和5g与安装板10上的电极接合。
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