公开(公告)号：US20050025434A1

公开(公告)日：2005-02-03

申请号：US10631933

申请日：2003-07-31

申请人： Alan Benner ,  Evan Colgan ,  How Lin ,  John Magerlein ,  Frank Pompeo ,  Subhash Shinde ,  Daniel Stigliani

发明人： Alan Benner ,  Evan Colgan ,  How Lin ,  John Magerlein ,  Frank Pompeo ,  Subhash Shinde ,  Daniel Stigliani

IPC分类号： G02B6/36 ,  G02B6/42 ,  G06F1/20 ,  G06F3/00

CPC分类号： G02B6/4201 ,  G02B6/4246 ,  G02B6/4249 ,  G02B6/4268 ,  G02B6/4281 ,  G02B6/4283 ,  G02B6/4292

摘要： An optoelectronic assembly for a computer system includes an electronic chip(s), a substrate, an electrical signaling medium, an optoelectronic transducer, and an optical coupling guide. The electronic chip(s) is in communication with the substrate, which is in communication with a first end of the electrical signaling medium. A second end of the electrical signaling medium is in communication with the optoelectronic transducer, and includes the optical coupling guide for aligning an optical signaling medium with the optoelectronic transducer. An electrical signal from the electronic chip is communicated to the optoelectronic transducer via the substrate and the electrical signaling medium. The optical transducer and electronic chip(s) share a common heat spreader, and communication to other groups of electronic chip(s) is done without the need for communication via a second level electrical package.

摘要翻译： 用于计算机系统的光电组件包括电子芯片，基板，电信号介质，光电转换器和光耦合引导件。 电子芯片与基板通信，该基板与电信号介质的第一端连通。 电信令介质的第二端与光电换能器通信，并且包括用于使光信号介质与光电换能器对准的光耦合引导件。 来自电子芯片的电信号通过衬底和电信令介质传送到光电换能器。 光学传感器和电子芯片共享共同的散热器，并且完成与其他电子芯片组的通信，而不需要通过第二级电气封装进行通信。

公开(公告)号：US20060002087A1

公开(公告)日：2006-01-05

申请号：US10883534

申请日：2004-07-01

申请人： Raschid Bezama ,  Evan Colgan ,  John Magerlein ,  Roger Schmidt

发明人： Raschid Bezama ,  Evan Colgan ,  John Magerlein ,  Roger Schmidt

IPC分类号： H05K7/20

CPC分类号： H01L23/473 ,  F28F3/12 ,  F28F9/028 ,  F28F13/06 ,  F28F2260/02 ,  H01L2924/0002 ,  H01L2924/00

摘要： Apparatus and methods are provided for microchannel cooling of electronic devices such as IC chips, which enable efficient and low operating pressure microchannel cooling of high power density electronic devices. Apparatus for microchannel cooling include integrated microchannel heat sink devices and fluid distribution manifold structures that are designed to provide uniform flow and distribution of coolant fluid and minimize pressure drops along coolant flow paths.

摘要翻译： 提供了用于诸如IC芯片的电子器件的微通道冷却的装置和方法，其能够实现高功率密度电子器件的高效和低工作压力的微通道冷却。 用于微通道冷却的装置包括集成微通道散热装置和流体分配歧管结构，其被设计成提供冷却剂流体的均匀流动和分布并使沿着冷却剂流动路径的压降最小化。

公开(公告)号：US20050127500A1

公开(公告)日：2005-06-16

申请号：US10732015

申请日：2003-12-10

申请人： Evan Colgan ,  Claudis Feger ,  Gary Goth ,  George Katopis ,  John Magerlein ,  Edmund Sprogis

发明人： Evan Colgan ,  Claudis Feger ,  Gary Goth ,  George Katopis ,  John Magerlein ,  Edmund Sprogis

IPC分类号： H01L23/34 ,  H01L21/50 ,  H01L21/56 ,  H01L23/10 ,  H01L23/12 ,  H01L23/36 ,  H01L23/367 ,  H01L23/373

CPC分类号： H01L23/367 ,  H01L23/3737 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

摘要： In an integrated circuit packaging structure, such as in an MCM or in a SCM, a compliant thermally conductive material is applied between a heat-generating integrated circuit chip and a substrate attached thereto. Raised regions are defined on the back side of the chip aligned to areas of a higher than average power density on the front active surface of the chip such that a thinner layer of the compliant thermally conductive material is disposed between the chip and the substrate in this area after assembly thereof resulting in a reduced “hot-spot” temperature on the chip. In an exemplary embodiment, the substrate includes one of a heat sink, cooling plate, thermal spreader, heat pipe, thermal hat, package lid, or other cooling member.

摘要翻译： 在诸如在MCM或SCM中的集成电路封装结构中，在发热集成电路芯片和附着于其之间的衬底之间施加兼容的导热材料。 凸起区域被限定在芯片的背面上，与芯片的前活性表面上的高于平均功率密度的区域相对准，使得在该芯片和衬底之间设置较薄的柔性导热材料层 组装后的区域导致芯片上的“热点”温度降低。 在示例性实施例中，基板包括散热器，冷却板，散热器，热管，散热帽，封装盖或其它冷却构件中的一个。

公开(公告)号：US20070232090A1

公开(公告)日：2007-10-04

申请号：US11395355

申请日：2006-03-31

申请人： Evan Colgan ,  Paul Coteus ,  Hubert Harrer ,  Gareth Hougham ,  John Magerlein ,  John Torok

发明人： Evan Colgan ,  Paul Coteus ,  Hubert Harrer ,  Gareth Hougham ,  John Magerlein ,  John Torok

IPC分类号： H01R12/00

CPC分类号： H05K1/141 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/09701 ,  H01L2924/3011 ,  H01R12/7082 ,  H01R13/2414 ,  H05K2201/0367 ,  H05K2201/049 ,  H05K2201/10378 ,  H05K2201/10719

摘要： LGA (land grid array) interposers having variable pitch connectors and distribution wiring to support space transforming I/O interconnections between first level chip modules and second level packaging. Apparatus and methods for constructing high-performance electronic modules (such as processor modules for computer systems) using LGA interposers that provide space transform I/O interconnections between fine pitch I/O contacts on a chip module and coarse pitch contacts on a circuit board.

摘要翻译： 具有可变节距连接器和配线的LGA（地面栅格阵列）插入器，以支持第一级芯片模块与第二级封装之间的空间转换I / O互连。 使用LGA插入器构建高性能电子模块（例如计算机系统的处理器模块）的装置和方法，其提供芯片模块上的精细间距I / O触点与电路板上的粗略俯仰触点之间的空间变换I / O互连。

公开(公告)号：US20060002088A1

公开(公告)日：2006-01-05

申请号：US10883392

申请日：2004-07-01

申请人： Raschid Bezama ,  Evan Colgan ,  John Magerlein ,  Roger Schmidt

发明人： Raschid Bezama ,  Evan Colgan ,  John Magerlein ,  Roger Schmidt

IPC分类号： H05K7/20

CPC分类号： F28F3/04 ,  F28F3/12 ,  F28F2260/02 ,  H01L23/473 ,  H01L2924/0002 ,  H01L2924/00

摘要： Apparatus and methods are provided for microchannel cooling of electronic devices such as IC chips, which enable efficient and low operating pressure microchannel cooling of high power density electronic devices having a non-uniform power density distribution, which are mounted face down on a package substrate. For example, integrated microchannel cooler devices (or microchannel heat sink devices) for cooling IC chips are designed to provide uniform flow and distribution of coolant fluid and minimize pressure drops along coolant flow paths, as well as provide variable localized cooling capabilities for high power density regions (or “hot spots”) of IC chips with higher than average power densities.

公开(公告)号：US20060164194A1

公开(公告)日：2006-07-27

申请号：US11358823

申请日：2006-02-21

申请人： Hariklia Deligianni ,  Panayotis Andricacos ,  L. Paivikki Buchwalter ,  John Cotte ,  Christopher Jahnes ,  Mahadevaiyer Krishnan ,  John Magerlein ,  Kenneth Stein ,  Richard Volant ,  James Tornello ,  Jennifer Lund

发明人： Hariklia Deligianni ,  Panayotis Andricacos ,  L. Paivikki Buchwalter ,  John Cotte ,  Christopher Jahnes ,  Mahadevaiyer Krishnan ,  John Magerlein ,  Kenneth Stein ,  Richard Volant ,  James Tornello ,  Jennifer Lund

IPC分类号： H01H51/22

CPC分类号： H01H59/0009 ,  H01H2001/0052 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/49204

摘要： A semiconductor micro-electromechanical system (MEMS) switch provided with noble metal contacts that act as an oxygen barrier to copper electrodes is described. The MEMS switch is fully integrated into a CMOS semiconductor fabrication line. The integration techniques, materials and processes are fully compatible with copper chip metallization processes and are typically, a low cost and a low temperature process (below 400° C.). The MEMS switch includes: a movable beam within a cavity, the movable beam being anchored to a wall of the cavity at one or both ends of the beam; a first electrode embedded in the movable beam; and a second electrode embedded in an wall of the cavity and facing the first electrode, wherein the first and second electrodes are respectively capped by the noble metal contact.

摘要翻译： 描述了提供有作为铜电极的氧阻隔的贵金属触点的半导体微机电系统（MEMS）开关。 MEMS开关完全集成到CMOS半导体制造线中。 集成技术，材料和工艺完全兼容铜芯片金属化工艺，通常是低成本和低温工艺（低于400℃）。 MEMS开关包括：在空腔内的可移动光束，可移动光束在光束的一端或两端锚定到空腔的壁; 嵌入可移动光束中的第一电极; 以及第二电极，其嵌入在所述空腔的壁中并且面向所述第一电极，其中所述第一和第二电极分别被所述贵金属接触物覆盖。

公开(公告)号：US20050007217A1

公开(公告)日：2005-01-13

申请号：US10604278

申请日：2003-07-08

申请人： Hariklia Deligianni ,  Panayotis Andricacos ,  L. Buchwalter ,  John Cotte ,  Christopher Jahnes ,  Mahadevaiyer Krishnan ,  John Magerlein ,  Kenneth Stein ,  Richard Volant ,  James Tornello ,  Jennifer Lund

发明人： Hariklia Deligianni ,  Panayotis Andricacos ,  L. Buchwalter ,  John Cotte ,  Christopher Jahnes ,  Mahadevaiyer Krishnan ,  John Magerlein ,  Kenneth Stein ,  Richard Volant ,  James Tornello ,  Jennifer Lund

IPC分类号： H01H59/00 ,  H01H51/22

CPC分类号： H01H59/0009 ,  H01H2001/0052 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/49204

摘要： A semiconductor micro-electromechanical system (MEMS) switch provided with noble metal contacts that act as an oxygen barrier to copper electrodes is described. The MEMS switch is fully integrated into a CMOS semiconductor fabrication line. The integration techniques, materials and processes are fully compatible with copper chip metallization processes and are typically, a low cost and a low temperature process (below 400°0 C.). The MEMS switch includes: a movable beam within a cavity, the movable beam being anchored to a wall of the cavity at one or both ends of the beam; a first electrode embedded in the movable beam; and a second electrode embedded in an wall of the cavity and facing the first electrode, wherein the first and second electrodes are respectively capped by the noble metal contact.

摘要翻译： 描述了提供有作为铜电极的氧阻隔的贵金属触点的半导体微机电系统（MEMS）开关。 MEMS开关完全集成到CMOS半导体制造线中。 集成技术，材料和工艺完全兼容铜芯片金属化工艺，通常是低成本和低温工艺（低于400°C）。 MEMS开关包括：在空腔内的可移动光束，可移动光束在光束的一端或两端锚定到空腔的壁; 嵌入可移动光束中的第一电极; 以及第二电极，其嵌入在所述空腔的壁中并且面向所述第一电极，其中所述第一和第二电极分别被所述贵金属接触物覆盖。

公开(公告)号：US20060105534A1

公开(公告)日：2006-05-18

申请号：US11320375

申请日：2005-12-28

申请人： Daniel Edelstein ,  Panayotis Andricacos ,  John Cotte ,  Hariklia Deligianni ,  John Magerlein ,  Kevin Petrarca ,  Kenneth Stein ,  Richard Volant

发明人： Daniel Edelstein ,  Panayotis Andricacos ,  John Cotte ,  Hariklia Deligianni ,  John Magerlein ,  Kevin Petrarca ,  Kenneth Stein ,  Richard Volant

IPC分类号： H01L21/8222

CPC分类号： H01L24/12 ,  H01L23/5227 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/05 ,  H01L27/08 ,  H01L28/10 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05007 ,  H01L2224/05014 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05084 ,  H01L2224/05555 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48724 ,  H01L2224/48744 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00

摘要： An inductor and a method of forming and the inductor, the method including: (a) forming a dielectric layer on a top surface of a substrate; (b) forming a lower trench in the dielectric layer; (c) forming a resist layer on a top surface of the dielectric layer; (d) forming an upper trench in the resist layer, the upper trench aligned to the lower trench, a bottom of the upper trench open to the lower trench; and (e) completely filling the lower trench at least partially filling the upper trench with a conductor in order to form the inductor. The inductor including a top surface, a bottom surface and sidewalls, a lower portion of said inductor extending a fixed distance into a dielectric layer formed on a semiconductor substrate and an upper portion extending above said dielectric layer; and means to electrically contact said inductor.

摘要翻译： 一种电感器及其形成方法和电感器，所述方法包括：（a）在基板的顶表面上形成电介质层; （b）在介电层中形成下沟槽; （c）在介电层的顶表面上形成抗蚀剂层; （d）在抗蚀剂层中形成上沟槽，上沟槽与下沟槽对准，上沟槽的底部通向下沟槽; 和（e）用导体完全填充下沟槽至少部分地填充上沟槽，以形成电感器。 所述电感器包括顶表面，底表面和侧壁，所述电感器的下部将固定距离延伸到形成在半导体衬底上的电介质层和在所述电介质层上方延伸的上部; 以及用于电接触所述电感器的装置。

公开(公告)号：US20070111385A1

公开(公告)日：2007-05-17

申请号：US11650883

申请日：2007-01-08

申请人： John Magerlein ,  Chirag Patel ,  Edmund Sprogis ,  Herbert Stoller

发明人： John Magerlein ,  Chirag Patel ,  Edmund Sprogis ,  Herbert Stoller

IPC分类号： H01L21/00 ,  H01L21/44

CPC分类号： H01L21/486 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/76898 ,  H01L23/147 ,  H01L24/16 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68345 ,  H01L2221/68354 ,  H01L2221/68363 ,  H01L2224/05571 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012

摘要： A Silicon Based Package (SBP) is formed starting with a thick wafer, which serves as the base for the SBP, composed of silicon which has a first surface and a reverse surface which are planar. Then form an interconnection structure including metal capture structures in contact with the first surface and multilayer conductor patterns over the first surface. Form a temporary bond between the SBP and a wafer holder, with the wafer holder being a rigid structure. Thin the reverse side of the wafer to a desired thickness to form an Ultra Thin Silicon Wafer (UTSW) for the SBP. Form via holes with tapered or vertical sidewalls, which extend through the UTSW to reach the metal capture structures. Then form metal pads in the via holes which extend through the UTSW, making electrical contact to the metal capture structures. Then bond the metal pads in the via holes to pads of a carrier.

摘要翻译： 基于硅的封装（SBP）由从作为SBP的基底的厚晶片开始形成，该基板由具有平坦的第一表面和反面的硅组成。 然后形成包括与第一表面接触的金属捕获结构和在第一表面上的多层导体图案的互连结构。 在SBP和晶片保持器之间形成临时结合，晶片保持器是刚性结构。 将晶圆的反面变薄到所需的厚度，以形成用于SBP的超薄硅晶片（UTSW）。 通过具有锥形或垂直侧壁的孔形成，其延伸穿过UTSW以到达金属捕获结构。 然后在穿过UTSW的通孔中形成金属焊盘，使其与金属捕获结构电接触。 然后将通孔中的金属焊盘接合到载体的焊盘。

公开(公告)号：US20050167780A1

公开(公告)日：2005-08-04

申请号：US10768773

申请日：2004-01-29

申请人： Daniel Edelstein ,  Panayotis Andricacos ,  John Cotte ,  Hariklia Deligianni ,  John Magerlein ,  Kevin Petrarca ,  Kenneth Stein ,  Richard Volant

发明人： Daniel Edelstein ,  Panayotis Andricacos ,  John Cotte ,  Hariklia Deligianni ,  John Magerlein ,  Kevin Petrarca ,  Kenneth Stein ,  Richard Volant

IPC分类号： H01F41/04 ,  H01F17/00 ,  H01L21/02 ,  H01L23/485 ,  H01L23/522 ,  H01L23/532 ,  H01L27/08 ,  H01L23/48 ,  H01L21/8222

CPC分类号： H01L24/12 ,  H01L23/5227 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/05 ,  H01L27/08 ,  H01L28/10 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05007 ,  H01L2224/05014 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05084 ,  H01L2224/05555 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48724 ,  H01L2224/48744 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00

摘要： An inductor and a method of forming and the inductor, the method including: (a) providing a semiconductor substrate; (b) forming a dielectric layer on a top surface of the substrate; (c) forming a lower trench in the dielectric layer; (d) forming a resist layer on a top surface of the dielectric layer; (e) forming an upper trench in the resist layer, the upper trench aligned to the lower trench, a bottom of the upper trench open to the lower trench; and (f) completely filling the lower trench at least partially filling the upper trench with a conductor in order to form the inductor. The inductor including a top surface, a bottom surface and sidewalls, a lower portion of said inductor extending a fixed distance into a dielectric layer formed on a semiconductor substrate and an upper portion extending above said dielectric layer; and means to electrically contact said inductor.

摘要翻译： 一种电感器及其形成方法和电感器，所述方法包括：（a）提供半导体衬底; （b）在所述基板的顶表面上形成电介质层; （c）在介电层中形成下沟槽; （d）在介电层的顶表面上形成抗蚀剂层; （e）在所述抗蚀剂层中形成上沟槽，所述上沟槽对准所述下沟槽，所述上沟槽的底部通向所述下沟槽; 和（f）用导体完全填充下沟槽至少部分地填充上沟槽，以形成电感器。 所述电感器包括顶表面，底表面和侧壁，所述电感器的下部将固定距离延伸到形成在半导体衬底上的电介质层和在所述电介质层上方延伸的上部; 以及用于电接触所述电感器的装置。