公开(公告)号：US06523110B1

公开(公告)日：2003-02-18

申请号：US09360054

申请日：1999-07-23

申请人： Arthur A. Bright ,  Jason E. Fritts

发明人： Arthur A. Bright ,  Jason E. Fritts

IPC分类号： G06F932

CPC分类号： G06F9/3804 ,  G06F9/30054 ,  G06F9/30058 ,  G06F9/322

摘要： There is provided a decoupled fetch-execute engine with static branch prediction support. A method for prefetching targets of branch instructions in a computer processing system having instruction fetch decoupled from an execution pipeline includes the step of generating a prepare-to-branch (PBR) operation. The PBR operation includes address bits corresponding to a branch paired thereto and address bits corresponding to an expected target of the branch. The execution of the PBR operation is scheduled prior to execution of the paired branch to enforce a desired latency therebetween. Upon execution of the PBR operation, it is determined whether the paired branch is available using the address bits of the PBR operation corresponding to the paired branch. When the paired branch is available, the expected branch target is fetched using the address bits of the PBR operation corresponding to the expected branch target.

摘要翻译： 提供了一种具有静态分支预测支持的解耦获取执行引擎。 在具有从执行流水线分离的指令提取的计算机处理系统中预取分支指令的目标的方法包括生成准备到分支（PBR）操作的步骤。 PBR操作包括对应于与其配对的分支的地址位和对应于分支的预期目标的地址位。 在执行配对分支之前调度PBR操作的执行以在它们之间施加期望的等待时间。 在执行PBR操作时，使用对应于配对分支的PBR操作的地址位确定配对分支是否可用。 当配对分支可用时，使用对应于预期分支目标的PBR操作的地址位来获取期望的分支目标。

公开(公告)号：US07457187B2

公开(公告)日：2008-11-25

申请号：US11851613

申请日：2007-09-07

申请人： Arthur A. Bright ,  Paul G. Crumley ,  Marc Dombrowa ,  Steven M. Douskey ,  Rudolf A. Haring ,  Steven F. Oakland ,  Michael R. Quellette ,  Scott A. Strissel

发明人： Arthur A. Bright ,  Paul G. Crumley ,  Marc Dombrowa ,  Steven M. Douskey ,  Rudolf A. Haring ,  Steven F. Oakland ,  Michael R. Quellette ,  Scott A. Strissel

IPC分类号： G11C17/18 ,  G11C7/10 ,  G11C29/00 ,  H03K19/003 ,  H03K19/00

CPC分类号： G11C29/4401 ,  G11C29/802

摘要： A design structure for repairing an integrated circuit during operation of the integrated circuit. The integrated circuit comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The design structure provides the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The design structure further passes the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

摘要翻译： 用于在集成电路运行期间修复集成电路的设计结构。 集成电路包括多个存储器阵列和保持控制数据的保险丝盒，用于控制阵列的冗余逻辑。 该设计结构为集成电路提供了一个控制数据选择器，用于将控制数据从保险丝盒传送到存储器阵列; 提供备用控制数据源，集成电路外部; 并将替代控制数据源连接到控制数据选择器。 设计结构还通过控制数据选择器将来自其源的备用控制数据传递到存储器阵列，以控制存储器阵列的冗余逻辑。

公开(公告)号：US4016331A

公开(公告)日：1977-04-05

申请号：US652611

申请日：1976-01-26

申请人： Anthony Frank Garito ,  Alan J. Heeger ,  Alan G. MacDiarmid ,  Arthur A. Bright ,  Marshall J. Cohen ,  Chester M. Mikulski

发明人： Anthony Frank Garito ,  Alan J. Heeger ,  Alan G. MacDiarmid ,  Arthur A. Bright ,  Marshall J. Cohen ,  Chester M. Mikulski

IPC分类号： B29D11/00 ,  G02B1/10 ,  B05D5/12 ,  B32B27/06 ,  C23C13/02 ,  C23C13/04

CPC分类号： G02B1/10 ,  B29D11/00865 ,  Y10S428/91 ,  Y10T428/3154 ,  Y10T428/31544 ,  Y10T428/31786 ,  Y10T428/31938

摘要： A composite polymeric material having metallic surface properties is prepared by subliming solid crystalline polymeric sulfur nitride to a vapor, and thereafter condensing the polymeric sulfur nitride vapor onto the surface of a highly-oriented thermoplastic polymeric substrate to thereby form on the substrate an epitaxial crystalline polymeric sulfur nitride film. The polymeric sulfur nitride film is completely oriented parallel to the direction of orientation of the substrate and has a relatively high degree of anisotropy with respect to its electrical conductivity and optical properties.

摘要翻译： 具有金属表面性质的复合聚合物材料通过将固体结晶聚合硫氮化物升华成蒸气来制备，然后将聚合硫氮化物蒸气冷凝到高度取向的热塑性聚合物基材的表面上，从而在基材上形成外延晶体聚合物 硫化氮膜。 聚合硫化氮膜完全取向为平行于衬底的取向方向，并且相对于其导电性和光学性质具有相对高的各向异性。

公开(公告)号：US07310278B2

公开(公告)日：2007-12-18

申请号：US11418052

申请日：2006-05-04

申请人： Arthur A. Bright ,  Paul G. Crumley ,  Marc B. Dombrowa ,  Steven M. Douskey ,  Rudolf A. Haring ,  Steven F. Oakland ,  Michael R. Ouellette ,  Scott A. Strissel

发明人： Arthur A. Bright ,  Paul G. Crumley ,  Marc B. Dombrowa ,  Steven M. Douskey ,  Rudolf A. Haring ,  Steven F. Oakland ,  Michael R. Ouellette ,  Scott A. Strissel

IPC分类号： G11C29/00 ,  G11C7/10 ,  G11C17/18 ,  H03K19/00

CPC分类号： G11C29/4401 ,  G11C29/802

摘要： Disclosed is a method of repairing an integrated circuit of the type comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The method comprises the steps of providing the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The method comprises the further step of, at a given time, passing the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

摘要翻译： 公开了一种修复包括多个存储器阵列的类型的集成电路的方法，以及用于控制用于控制阵列的冗余逻辑的控制数据的保险丝盒。 该方法包括以下步骤：向集成电路提供控制数据选择器，用于将控制数据从保险丝盒传送到存储器阵列; 提供备用控制数据源，集成电路外部; 并将替代控制数据源连接到控制数据选择器。 该方法还包括在给定时间，通过控制数据选择器将备用控制数据从其源传递到存储器阵列以控制存储器阵列的冗余逻辑的步骤。

公开(公告)号：US07405990B2

公开(公告)日：2008-07-29

申请号：US11872085

申请日：2007-10-15

申请人： Arthur A. Bright ,  Paul G. Crumley ,  Marc B. Dombrowa ,  Steven M. Douskey ,  Rudolf A. Haring ,  Steven F. Oakland ,  Michael R. Ouellette ,  Scott A. Strissel

发明人： Arthur A. Bright ,  Paul G. Crumley ,  Marc B. Dombrowa ,  Steven M. Douskey ,  Rudolf A. Haring ,  Steven F. Oakland ,  Michael R. Ouellette ,  Scott A. Strissel

IPC分类号： G11C17/18 ,  G11C7/10 ,  G11C8/00 ,  H03K19/003 ,  H03K19/00

CPC分类号： G11C29/4401 ,  G11C29/802

摘要： Disclosed is a method of repairing an integrated circuit of the type comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The method comprises the steps of providing the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The method comprises the further step of, at a given time, passing the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

公开(公告)号：US07397709B2

公开(公告)日：2008-07-08

申请号：US11872088

申请日：2007-10-15

申请人： Arthur A. Bright ,  Paul G. Crumley ,  Marc B. Dombrowa ,  Steven M. Douskey ,  Rudolf A. Haring ,  Steven F. Oakland ,  Michael R. Ouellette ,  Scott A. Strissel

发明人： Arthur A. Bright ,  Paul G. Crumley ,  Marc B. Dombrowa ,  Steven M. Douskey ,  Rudolf A. Haring ,  Steven F. Oakland ,  Michael R. Ouellette ,  Scott A. Strissel

IPC分类号： G11C7/10 ,  G11C29/00 ,  G11C17/18 ,  H03K19/003 ,  G06F11/00

CPC分类号： G11C29/4401 ,  G11C29/802

摘要： Disclosed is a method of repairing an integrated circuit of the type comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The method comprises the steps of providing the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The method comprises the further step of, at a given time, passing the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

摘要翻译： 公开了一种修复包括多个存储器阵列的类型的集成电路的方法，以及用于控制用于控制阵列的冗余逻辑的控制数据的保险丝盒。 该方法包括以下步骤：向集成电路提供控制数据选择器，用于将控制数据从保险丝盒传送到存储器阵列; 提供备用控制数据源，集成电路外部; 并将替代控制数据源连接到控制数据选择器。 该方法还包括在给定时间，通过控制数据选择器将备用控制数据从其源传递到存储器阵列以控制存储器阵列的冗余逻辑的步骤。