MEMORY WITH MIXED CELL ARRAY AND SYSTEM INCLUDING THE MEMORY
    2.
    发明申请
    MEMORY WITH MIXED CELL ARRAY AND SYSTEM INCLUDING THE MEMORY 有权
    存储器与混合单元阵列和系统,包括存储器

    公开(公告)号:US20140052895A1

    公开(公告)日:2014-02-20

    申请号:US13587976

    申请日:2012-08-17

    IPC分类号: G06F12/02

    摘要: A memory system, system including the memory system and method of reducing memory system power consumption. The memory system includes multiple memory units allocable to one of a number of processor units, e.g., processors or processor cores. A memory controller receives requests for memory from the processor units and allocates sufficient space from the memory to each requesting processor unit. Allocated memory can include some Single Level per Cell (SLC) memory units storing a single bit per cell and other memory units storing more than one bit per cell. Thus, two processor units may be assigned identical memory space, while half, or fewer, than the number of cells of one are assigned to the other.

    摘要翻译: 一种存储系统,包括内存系统和减少内存系统功耗的方法。 存储器系统包括可分配到多个处理器单元之一(例如处理器或处理器核)中的多个存储器单元。 存储器控制器从处理器单元接收对存储器的请求,并从存储器向每个请求处理器单元分配足够的空间。 分配的存储器可以包括存储每个单元的单个位的单个单元(SLC)存储器单元和存储每个单元多于一个位的其它存储器单元。 因此,两个处理器单元可以被分配相同的存储器空间,而一个或更少个分配给另一个的单元的数量。

    MEMORY CONTROLLER FOR MEMORY WITH MIXED CELL ARRAY AND METHOD OF CONTROLLING THE MEMORY
    3.
    发明申请
    MEMORY CONTROLLER FOR MEMORY WITH MIXED CELL ARRAY AND METHOD OF CONTROLLING THE MEMORY 有权
    用于具有混合单元阵列的存储器的存储器控​​制器和控制存储器的方法

    公开(公告)号:US20140052894A1

    公开(公告)日:2014-02-20

    申请号:US13587967

    申请日:2012-08-17

    IPC分类号: G06F12/02

    摘要: A memory controller, system including the memory controller and method of controlling the memory. The memory controller receives requests for memory and content sensitively allocates memory space in a mixed cell memory. The memory controller allocates sufficient space including performance memory storing a single bit per cell and dense memory storing more than one bit per cell. Some or all of the memory may be selectable by the memory controller as either Single Level per Cell (SLC) or Multiple Level per Cell (MLC).

    摘要翻译: 一种存储器控制器,包括存储器控制器和控制存储器的方法的系统。 存储器控制器接收对存储器的请求并且内容在混合单元存储器中灵敏地分配存储器空间。 存储器控制器分配足够的空间,包括存储每个单元的单个位的性能存储器和存储每个单元多于一位的密集存储器。 存储器控制器可以选择存储器中的一些或全部作为每单元单层(SLC)或每单元多层次(MLC)。

    Memory controller for memory with mixed cell array and method of controlling the memory
    6.
    发明授权
    Memory controller for memory with mixed cell array and method of controlling the memory 有权
    具有混合单元阵列的存储器的存储器控​​制器和控制存储器的方法

    公开(公告)号:US09032136B2

    公开(公告)日:2015-05-12

    申请号:US13610830

    申请日:2012-09-11

    IPC分类号: G06F12/02

    摘要: A memory controller, system including the memory controller and method of controlling the memory. The memory controller receives requests for memory and content sensitively allocates memory space in a mixed cell memory. The memory controller allocates sufficient space including performance memory storing a single bit per cell and dense memory storing more than one bit per cell. Some or all of the memory may be selectable by the memory controller as either Single Level per Cell (SLC) or Multiple Level per Cell (MLC).

    摘要翻译: 一种存储器控制器,包括存储器控制器和控制存储器的方法的系统。 存储器控制器接收对存储器的请求并且内容在混合单元存储器中灵敏地分配存储器空间。 存储器控制器分配足够的空间,包括存储每个单元的单个位的性能存储器和存储每个单元多于一位的密集存储器。 存储器控制器可以选择存储器中的一些或全部作为每单元单层(SLC)或每单元多层次(MLC)。

    Method of reducing system power with mixed cell memory array
    7.
    发明授权
    Method of reducing system power with mixed cell memory array 有权
    使用混合单元存储器阵列降低系统功率的方法

    公开(公告)号:US09146852B2

    公开(公告)日:2015-09-29

    申请号:US13610834

    申请日:2012-09-11

    IPC分类号: G06F12/02

    摘要: A memory system, system including the memory system and method of reducing memory system power consumption. The memory system includes multiple memory units allocable to one of a number of processor units, e.g., processors or processor cores. A memory controller receives requests for memory from the processor units and allocates sufficient space from the memory to each requesting processor unit. Allocated memory can include some Single Level per Cell (SLC) memory units storing a single bit per cell and other memory units storing more than one bit per cell. Thus, two processor units may be assigned identical memory space, while half, or fewer, than the number of cells of one are assigned to the other.

    摘要翻译: 一种存储系统,包括内存系统和减少内存系统功耗的方法。 存储器系统包括可分配到多个处理器单元之一(例如处理器或处理器核)中的多个存储器单元。 存储器控制器从处理器单元接收对存储器的请求,并从存储器向每个请求处理器单元分配足够的空间。 分配的存储器可以包括存储每个单元的单个位的单个单元(SLC)存储器单元和存储每个单元多于一个位的其它存储器单元。 因此,两个处理器单元可以被分配相同的存储器空间,而一个或更少个分配给另一个的单元的数量。

    Solid-state light emitting devices with photoluminescence wavelength conversion
    9.
    发明授权
    Solid-state light emitting devices with photoluminescence wavelength conversion 有权
    具有光致发光波长转换的固态发光器件

    公开(公告)号:US08354784B2

    公开(公告)日:2013-01-15

    申请号:US12892754

    申请日:2010-09-28

    IPC分类号: H01J1/62

    摘要: A light emitting device comprises at least one light emitter, typically an LED, operable to generate blue light and a wavelength conversion component. The wavelength conversion component can be light transmissive or light reflective and comprises at least two phosphor materials that are operable to absorb at least a portion of said blue light and emit light of different colors and wherein the emission product of the device comprises the combined light generated by the LED(s) and the phosphor materials. The phosphor materials are configured as a pattern of non-overlapping areas on a surface of the component.

    摘要翻译: 发光器件包括至少一个光发射器,通常为LED,其可操作以产生蓝光和波长转换部件。 波长转换组件可以是透光的或光反射的,并且包括至少两个磷光体材料,其可操作以吸收至少一部分所述蓝色光并发射不同颜色的光,并且其中该器件的发射产物包括产生的组合光 通过LED和磷光体材料。 磷光体材料被配置为在部件的表面上的非重叠区域的图案。