-
公开(公告)号:US20140374891A1
公开(公告)日:2014-12-25
申请号:US13924627
申请日:2013-06-24
IPC分类号: H01L23/495 , H01L21/56
CPC分类号: H01L23/4334 , H01L23/3128 , H01L23/49541 , H01L23/49816 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/48 , H01L24/73 , H01L2224/2929 , H01L2224/32225 , H01L2224/32245 , H01L2224/33181 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/73215 , H01L2224/73265 , H01L2924/00014 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A semiconductor device includes a die pad and a semiconductor die having a mounting surface attached to the die pad and an opposite, active surface with die external terminals. The device has package external connectors, each having a bond region selectively electrically coupled to the die external terminals with a bond wire. A heat spreader has a first region that encloses an inner recessed region. A thermally conductive sheet is sandwiched between the inner recessed region of the heat spreader and the active surface of the die. At least the die, die external terminals, and the bond region are covered with an encapsulant.
摘要翻译: 半导体器件包括管芯焊盘和半导体管芯,半导体管芯具有安装在管芯焊盘上的安装表面和具有管芯外部端子的相反的有效表面。 该器件具有封装外部连接器,每个连接器具有用接合线选择性地电耦合到管芯外部端子的接合区域。 散热器具有封闭内凹区域的第一区域。 导热片被夹在散热器的内凹区域和模具的有效表面之间。 至少模具,模具外部端子和键合区域被密封剂覆盖。
-
公开(公告)号:US09190355B2
公开(公告)日:2015-11-17
申请号:US14255957
申请日:2014-04-18
IPC分类号: H01L23/48 , H01L23/52 , H01L29/40 , H01L23/498 , H01L23/00
CPC分类号: H01L23/49811 , H01L23/3121 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L24/16 , H01L24/32 , H01L24/33 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/85 , H01L24/90 , H01L2224/05599 , H01L2224/16227 , H01L2224/26165 , H01L2224/32225 , H01L2224/48106 , H01L2224/48227 , H01L2224/48228 , H01L2224/49171 , H01L2224/49175 , H01L2224/73204 , H01L2224/73265 , H01L2224/83385 , H01L2224/8385 , H01L2224/85444 , H01L2924/00014 , H01L2924/01029 , H01L2924/14 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207 , H01L2224/16225 , H01L2224/45099
摘要: A sub-assembly for a packaged integrated circuit (IC) device has a planar substrate. The substrate's top side has multiple sets electrically connected bond posts arranged in corresponding nested contour zones. Each contour zone includes a different bond post of each bond-post set. The bottom side has a different set of pad connectors electrically connected to the each top-side bond-post set. The sub-assembly can be used for different IC packages having IC dies of different sizes, with different contours of bond posts available for electrical connection depending on the size of the IC die.
摘要翻译: 用于封装集成电路(IC)器件的子组件具有平面衬底。 基板的顶侧具有布置在相应嵌套轮廓区域中的多组电连接的接合柱。 每个轮廓区域包括每个债券 - 债券集合的不同债券债券。 底侧具有电连接到每个顶侧粘结柱组的不同组的焊盘连接器。 子组件可用于具有不同尺寸的IC芯片的不同IC封装,根据IC芯片的尺寸,具有可用于电连接的不同等级的焊接柱。
-
公开(公告)号:US09159682B2
公开(公告)日:2015-10-13
申请号:US14020841
申请日:2013-09-08
IPC分类号: H01L21/44 , H01L23/00 , H01L23/498
CPC分类号: H01L24/11 , H01L23/49811 , H01L23/49816 , H01L23/49822 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/81 , H01L24/83 , H01L24/92 , H01L2224/03424 , H01L2224/03464 , H01L2224/0401 , H01L2224/05155 , H01L2224/05644 , H01L2224/10175 , H01L2224/11462 , H01L2224/1147 , H01L2224/11474 , H01L2224/1148 , H01L2224/11849 , H01L2224/13147 , H01L2224/14131 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/81192 , H01L2224/81203 , H01L2224/8121 , H01L2224/81815 , H01L2224/83102 , H01L2224/9211 , H01L2224/92125 , H01L2924/01029 , H01L2924/15311 , H01L2924/181 , H01L2924/381 , H01L2924/3841 , H05K3/4007 , H05K2201/0367 , H01L2924/00014 , H01L2924/00012 , H01L2224/81 , H01L2224/83 , H01L2924/00
摘要: Electrically conductive pillars with a solder cap are formed on a substrate with an electroplating process. A flip-chip die having solder wettable pads is attached to the substrate with the conductive pillars contacting the solder wettable pads.
摘要翻译: 具有焊接帽的导电柱形成在具有电镀工艺的基板上。 具有焊料可湿性焊盘的倒装芯片裸片被附着到基板上,导电柱接触可焊接的可湿性焊盘。
-
公开(公告)号:US09034694B1
公开(公告)日:2015-05-19
申请号:US14191448
申请日:2014-02-27
CPC分类号: H01L24/14 , H01L21/561 , H01L21/568 , H01L23/293 , H01L23/3107 , H01L23/367 , H01L24/13 , H01L24/19 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/92 , H01L24/97 , H01L2224/04105 , H01L2224/11002 , H01L2224/12105 , H01L2224/13022 , H01L2224/13023 , H01L2224/131 , H01L2224/19 , H01L2224/2919 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2924/10253 , H01L2924/10271 , H01L2924/10329 , H01L2924/14 , H01L2924/15311 , H01L2924/18162 , H01L2924/00014 , H01L2224/83 , H01L2224/82 , H01L2924/014 , H01L2224/83005
摘要: A method of assembling a semiconductor package includes attaching a semiconductor die to a frame having a strip or panel form. The semiconductor die has at least one stud bump. The die and the stud bump are covered with a first encapsulation material, and then at least a portion of the stud bump is exposed. At least one die conductive member is formed on the first encapsulation material and electrically coupled to the stud bump. The die conductive member is covered with a second encapsulation material, and then at least a portion of the die conductive member is exposed. At least one grid array conductive member is formed on the second encapsulation material and electrically coupled to the die conductive member. Finally, at least one solder ball is attached to the at least one grid array conductive member.
摘要翻译: 一种组装半导体封装的方法包括将半导体管芯附接到具有条或板形式的框架。 半导体管芯具有至少一个螺柱凸块。 裸片和柱形凸块被第一封装材料覆盖,然后暴露凸起凸块的至少一部分。 至少一个管芯导电构件形成在第一封装材料上并电耦合到螺柱凸起。 芯片导电部件被第二封装材料覆盖,然后露出裸片导电部件的至少一部分。 至少一个格栅阵列导电元件形成在第二封装材料上并电耦合到管芯导电元件。 最后,至少一个焊球连接到至少一个格栅阵列导电构件。
-
公开(公告)号:US20150303137A1
公开(公告)日:2015-10-22
申请号:US14255957
申请日:2014-04-18
IPC分类号: H01L23/498 , H01L23/00
CPC分类号: H01L23/49811 , H01L23/3121 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L24/16 , H01L24/32 , H01L24/33 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/85 , H01L24/90 , H01L2224/05599 , H01L2224/16227 , H01L2224/26165 , H01L2224/32225 , H01L2224/48106 , H01L2224/48227 , H01L2224/48228 , H01L2224/49171 , H01L2224/49175 , H01L2224/73204 , H01L2224/73265 , H01L2224/83385 , H01L2224/8385 , H01L2224/85444 , H01L2924/00014 , H01L2924/01029 , H01L2924/14 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207 , H01L2224/16225 , H01L2224/45099
摘要: A sub-assembly for a packaged integrated circuit (IC) device has a planar substrate. The substrate's top side has multiple sets electrically connected bond posts arranged in corresponding nested contour zones. Each contour zone includes a different bond post of each bond-post set. The bottom side has a different set of pad connectors electrically connected to the each top-side bond-post set. The sub-assembly can be used for different IC packages having IC dies of different sizes, with different contours of bond posts available for electrical connection depending on the size of the IC die.
摘要翻译: 用于封装集成电路(IC)器件的子组件具有平面衬底。 基板的顶侧具有布置在相应的嵌套轮廓区域中的多组电连接的接合柱。 每个轮廓区域包括每个债券 - 债券集合的不同债券债券。 底侧具有电连接到每个顶侧粘结柱组的不同组的焊盘连接器。 子组件可用于具有不同尺寸的IC芯片的不同IC封装,根据IC芯片的尺寸,具有可用于电连接的不同等级的焊接柱。
-
公开(公告)号:US20150069603A1
公开(公告)日:2015-03-12
申请号:US14020841
申请日:2013-09-08
IPC分类号: H01L23/00
CPC分类号: H01L24/11 , H01L23/49811 , H01L23/49816 , H01L23/49822 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/81 , H01L24/83 , H01L24/92 , H01L2224/03424 , H01L2224/03464 , H01L2224/0401 , H01L2224/05155 , H01L2224/05644 , H01L2224/10175 , H01L2224/11462 , H01L2224/1147 , H01L2224/11474 , H01L2224/1148 , H01L2224/11849 , H01L2224/13147 , H01L2224/14131 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/81192 , H01L2224/81203 , H01L2224/8121 , H01L2224/81815 , H01L2224/83102 , H01L2224/9211 , H01L2224/92125 , H01L2924/01029 , H01L2924/15311 , H01L2924/181 , H01L2924/381 , H01L2924/3841 , H05K3/4007 , H05K2201/0367 , H01L2924/00014 , H01L2924/00012 , H01L2224/81 , H01L2224/83 , H01L2924/00
摘要: Electrically conductive pillars with a solder cap are formed on a substrate with an electroplating process. A flip-chip die having solder wettable pads is attached to the substrate with the conductive pillars contacting the solder wettable pads.
摘要翻译: 具有焊接帽的导电柱形成在具有电镀工艺的基板上。 具有焊料可湿性焊盘的倒装芯片裸片被附着到基板上,导电柱接触可焊接的可湿性焊盘。
-
公开(公告)号:US20140021621A1
公开(公告)日:2014-01-23
申请号:US13550627
申请日:2012-07-17
CPC分类号: H01L24/49 , H01L23/3121 , H01L23/49531 , H01L23/49827 , H01L24/48 , H01L2224/05554 , H01L2224/48247 , H01L2224/49 , H01L2924/00014 , H01L2924/181 , H01L2924/30107 , H01L2924/00 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012
摘要: A packaged semiconductor die has a die support mounting surface mounted to a die support having external connectors. A die connection pad surface opposite to die supporting mount surface has associated die connection pads that are circuit nodes of the semiconductor die. The die connection pad surface also has a power rail pad. The power rail pad has a surface area larger than surface areas of the die connection pads. Bond wires electrically couple the power rail pad to two or more of the die connection pads.
摘要翻译: 封装的半导体管芯具有安装到具有外部连接器的管芯支撑件的管芯支撑安装表面。 与管芯支撑安装表面相对的管芯连接焊盘表面具有作为半导体管芯的电路节点的相关联的管芯连接焊盘。 管芯连接焊盘表面还具有电源轨焊盘。 电源轨焊盘的表面积大于管芯连接焊盘的表面积。 接合线将电源轨焊盘电耦合到两个或更多个管芯连接焊盘。
-
公开(公告)号:US09299675B2
公开(公告)日:2016-03-29
申请号:US14688976
申请日:2015-04-16
IPC分类号: H01L23/48 , H01L23/52 , H01L29/40 , H01L23/00 , H01L23/29 , H01L23/31 , H01L23/367 , H01L21/56
CPC分类号: H01L24/14 , H01L21/561 , H01L21/568 , H01L23/293 , H01L23/3107 , H01L23/367 , H01L24/13 , H01L24/19 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/92 , H01L24/97 , H01L2224/04105 , H01L2224/11002 , H01L2224/12105 , H01L2224/13022 , H01L2224/13023 , H01L2224/131 , H01L2224/19 , H01L2224/2919 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2924/10253 , H01L2924/10271 , H01L2924/10329 , H01L2924/14 , H01L2924/15311 , H01L2924/18162 , H01L2924/00014 , H01L2224/83 , H01L2224/82 , H01L2924/014 , H01L2224/83005
摘要: A method of assembling a semiconductor package includes attaching a semiconductor die to a frame having a strip or panel form. The semiconductor die has at least one stud bump. The die and the stud bump are covered with a first encapsulation material, and then at least a portion of the stud bump is exposed. At least one die conductive member is formed on the first encapsulation material and electrically coupled to the stud bump. The die conductive member is covered with a second encapsulation material, and then at least a portion of the die conductive member is exposed. At least one grid array conductive member is formed on the second encapsulation material and electrically coupled to the die conductive member. Finally, at least one solder ball is attached to the at least one grid array conductive member.
-
公开(公告)号:US08698288B1
公开(公告)日:2014-04-15
申请号:US13901563
申请日:2013-05-23
IPC分类号: H01L25/04 , H01L25/10 , H01L23/14 , H01L23/538 , H01L23/00 , H01L25/11 , H01L23/495
CPC分类号: H01L23/5381 , H01L23/14 , H01L23/3128 , H01L23/49537 , H01L23/49544 , H01L23/49575 , H01L23/49816 , H01L23/4985 , H01L23/49861 , H01L23/49894 , H01L23/5385 , H01L23/5387 , H01L23/5389 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/043 , H01L25/0655 , H01L25/105 , H01L25/117 , H01L2224/131 , H01L2224/16225 , H01L2224/291 , H01L2224/2919 , H01L2224/32225 , H01L2224/45144 , H01L2224/48227 , H01L2224/73265 , H01L2225/1023 , H01L2225/1047 , H01L2924/10253 , H01L2924/10271 , H01L2924/10329 , H01L2924/14 , H01L2924/15192 , H01L2924/181 , H01L2924/014 , H01L2924/00012
摘要: A semiconductor device includes first and second flexible substrates each with first and second peripheral edges. First and second dies are attached on respective surfaces of the flexible substrates and are each respectively electrically connected to first and second metal traces. A first crimping structure electrically connects the first metal traces to the second metal traces and crimps together the first peripheral edges of the first and second substrates. A second crimping structure electrically connects the first metal traces to the second metal traces and crimps together the second peripheral edges of the first and second substrates.
摘要翻译: 半导体器件包括具有第一和第二外围边缘的第一和第二柔性基板。 第一和第二模具附接在柔性基板的相应表面上,并且各自分别电连接到第一和第二金属迹线。 第一压接结构将第一金属迹线电连接到第二金属迹线并将第一和第二基板的第一周边边缘卷曲在一起。 第二压接结构将第一金属迹线电连接到第二金属迹线并将第一和第二基板的第二周边边缘卷曲在一起。
-
公开(公告)号:US08933547B1
公开(公告)日:2015-01-13
申请号:US14086929
申请日:2013-11-21
申请人: Jia Lin Yap , Yin Kheng Au , Ahmad Termizi Suhaimi , Seng Kiong Teng , Boon Yew Low , Navas Khan Oratti Kalandar
发明人: Jia Lin Yap , Yin Kheng Au , Ahmad Termizi Suhaimi , Seng Kiong Teng , Boon Yew Low , Navas Khan Oratti Kalandar
IPC分类号: H01L23/495
CPC分类号: H01L23/49541 , H01L21/4842 , H01L23/4952 , H01L23/49558 , H01L2224/48247 , H01L2224/48257 , H01L2224/49171
摘要: A lead frame for a packaged semiconductor device has multiple, configurable power bars that can be selectively electrically connected, such as with bond wires, to each other and/or to other leads of the lead frame to customize the lead frame for different package designs. One or more of the configurable power bars may extend into one or more cut-out regions in a die paddle of the lead frame, which allows for short bond wires to be used to connect the power bars to die pads of a semiconductor die mounted on the die paddle.
摘要翻译: 用于封装半导体器件的引线框架具有多个可配置的功率条,其可以例如通过接合线电连接到引线框架的彼此和/或引线框架的其它引线,以定制用于不同封装设计的引线框架。 一个或多个可配置的功率条可以延伸到引线框架的管芯焊盘中的一个或多个切除区域,这允许短接合线用于将功率棒连接到安装在其上的半导体管芯的管芯焊盘 模具桨。
-
-
-
-
-
-
-
-
-