公开(公告)号：US07129169B2

公开(公告)日：2006-10-31

申请号：US10709534

申请日：2004-05-12

申请人： Bradley P. Jones ,  Christian Lavoie ,  Robert J. Purtell ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

发明人： Bradley P. Jones ,  Christian Lavoie ,  Robert J. Purtell ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

IPC分类号： H01L21/44 ,  H01L21/3205

CPC分类号： H01L29/665 ,  H01L21/28518 ,  H01L29/7833

摘要： A method for forming a metal silicide contact for a semiconductor device includes forming a refractory metal layer over a substrate, including active and non-active area of said substrate, and forming a cap layer over the refractory metal layer. A counter tensile layer is formed over the cap layer, wherein the counter tensile layer is selected from a material such that an opposing directional stress is created between the counter tensile layer and the cap layer, with respect to a directional stress created between the refractory metal layer and the cap layer.

摘要翻译： 一种用于形成用于半导体器件的金属硅化物接触的方法包括在衬底上形成难熔金属层，该衬底包括所述衬底的有源区和非有源区，并在难熔金属层上形成覆盖层。 反面拉伸层形成在覆盖层上方，其中相对抗拉层选自材料，使得在相对拉伸层和盖层之间产生相对的方向应力，相对于难熔金属之间产生的方向应力 层和盖层。

公开(公告)号：US07208414B2

公开(公告)日：2007-04-24

申请号：US10711365

申请日：2004-09-14

申请人： Anthony G. Domenicucci ,  Bradley P. Jones ,  Christian Lavoie ,  Robert J. Purtell ,  Yun Yu Wang ,  Kwong Hon Wong

发明人： Anthony G. Domenicucci ,  Bradley P. Jones ,  Christian Lavoie ,  Robert J. Purtell ,  Yun Yu Wang ,  Kwong Hon Wong

IPC分类号： H01L21/44

CPC分类号： H01L21/28518 ,  H01L29/665

摘要： The present invention provides a method for enhancing uni-directional diffusion of a metal during silicidation by using a metal-containing silicon alloy in conjunction with a first anneal in which two distinct thermal cycles are performed. The first thermal cycle of the first anneal is performed at a temperature that is capable of enhancing the uni-directional diffusion of metal, e.g., Co and/or Ni, into a Si-containing layer. The first thermal cycle causes an amorphous metal-containing silicide to form. The second thermal cycle is performed at a temperature that converts the amorphous metal-containing silicide into a crystallized metal rich silicide that is substantially non-etchable as compared to the metal-containing silicon alloy layer or a pure metal-containing layer. Following the first anneal, a selective etch is performed to remove any unreacted metal-containing alloy layer from the structure. A second anneal is performed to convert the metal rich silicide phase formed by the two thermal cycles of the first anneal into a metal silicide phase that is in its lowest resistance phase. A metal silicide is provided whose thickness is self-limiting.

摘要翻译： 本发明提供了一种通过使用含金属的硅合金与进行两个不同的热循环的第一次退火相结合的方法来增强金属在硅化过程中的单向扩散。 第一退火的第一热循环在能够增强金属例如Co和/或Ni的单向扩散到含Si层中的温度下进行。 第一热循环导致形成含非晶态金属的硅化物。 第二热循环在将含非晶态金属的硅化物转化为与含金属的硅合金层或纯金属含有层相比基本上不可蚀刻的结晶的富含金属的硅化物的温度下进行。 在第一退火之后，执行选择性蚀刻以从结构中除去任何未反应的含金属合金层。 执行第二退火以将由第一退火的两个热循环形成的富金属硅化物相转换成处于其最低电阻相的金属硅化物相。 提供了一种金属硅化物，其厚度是自限制的。

公开(公告)号：US06916729B2

公开(公告)日：2005-07-12

申请号：US10409516

申请日：2003-04-08

申请人： Sunfei Fang ,  Keith Kwong Hon Wong ,  Paul D. Agnello ,  Christian Lavoie ,  Lawrence A. Clevenger ,  Chester T. Dziobkowski ,  Richard J. Murphy ,  Patrick W. DeHaven ,  Nivo Rovedo ,  Hsiang-Jen Huang

发明人： Sunfei Fang ,  Keith Kwong Hon Wong ,  Paul D. Agnello ,  Christian Lavoie ,  Lawrence A. Clevenger ,  Chester T. Dziobkowski ,  Richard J. Murphy ,  Patrick W. DeHaven ,  Nivo Rovedo ,  Hsiang-Jen Huang

IPC分类号： H01L21/28 ,  H01L21/283 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/336 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/78

CPC分类号： H01L29/665 ,  H01L21/28052 ,  H01L21/28518

摘要： A method of forming a salicide on a semiconductor device includes depositing a first refractory metal layer over a silicon region of a substrate, depositing a near-noble metal layer over the first refractory metal layer, and depositing a second refractory metal layer over the near-noble metal layer. The semiconductor device is annealed in a first annealing process to form a silicide layer abutting the doped region of the semiconductor device. Un-reacted portions of the near-noble metal layer and the second refractory metal layer are removed. The device may be annealed in an optional second annealing process to convert the silicide layer to a low resistance phase silicide material. Junction leakage and bridging are minimized or eliminated by embodiments of the present invention, and a smoother silicided surface is achieved.

摘要翻译： 在半导体器件上形成硅化物的方法包括在衬底的硅区域上沉积第一难熔金属层，在第一耐火金属层上沉积近贵金属层，以及在第二耐火金属层的近旁沉积第二难熔金属层， 贵金属层。 半导体器件在第一退火工艺中退火以形成邻接半导体器件的掺杂区域的硅化物层。 除去近贵金属层和第二难熔金属层的未反应部分。 该器件可以在任选的第二退火工艺中进行退火，以将硅化物层转换成低电阻相位硅化物材料。 通过本发明的实施例使结漏电和桥接最小化或消除，并且实现更平滑的硅化表面。

公开(公告)号：US20090152590A1

公开(公告)日：2009-06-18

申请号：US11955488

申请日：2007-12-13

申请人： Thomas N. Adam ,  Linda Black ,  Huajie Chen ,  Dureseti Chidambarrao ,  Robert E. Davis ,  Judson R. Holt ,  Randolph F. Knarr ,  Christian Lavoie ,  Robert J. Purtell ,  Dominic J. Schepis

发明人： Thomas N. Adam ,  Linda Black ,  Huajie Chen ,  Dureseti Chidambarrao ,  Robert E. Davis ,  Judson R. Holt ,  Randolph F. Knarr ,  Christian Lavoie ,  Robert J. Purtell ,  Dominic J. Schepis

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7848 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/66636

摘要： A method of forming a semiconductor device including forming a second deposit of silicon-germanium on a first deposit of silicon-germanium, the first deposit formed in a conduction terminal region of a substrate of the semiconductor device and having a first percentage of germanium, and the second deposit having a second percentage of germanium that is less than the first percentage and supports forming a silicide deposit on the second deposit. A structure is also provided.

摘要翻译： 一种形成半导体器件的方法，包括在硅 - 锗的第一沉积物上形成硅 - 锗的第二沉积物，所述第一沉积物形成在所述半导体器件的衬底的导电末端区域中并且具有第一百分比的锗，以及 所述第二沉积物具有小于所述第一百分比的第二百分比的锗，并且在所述第二沉积物上支持形成硅化物沉积物。 还提供了一种结构。

公开(公告)号：US20070087541A1

公开(公告)日：2007-04-19

申请号：US11557259

申请日：2006-11-07

申请人： Kenneth Giewont ,  Bradley Jones ,  Christian Lavoie ,  Robert Purtell ,  Yun-Yu Wang ,  Kwong Wong

发明人： Kenneth Giewont ,  Bradley Jones ,  Christian Lavoie ,  Robert Purtell ,  Yun-Yu Wang ,  Kwong Wong

IPC分类号： H01L21/4763 ,  H01L21/3205

CPC分类号： C23C14/5806 ,  C23C14/16

摘要： Disclosed is a method and structure for forming a silicide on a silicon material. The invention places the silicon material in a vacuum environment, forms metal on the silicon material, and then heats the silicon surface and the metal without breaking the vacuum environment. The processes of forming the metal and heating the silicon can be performed simultaneously without breaking the vacuum environment to form the silicide as the metal is being deposited. After the foregoing processing, the invention can remove the silicon surface from the vacuum environment and perform additional heating of the silicon surface. The first heating process forms a monosilicide and the additional heating forms a disilicide.

摘要翻译： 公开了一种在硅材料上形成硅化物的方法和结构。 本发明将硅材料置于真空环境中，在硅材料上形成金属，然后在不破坏真空环境的情况下加热硅表面和金属。 当金属沉积时，形成金属和加热硅的工艺可以同时进行而不破坏真空环境以形成硅化物。 在上述处理之后，本发明可以从真空环境中去除硅表面，并对硅表面进行附加加热。 第一加热工艺形成一硅化物，另外的加热形成二硅化物。

公开(公告)号：US20050255699A1

公开(公告)日：2005-11-17

申请号：US10709534

申请日：2004-05-12

申请人： Bradley Jones ,  Christian Lavoie ,  Robert Purtell ,  Yun-Yu Wang ,  Keith Wong

发明人： Bradley Jones ,  Christian Lavoie ,  Robert Purtell ,  Yun-Yu Wang ,  Keith Wong

IPC分类号： H01L21/20 ,  H01L21/285 ,  H01L21/336 ,  H01L21/44 ,  H01L21/4763 ,  H01L29/78

CPC分类号： H01L29/665 ,  H01L21/28518 ,  H01L29/7833

摘要： A method for forming a metal suicide contact for a semiconductor device includes forming a refractory metal layer over a substrate, including active and non-active area of said substrate, and forming a cap layer over the refractory metal layer. A counter tensile layer is formed over the cap layer, wherein the counter tensile layer is selected from a material such that an opposing directional stress is created between the counter tensile layer and the cap layer, with respect to a directional stress created between the refractory metal layer and the cap layer.

摘要翻译： 用于形成用于半导体器件的金属硅化物接触的方法包括在包括所述衬底的有源和非有源区域的衬底上形成难熔金属层，并在难熔金属层上形成覆盖层。 反面拉伸层形成在覆盖层上方，其中相对抗拉层选自材料，使得在相对拉伸层和盖层之间产生相对的方向应力，相对于难熔金属之间产生的方向应力 层和盖层。

公开(公告)号：US06878624B1

公开(公告)日：2005-04-12

申请号：US10674645

申请日：2003-09-30

申请人： John Bruley ,  Cyril Cabral, Jr. ,  Christian Lavoie ,  Tina J. Wagner ,  Yun Yu Wang ,  Horati S. Wildman ,  Wong Kwong Hon

发明人： John Bruley ,  Cyril Cabral, Jr. ,  Christian Lavoie ,  Tina J. Wagner ,  Yun Yu Wang ,  Horati S. Wildman ,  Wong Kwong Hon

IPC分类号： H01L21/336 ,  H01L21/44 ,  H01L21/768 ,  H01L23/52

CPC分类号： H01L21/76843 ,  H01L21/28518 ,  H01L21/76814 ,  H01L21/76855 ,  H01L21/76856 ,  H01L29/665

摘要： The present invention provides a method for forming an interconnect to a cobalt or nickel silicide having a TiN diffusion barrier. The inventive method comprises providing an initial structure having vias to exposed silicide regions positioned on a substrate; annealing the initial structure in a nitrogen-containing ambient, wherein a nitrogen passivation layer is formed atop the exposed silicide region; depositing Ti atop the nitrogen passivation layer; annealing the Ti in a nitrogen-containing ambient to form a TiN diffusion barrier and an amorphous Ti cobalt silicide between the TiN diffusion layer and the cobalt or nickel silicide and depositing an interconnect metal within the vias and atop the TiN diffusion barrier. The nitrogen passivation layer substantially restricts diffusion between the Ti and silicide layers minimizing the amorphous Ti cobalt silicide layer that forms. Therefore, the amorphous Ti cobalt or Ti nickel silicide is restricted to a thickness of less than about 3.0 nm.

摘要翻译： 本发明提供一种用于形成具有TiN扩散阻挡层的钴或镍硅化物的互连的方法。 本发明的方法包括提供具有通孔的初始结构，以暴露出位于基板上的硅化物区域; 在含氮环境中退火初始结构，其中在暴露的硅化物区域上形成氮钝化层; 在氮钝化层顶上沉积Ti; 在含氮环境中退火Ti以在TiN扩散层和钴或镍硅化物之间形成TiN扩散阻挡层和非晶Ti钴硅化物，并在通孔内和TiN扩散势垒顶上沉积互连金属。 氮钝化层基本上限制了Ti和硅化物层之间的扩散，使形成的无定形Ti钴硅化物层最小化。 因此，非晶Ti钴或Ti镍硅化物被限制在小于约3.0nm的厚度。

公开(公告)号：US06436823B1

公开(公告)日：2002-08-20

申请号：US09679738

申请日：2000-10-05

申请人： Cyril Cabral, Jr. ,  Chung-Ping Eng ,  Lynne Marie Gignac ,  Christian Lavoie ,  Patricia O'Neil ,  Kirk David Peterson ,  Tina Wagner ,  Yun-Yu Wang ,  Keith Wong

发明人： Cyril Cabral, Jr. ,  Chung-Ping Eng ,  Lynne Marie Gignac ,  Christian Lavoie ,  Patricia O'Neil ,  Kirk David Peterson ,  Tina Wagner ,  Yun-Yu Wang ,  Keith Wong

IPC分类号： H01L2144

CPC分类号： H01L21/76856 ,  H01L21/28518 ,  H01L2221/1078

摘要： A method for forming a TiN layer on top of a metal silicide layer in a semiconductor structure without the formation of a thick amorphous layer containing Ti, Co and Si and the structure formed are provided. In the method, after a Ti layer is deposited on top of a metal silidide layer, a dual-step annealing process is conducted in which a low temperature annealing in a forming gas (or ammonia) at a temperature not higher than 500° C. is first conducted for less than 2 hours followed by a high temperature annealing in a nitrogen-containing gas (or ammonia) at a second temperature not lower than 500° for less than 2 hours to form the TiN layer. The present invention method prevents the problem usually caused by a thick amorphous material layer of Ti—Si—Co which produces weakly bonded Ti which reacts with fluorine atoms from WF6 during a subsequent CVD W deposition process and causes liner failure due to a volume expansion of the amorphous material. The maximum thickness of the amorphous material layer formed by the present invention method is less than 5 nm which minimizes the line failure problem.

摘要翻译： 提供了一种在半导体结构中的金属硅化物层的顶部上形成TiN层的方法，而不形成含有Ti，Co和Si的厚非晶层以及形成的结构。 在该方法中，在金属硅化物层的顶部沉积Ti层之后，进行双相退火工艺，其中在不高于500℃的温度下在成形气体（或氨）中进行低温退火。 首先进行少于2小时，然后在不低于500℃的第二温度下在含氮气体（或氨）中进行低温退火2小时以形成TiN层。 本发明的方法防止了在随后的CVD W沉积过程中由Ti-Si-Co的厚的无定形材料层产生的弱结合的Ti与来自WF6的氟原子反应而产生的弱结合的问题，并导致由于体积膨胀引起的衬管故障 无定形材料。 通过本发明方法形成的非晶材料层的最大厚度小于5nm，这使线路故障问题最小化。

公开(公告)号：US07102234B2

公开(公告)日：2006-09-05

申请号：US10827064

申请日：2004-04-19

申请人： Cyril Cabral, Jr. ,  Roy Arthur Carruthers ,  James McKell Edwin Harper ,  Christian Lavoie ,  Ronnen Andrew Roy ,  Yun Yu Wang

发明人： Cyril Cabral, Jr. ,  Roy Arthur Carruthers ,  James McKell Edwin Harper ,  Christian Lavoie ,  Ronnen Andrew Roy ,  Yun Yu Wang

IPC分类号： H01L23/48 ,  H01L29/40

CPC分类号： H01L21/28518

摘要： A method of reducing the contact resistance of metal silicides to the p+ silicon area or the n+ silicon area of the substrate comprising: (a) forming a metal germanium (Ge) layer over a silicon-containing substrate, wherein said metal is selected from the group consisting of Co, Ti, Ni and mixtures thereof; (b) optionally forming an oxygen barrier layer over said metal germanium layer; (c) annealing said metal germanium layer at a temperature which is effective in converting at least a portion thereof into a substantially non-etchable metal silicide layer, while forming a Si—Ge interlayer between said silicon-containing substrate and said substantially non-etchable metal silicide layer; and (d) removing said optional oxygen barrier layer and any remaining alloy layer. When a Co or Ti alloy is employed, e.g., Co—Ge or Ti—Ge, two annealing steps are required to provide the lowest resistance phase of those metals, whereas, when Ni is employed, a single annealing step forms the lowest resistance phase of Ni silicide.

摘要翻译： 一种降低金属硅化物与衬底的p +硅区域或n +硅区域的接触电阻的方法，包括：（a）在含硅衬底上形成金属锗（Ge）层，其中所述金属选自 由Co，Ti，Ni及其混合物组成的组; （b）任选地在所述金属锗层上形成氧阻隔层; （c）在有效地将其至少一部分转化成基本上不可蚀刻的金属硅化物层的温度下退火所述金属锗层，同时在所述含硅衬底和所述基本上不可蚀刻的衬底之间形成Si-Ge中间层 金属硅化物层; 和（d）去除所述任选的氧气阻挡层和任何剩余的合金层。 当使用Co或Ti合金时，例如Co-Ge或Ti-Ge，需要两个退火步骤来提供这些金属的最低电阻相，而在使用Ni时，单个退火步骤形成最低的电阻相 的Ni硅化物。

公开(公告)号：US06809030B2

公开(公告)日：2004-10-26

申请号：US10185547

申请日：2002-06-28

申请人： Paul David Agnello ,  Cyril Cabral, Jr. ,  Roy Arthur Carruthers ,  James McKell Edwin Harper ,  Christian Lavoie ,  Kirk David Peterson ,  Robert Joseph Purtell ,  Ronnen Andrew Roy ,  Jean Louise Jordan-Sweet ,  Yun Yu Wang

发明人： Paul David Agnello ,  Cyril Cabral, Jr. ,  Roy Arthur Carruthers ,  James McKell Edwin Harper ,  Christian Lavoie ,  Kirk David Peterson ,  Robert Joseph Purtell ,  Ronnen Andrew Roy ,  Jean Louise Jordan-Sweet ,  Yun Yu Wang

IPC分类号： H01L2144

CPC分类号： H01L23/485 ,  H01L21/28518 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of producing electrical contacts having reduced interface roughness as well as the electrical contacts themselves are disclosed herein. The method of the present invention comprises (a) forming an alloy layer having the formula MX, wherein M is a metal selected from the group consisting of Co and Ni and X is an alloying additives over a silicon-containing substrate; (b) optionally forming an optional oxygen barrier layer over said alloy layer; (c) annealing said alloy layer at a temperature sufficient to form a MXSi layer in said structure; (d) removing said optional oxygen barrier layer and any remaining alloy layer; and optionally (e) annealing said MXSi layer at a temperature sufficient to form a MXSi2 layer in said structure.

摘要翻译： 本文公开了一种制造具有降低的界面粗糙度的电接触以及电接触本身的方法。 本发明的方法包括（a）形成具有式MX的合金层，其中M是选自Co和Ni的金属，X是含硅基体上的合金添加剂; （b）任选地在所述合金层上形成任选的氧阻隔层; （c）在足以在所述结构中形成MXSi层的温度下退火所述合金层; （d）除去所述任选的氧气阻挡层和任何剩余的合金层; 以及任选地（e）在足以在所述结构中形成MXSi 2层的温度下退火所述MXSi层。