摘要:
A multi-level, coplanar copper damascene interconnect structure on an integrated circuit chip includes a first planar interconnect layer on an integrated circuit substrate and having plural line conductors separated by a dielectric material having a relatively low dielectric constant and a relatively low elastic modulus. A second planar interconnect layer on the first planar interconnect layer comprises a dielectric film having an elastic modulus higher than in the first planar interconnect layer and conductive vias therethrough. The vias are selectively in contact with the line conductors. A third planar interconnect layer on the second planar interconnect layer has plural line conductors separated by the dielectric material and selectively in contact with the vias.
摘要:
Structures having low-k multilayered dielectric diffusion barrier layer having at least one low-k sublayer and at least one air barrier sublayer are described herein. The multilayered dielectric diffusion barrier layer are diffusion barriers to metal and barriers to air permeation. Methods and compositions relating to the generation of the structures are also described. The advantages of utilizing these low-k multilayered dielectric diffusion barrier layer is a gain in chip performance through a reduction in capacitance between conducting metal features and an increase in reliability as the multilayered dielectric diffusion barrier layer are impermeable to air and prevent metal diffusion.
摘要:
A method for removing a dielectric layer formed upon a semiconductor substrate is disclosed. In an exemplary embodiment of the invention, the method includes subjecting the dielectric layer to a dry etch process and subjecting an adhesion promoter layer underneath the dielectric layer to a wet etch process.
摘要:
Structures are described having vias with more than one electrical conductor at least one of which is a solid conductor which is formed by inserting the wire into the via in a substrate wherein the wire is attached to an electrically conductive plate which is spaced apart from the substrate by a spacer which leave a space between the substrate and plate. The space is filled with a dielectric material. The space with via between the conductor and via sidewall is filled with a dielectric material. The via is used for making transformers and inductors wherein one of the via conductors is used for inner windings and another of the via conductors is used for outer windings.
摘要:
A structure useful for electrical interconnection comprises a substrate; a plurality of porous dielectric layers disposed on the substrate; an etch stop layer disposed between a first of the dielectric layers and a second of the dielectric layers; and at least one thin, tough, non-porous dielectric layer disposed between at least one of the porous dielectric layers and the etch stop layer. A method for forming the structure comprising forming a multilayer stack of porous dielectric layers on the substrate, the stack including the plurality of porous dielectric layers, and forming a plurality of patterned metal conductors within the multilayer stack. Curing of the multilayer dielectric stack may be in a single cure step in a furnace. The application and hot plate baking of the individual layers of the multi layer dielectric stack may be accomplished in a single spin-coat tool, without being removed, to fully cure the stack until all dielectric layers have been deposited.
摘要:
A method for forming a planarized dielectric layer upon a semiconductor wafer is disclosed. In an exemplary embodiment of the invention, the method includes applying an adhesion promoter to the wafer, thereby forming an adhesion promoter layer. A dielectric material is applied in a spin-on fashion upon the adhesion promoter layer at a relative humidity of less than 40% and for a thickness setting duration of less than 30 seconds. Then, the dielectric material is dried by baking without additional spinning of the semiconductor wafer.
摘要:
Disclosed is an admixture which is curable to form a crack resistant, photosensitive polycyanurate resist. Also disclosed is a structure for its use and process of making. The resist can be tailored to be either positively or negatively sensitive to actinic radiation. Because of its improved thermal and mechanical properties, the cured resist is suitable for use at high temperature, such as in electronic packaging applications.
摘要:
Disclosed are structures comprising a composite of fluorinated particulate carbon dispersed in a polymer, the fluorinated carbon being present in an amount sufficient to reduce the dielectric constant of the composition, the structure also including electrical conductor patterns.The composite can be made conductive by irradiating it with an UV excimer laser.
摘要:
A microwave processing system is provided wherein the material to be processed is in the form of a web type quantity configuration with a thickness that is small in relation to the wavelength of a particular microwave frequency. The material is passed through the field associated with a plurality of microwave standing waves of the particular frequency, each adjacent standing wave being offset 1/4 wavelength along the direction of movement of the web. A carrier gas removes volatile solvents from the material surfaces. Control is provided for the interrelationship of temperature, rate of movement, flow of carrier gas, and microwave power.
摘要:
Disclosed are structures comprising a composite of fluorinated particulate carbon dispersed in a polymer, the fluorinated carbon being present in an amount sufficient to reduce the dielectric constant of the composition, the structure also including electrical conductor patterns. The composite can be made conductive by irradiating it with an UV excimer laser.